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llvm-project/llvm/test/CodeGen/R600/llvm.SI.fs.interp.constant.ll

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R600/SI: Use -verify-machineinstrs for most tests We can't enable the verifier for tests with SI_IF and SI_ELSE, because these instructions are always followed by a COPY which copies their result to the next basic block. This violates the machine verifier's rule that non-terminators can not folow terminators. Reviewed-by: Vincent Lejeune<vljn at ovi.com> llvm-svn: 192366
2013-10-11 01:11:46 +08:00
;RUN: llc < %s -march=r600 -mcpu=verde -verify-machineinstrs | FileCheck %s
R600/SI: Make sure M0 is loaded for V_INTERP_MOV_F32 NOTE: This is a candidate for the Mesa stable branch. Reviewed-by: Tom Stellard <thomas.stellard@amd.com> llvm-svn: 175733
2013-02-21 16:57:10 +08:00
;CHECK: S_MOV_B32
;CHECK-NEXT: V_INTERP_MOV_F32
R600/SI: adjust test to recent changes Signed-off-by: Christian König <christian.koenig@amd.com> llvm-svn: 176691
2013-03-08 22:44:00 +08:00
define void @main(<16 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg) "ShaderType"="0" {
R600/SI: Make sure M0 is loaded for V_INTERP_MOV_F32 NOTE: This is a candidate for the Mesa stable branch. Reviewed-by: Tom Stellard <thomas.stellard@amd.com> llvm-svn: 175733
2013-02-21 16:57:10 +08:00
main_body:
R600/SI: adjust test to recent changes Signed-off-by: Christian König <christian.koenig@amd.com> llvm-svn: 176691
2013-03-08 22:44:00 +08:00
%4 = call float @llvm.SI.fs.constant(i32 0, i32 0, i32 %3)
%5 = call i32 @llvm.SI.packf16(float %4, float %4)
%6 = bitcast i32 %5 to float
call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %6, float %6, float %6, float %6)
R600/SI: Make sure M0 is loaded for V_INTERP_MOV_F32 NOTE: This is a candidate for the Mesa stable branch. Reviewed-by: Tom Stellard <thomas.stellard@amd.com> llvm-svn: 175733
2013-02-21 16:57:10 +08:00
ret void
}
declare void @llvm.AMDGPU.shader.type(i32)
R600/SI: mark most intrinsics as readnone v2 They read from constant register space anyway. v2: fix lit tests Signed-off-by: Christian König <christian.koenig@amd.com> llvm-svn: 178020
2013-03-26 22:03:57 +08:00
declare float @llvm.SI.fs.constant(i32, i32, i32) readnone
R600/SI: Make sure M0 is loaded for V_INTERP_MOV_F32 NOTE: This is a candidate for the Mesa stable branch. Reviewed-by: Tom Stellard <thomas.stellard@amd.com> llvm-svn: 175733
2013-02-21 16:57:10 +08:00
declare i32 @llvm.SI.packf16(float, float) readnone
declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)