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[TableGen] [docs] Change title of tblgen.rst to fix man page filename
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tblgen - Description to C++ Code
================================
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[docs][tools] Add missing "program" tags to rst files Sphinx allows for definitions of command-line options using `.. option <name>` and references to those options via `:option:<name>`. However, it looks like there is no scoping of these options by default, meaning that links can end up pointing to incorrect documents. See for example the llvm-mca document, which contains references to -o that, prior to this patch, pointed to a different document. What's worse is that these links appear to be non-deterministic in which one is picked (on my machine, some references end up pointing to opt, whereas on the live docs, they point to llvm-dwarfdump, for example). The fix is to add the .. program <name> tag. This essentially namespaces the options (definitions and references) to the named program, ensuring that the links are kept correct. Reviwed by: andreadb Differential Revision: https://reviews.llvm.org/D63873 llvm-svn: 364538
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.. program:: tblgen
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SYNOPSIS
--------
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:program:`clang-tblgen` [*options*] [*filename*]
:program:`lldb-tblgen` [*options*] [*filename*]
:program:`llvm-tblgen` [*options*] [*filename*]
:program:`mlir-tblgen` [*options*] [*filename*]
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DESCRIPTION
-----------
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:program:`*-tblgen` is a family of programs that translates target
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description (``.td``) files into C++ code and other output formats. Most
users of LLVM will not need to use this program. It is used only for
[TableGen] [Docs] Add lldb-tblgen to command guide; add 4 guide stubs Differential Revision: https://reviews.llvm.org/D99605
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writing parts of the compiler, debugger, and LLVM target backends.
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[TableGen] [docs] Change title of tblgen.rst to fix man page filename
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The details of the input and output of the :program:`*-tblgen` programs is
beyond the scope of this short introduction; please see the :doc:`TableGen
Overview <../TableGen/index>` for an introduction and for references to
additional TableGen documents.
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The *filename* argument specifies the name of the Target Description (``.td``)
file that TableGen processes.
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OPTIONS
-------
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General Options
~~~~~~~~~~~~~~~
Documentation: end option description with a period Patch by Dimitry Andric. llvm-svn: 180675
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Documentation for tblgen: formatting llvm-svn: 168904
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.. option:: -help
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Print a description of the command line options.
.. option:: -help-list
Print a description of the command line options in a simple list format.
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.. option:: -D=macroname
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[TableGen] Update xxx-tblgen command document. Add a few cross-references among TableGen documents. Differential Revision: https://reviews.llvm.org/D90186 Add cross-references between TableGen documents.
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Specify the name of a macro to be defined. The name is defined, but it
has no particular value.
.. option:: -d=filename
Specify the name of the dependency filename.
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.. option:: -debug
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Enable debug output.
.. option:: -dump-json
Print a JSON representation of all records, suitable for further
automated processing.
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Documentation for tblgen: formatting llvm-svn: 168904
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.. option:: -I directory
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Documentation for tblgen: formatting llvm-svn: 168904
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Specify where to find other target description files for inclusion. The
``directory`` value should be a full or partial path to a directory that
contains target description files.
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.. option:: -null-backend
Parse the source files and build the records, but do not run any
backend. This is useful for timing the frontend.
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.. option:: -o filename
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Specify the output file name. If ``filename`` is ``-``, then
[TableGen] [Docs] Add lldb-tblgen to command guide; add 4 guide stubs Differential Revision: https://reviews.llvm.org/D99605
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:program:`*-tblgen` sends its output to standard output.
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.. option:: -print-records
[docs] Add ReST version of all the man pages. - The POD versions are slated for execution, but are still around until llvm.org machinery is in place. llvm-svn: 156384
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[TableGen] Add frontend/backend phase timing capability. Describe in the BackEnd Developer's Guide. Instrument a few backends. Remove an old unused timing facility. Add a null backend for timing the parser. Differential Revision: https://reviews.llvm.org/D91388
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Print all classes and records to standard output (default backend option).
[docs] Add ReST version of all the man pages. - The POD versions are slated for execution, but are still around until llvm.org machinery is in place. llvm-svn: 156384
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.. option:: -print-detailed-records
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Print a detailed report of all global variables, classes, and records
to standard output.
[docs] Add ReST version of all the man pages. - The POD versions are slated for execution, but are still around until llvm.org machinery is in place. llvm-svn: 156384
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.. option:: -stats
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Print a report with any statistics collected by the backend.
[docs] Add ReST version of all the man pages. - The POD versions are slated for execution, but are still around until llvm.org machinery is in place. llvm-svn: 156384
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.. option:: -time-phases
Time the parser and backend phases and print a report.
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.. option:: -version
Show the version number of the program.
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.. option:: -write-if-changed
[TableGen] Add a general-purpose JSON backend. The aim of this backend is to output everything TableGen knows about the record set, similarly to the default -print-records backend. But where -print-records produces output in TableGen's input syntax (convenient for humans to read), this backend produces it as structured JSON data, which is convenient for loading into standard scripting languages such as Python, in order to extract information from the data set in an automated way. The output data contains a JSON representation of the variable definitions in output 'def' records, and a few pieces of metadata such as which of those definitions are tagged with the 'field' prefix and which defs are derived from which classes. It doesn't dump out absolutely every piece of knowledge it _could_ produce, such as type information and complicated arithmetic operator nodes in abstract superclasses; the main aim is to allow consumers of this JSON dump to essentially act as new backends, and backends don't generally need to depend on that kind of data. The new backend is implemented as an EmitJSON() function similar to all of llvm-tblgen's other EmitFoo functions, except that it lives in lib/TableGen instead of utils/TableGen on the basis that I'm expecting to add it to clang-tblgen too in a future patch. To test it, I've written a Python script that loads the JSON output and tests properties of it based on comments in the .td source - more or less like FileCheck, except that the CHECK: lines have Python expressions after them instead of textual pattern matches. Reviewers: nhaehnle Reviewed By: nhaehnle Subscribers: arichardson, labath, mgorny, llvm-commits Differential Revision: https://reviews.llvm.org/D46054 llvm-svn: 336771
2018-07-11 16:40:19 +08:00
[TableGen] Add frontend/backend phase timing capability. Describe in the BackEnd Developer's Guide. Instrument a few backends. Remove an old unused timing facility. Add a null backend for timing the parser. Differential Revision: https://reviews.llvm.org/D91388
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Write the output file only if it is new or has changed.
[TableGen] Add a general-purpose JSON backend. The aim of this backend is to output everything TableGen knows about the record set, similarly to the default -print-records backend. But where -print-records produces output in TableGen's input syntax (convenient for humans to read), this backend produces it as structured JSON data, which is convenient for loading into standard scripting languages such as Python, in order to extract information from the data set in an automated way. The output data contains a JSON representation of the variable definitions in output 'def' records, and a few pieces of metadata such as which of those definitions are tagged with the 'field' prefix and which defs are derived from which classes. It doesn't dump out absolutely every piece of knowledge it _could_ produce, such as type information and complicated arithmetic operator nodes in abstract superclasses; the main aim is to allow consumers of this JSON dump to essentially act as new backends, and backends don't generally need to depend on that kind of data. The new backend is implemented as an EmitJSON() function similar to all of llvm-tblgen's other EmitFoo functions, except that it lives in lib/TableGen instead of utils/TableGen on the basis that I'm expecting to add it to clang-tblgen too in a future patch. To test it, I've written a Python script that loads the JSON output and tests properties of it based on comments in the .td source - more or less like FileCheck, except that the CHECK: lines have Python expressions after them instead of textual pattern matches. Reviewers: nhaehnle Reviewed By: nhaehnle Subscribers: arichardson, labath, mgorny, llvm-commits Differential Revision: https://reviews.llvm.org/D46054 llvm-svn: 336771
2018-07-11 16:40:19 +08:00
[MCSched] Bind PFM Counters to the CPUs instead of the SchedModel. Summary: The pfm counters are now in the ExegesisTarget rather than the MCSchedModel (PR39165). This also compresses the pfm counter tables (PR37068). Reviewers: RKSimon, gchatelet Subscribers: mgrang, llvm-commits Differential Revision: https://reviews.llvm.org/D52932 llvm-svn: 345243
2018-10-25 15:44:01 +08:00
[TableGen] Update xxx-tblgen command document. Add a few cross-references among TableGen documents. Differential Revision: https://reviews.llvm.org/D90186 Add cross-references between TableGen documents.
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clang-tblgen Options
~~~~~~~~~~~~~~~~~~~~
.. option:: -gen-clang-attr-classes
Generate Clang attribute clases.
.. option:: -gen-clang-attr-parser-string-switches
Generate all parser-related attribute string switches.
.. option:: -gen-clang-attr-subject-match-rules-parser-string-switches
Generate all parser-related attribute subject match rule string switches.
.. option:: -gen-clang-attr-impl
Generate Clang attribute implementations.
.. option:: -gen-clang-attr-list"
Generate a Clang attribute list.
.. option:: -gen-clang-attr-subject-match-rule-list
Generate a Clang attribute subject match rule list.
.. option:: -gen-clang-attr-pch-read
Generate Clang PCH attribute reader.
.. option:: -gen-clang-attr-pch-write
Generate Clang PCH attribute writer.
.. option:: -gen-clang-attr-has-attribute-impl
Generate a Clang attribute spelling list.
.. option:: -gen-clang-attr-spelling-index
Generate a Clang attribute spelling index.
.. option:: -gen-clang-attr-ast-visitor
Generate a recursive AST visitor for Clang attributes.
.. option:: -gen-clang-attr-template-instantiate
Generate a Clang template instantiate code.
.. option:: -gen-clang-attr-parsed-attr-list
Generate a Clang parsed attribute list.
.. option:: -gen-clang-attr-parsed-attr-impl
Generate the Clang parsed attribute helpers.
.. option:: -gen-clang-attr-parsed-attr-kinds
Generate a Clang parsed attribute kinds.
.. option:: -gen-clang-attr-text-node-dump
Generate Clang attribute text node dumper.
.. option:: -gen-clang-attr-node-traverse
Generate Clang attribute traverser.
.. option:: -gen-clang-diags-defs
Generate Clang diagnostics definitions.
.. option:: -clang-component component
Only use warnings from specified component.
.. option:: -gen-clang-diag-groups
Generate Clang diagnostic groups.
.. option:: -gen-clang-diags-index-name
Generate Clang diagnostic name index.
.. option:: -gen-clang-basic-reader
Generate Clang BasicReader classes.
.. option:: -gen-clang-basic-writer
Generate Clang BasicWriter classes.
.. option:: -gen-clang-comment-nodes
Generate Clang AST comment nodes.
.. option:: -gen-clang-decl-nodes
Generate Clang AST declaration nodes.
.. option:: -gen-clang-stmt-nodes
Generate Clang AST statement nodes.
.. option:: -gen-clang-type-nodes
Generate Clang AST type nodes.
.. option:: -gen-clang-type-reader
Generate Clang AbstractTypeReader class.
.. option:: -gen-clang-type-writer
Generate Clang AbstractTypeWriter class.
.. option:: -gen-clang-opcodes
Generate Clang constexpr interpreter opcodes.
.. option:: -gen-clang-sa-checkers
Generate Clang static analyzer checkers.
.. option:: -gen-clang-comment-html-tags
Generate efficient matchers for HTML tag names that are used in
documentation comments.
.. option:: -gen-clang-comment-html-tags-properties
Generate efficient matchers for HTML tag properties.
.. option:: -gen-clang-comment-html-named-character-references
Generate function to translate named character references to UTF-8 sequences.
.. option:: -gen-clang-comment-command-info
Generate command properties for commands that are used in documentation comments.
.. option:: -gen-clang-comment-command-list
Generate list of commands that are used in documentation comments.
.. option:: -gen-clang-opencl-builtins
Generate OpenCL builtin declaration handlers.
.. option:: -gen-arm-neon
Generate ``arm_neon.h`` for Clang.
.. option:: -gen-arm-fp16
Generate ``arm_fp16.h`` for Clang.
.. option:: -gen-arm-bf16
Generate ``arm_bf16.h`` for Clang.
.. option:: -gen-arm-neon-sema
Generate ARM NEON sema support for Clang.
.. option:: -gen-arm-neon-test
Generate ARM NEON tests for Clang.
.. option:: -gen-arm-sve-header
Generate ``arm_sve.h`` for Clang.
.. option:: -gen-arm-sve-builtins
Generate ``arm_sve_builtins.inc`` for Clang.
.. option:: -gen-arm-sve-builtin-codegen
Generate ``arm_sve_builtin_cg_map.inc`` for Clang.
.. option:: -gen-arm-sve-typeflags
Generate ``arm_sve_typeflags.inc`` for Clang.
.. option:: -gen-arm-sve-sema-rangechecks
Generate ``arm_sve_sema_rangechecks.inc`` for Clang.
.. option:: -gen-arm-mve-header
Generate ``arm_mve.h`` for Clang.
.. option:: -gen-arm-mve-builtin-def
Generate ARM MVE builtin definitions for Clang.
.. option:: -gen-arm-mve-builtin-sema
Generate ARM MVE builtin sema checks for Clang.
.. option:: -gen-arm-mve-builtin-codegen
Generate ARM MVE builtin code-generator for Clang.
.. option:: -gen-arm-mve-builtin-aliases
Generate list of valid ARM MVE builtin aliases for Clang.
.. option:: -gen-arm-cde-header
Generate ``arm_cde.h`` for Clang.
.. option:: -gen-arm-cde-builtin-def
Generate ARM CDE builtin definitions for Clang.
.. option:: -gen-arm-cde-builtin-sema
Generate ARM CDE builtin sema checks for Clang.
.. option:: -gen-arm-cde-builtin-codegen
Generate ARM CDE builtin code-generator for Clang.
.. option:: -gen-arm-cde-builtin-aliases
Generate list of valid ARM CDE builtin aliases for Clang.
[Clang][RISCV] Add custom TableGen backend for riscv-vector intrinsics. Demonstrate how to generate vadd/vfadd intrinsic functions 1. add -gen-riscv-vector-builtins for clang builtins. 2. add -gen-riscv-vector-builtin-codegen for clang codegen. 3. add -gen-riscv-vector-header for riscv_vector.h. It also generates ifdef directives with extension checking, base on D94403. 4. add -gen-riscv-vector-generic-header for riscv_vector_generic.h. Generate overloading version Header for generic api. https://github.com/riscv/rvv-intrinsic-doc/blob/master/rvv-intrinsic-rfc.md#c11-generic-interface 5. update tblgen doc for riscv related options. riscv_vector.td also defines some unused type transformers for vadd, because I think it could demonstrate how tranfer type work and we need them for the whole intrinsic functions implementation in the future. Authored-by: Roger Ferrer Ibanez <rofirrim@gmail.com> Co-Authored-by: Zakk Chen <zakk.chen@sifive.com> Reviewed By: jrtc27, craig.topper, HsiangKai, Jim, Paul-C-Anagnostopoulos Differential Revision: https://reviews.llvm.org/D95016
2021-03-05 23:40:28 +08:00
.. option:: -gen-riscv-vector-header
Generate ``riscv_vector.h`` for Clang.
.. option:: -gen-riscv-vector-builtins
Generate ``riscv_vector_builtins.inc`` for Clang.
.. option:: -gen-riscv-vector-builtin-codegen
Generate ``riscv_vector_builtin_cg.inc`` for Clang.
[TableGen] Update xxx-tblgen command document. Add a few cross-references among TableGen documents. Differential Revision: https://reviews.llvm.org/D90186 Add cross-references between TableGen documents.
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.. option:: -gen-attr-docs
Generate attribute documentation.
.. option:: -gen-diag-docs
Generate diagnostic documentation.
.. option:: -gen-opt-docs
Generate option documentation.
.. option:: -gen-clang-data-collectors
Generate data collectors for AST nodes.
.. option:: -gen-clang-test-pragma-attribute-supported-attributes
Generate a list of attributes supported by ``#pragma`` Clang attribute for
testing purposes.
[TableGen] [Docs] Add lldb-tblgen to command guide; add 4 guide stubs Differential Revision: https://reviews.llvm.org/D99605
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lldb-tblgen Options
~~~~~~~~~~~~~~~~~~~
.. option:: gen-lldb-option-defs
Generate lldb OptionDefinition values.
.. option:: gen-lldb-property-defs
Generate lldb PropertyDefinition values.
.. option:: gen-lldb-property-enum-defs
Generate lldb PropertyDefinition enum values.
llvm-tblgen Options
~~~~~~~~~~~~~~~~~~~
.. option:: -gen-asm-matcher
Generate assembly instruction matcher.
.. option:: -match-prefix=prefix
Make -gen-asm-matcher match only instructions with the given *prefix*.
.. option:: -gen-asm-parser
Generate assembly instruction parser.
.. option:: -asmparsernum=n
Make -gen-asm-parser emit assembly parser number *n*.
.. option:: -gen-asm-writer
Generate assembly writer.
.. option:: -asmwriternum=n
Make -gen-asm-writer emit assembly writer number *n*.
.. option:: -gen-attrs
Generate attributes.
.. option:: -gen-automata
Generate generic automata.
.. option:: -gen-callingconv
Generate calling convention descriptions.
.. option:: -gen-compress-inst-emitter
Generate RISC-V compressed instructions.
.. option:: -gen-ctags
Generate ctags-compatible index.
.. option:: -gen-dag-isel
Generate a DAG (directed acyclic graph) instruction selector.
.. option:: -instrument-coverage
Make -gen-dag-isel generate tables to help identify the patterns matched.
.. option:: -omit-comments
Make -gen-dag-isel omit comments. The default is false.
.. option:: -gen-dfa-packetizer
Generate DFA Packetizer for VLIW targets.
.. option:: -gen-directive-decl
Generate directive related declaration code (header file).
.. option:: -gen-directive-gen
Generate directive related implementation code part.
.. option:: -gen-directive-impl
Generate directive related implementation code.
.. option:: -gen-disassembler
Generate disassembler.
.. option:: -gen-emitter
Generate machine code emitter.
.. option:: -gen-exegesis
Generate llvm-exegesis tables.
.. option:: -gen-fast-isel
Generate a "fast" instruction selector.
.. option:: -gen-global-isel
Generate GlobalISel selector.
.. option:: -gisel-coverage-file=filename
Specify the file from which to retrieve coverage information.
.. option:: -instrument-gisel-coverage
Make -gen-global-isel generate coverage instrumentation.
.. option:: -optimize-match-table
Make -gen-global-isel generate an optimized version of the match table.
.. option:: -warn-on-skipped-patterns
Make -gen-global-isel explain why a pattern was skipped for inclusion.
.. option:: -gen-global-isel-combiner
Generate GlobalISel combiner.
.. option:: -combiners=list
Make -gen-global-isel-combiner emit the specified combiners.
.. option:: -gicombiner-show-expansions
Make -gen-global-isel-combiner use C++ comments to indicate occurrences
of code expansion.
.. option:: -gicombiner-stop-after-build
Make -gen-global-isel-combiner stop processing after building the match tree.
.. option:: -gicombiner-stop-after-parse
Make -gen-global-isel-combiner stop processing after parsing rules
and dump state.
.. option:: -gen-instr-info
Generate instruction descriptions.
.. option:: -gen-instr-docs
Generate instruction documentation.
.. option:: -gen-intrinsic-enums
Generate intrinsic enums.
.. option:: -intrinsic-prefix=prefix
Make -gen-intrinsic-enums generate intrinsics with this target *prefix*.
.. option:: -gen-intrinsic-impl
Generate intrinsic information.
.. option:: -gen-opt-parser-defs
Generate options definitions.
.. option:: -gen-opt-rst
Generate option RST.
.. option:: -gen-pseudo-lowering
Generate pseudo instruction lowering.
.. option:: -gen-register-bank
Generate register bank descriptions.
.. option:: -gen-register-info
Generate registers and register classes info.
.. option:: -register-info-debug
Make -gen-register-info dump register information for debugging.
.. option:: -gen-searchable-tables
Generate generic searchable tables. See :doc:`TableGen BackEnds <../TableGen/BackEnds>`
for a detailed description.
.. option:: -gen-subtarget
Generate subtarget enumerations.
.. option:: -gen-x86-EVEX2VEX-tables
Generate X86 EVEX to VEX compress tables.
.. option:: -gen-x86-fold-tables
Generate X86 fold tables.
.. option:: -long-string-literals
When emitting large string tables, prefer string literals over
comma-separated char literals. This can be a readability and
compile-time performance win, but upsets some compilers.
.. option:: -print-enums
Print enumeration values for a class.
.. option:: -class=classname
Make -print-enums print the enumeration list for the specified class.
.. option:: -print-sets
Print expanded sets for testing DAG exprs.
[TableGen] Update xxx-tblgen command document. Add a few cross-references among TableGen documents. Differential Revision: https://reviews.llvm.org/D90186 Add cross-references between TableGen documents.
2020-10-24 23:08:22 +08:00
mlir-tblgen Options
~~~~~~~~~~~~~~~~~~~
.. option:: -gen-avail-interface-decls
Generate availability interface declarations.
.. option:: -gen-avail-interface-defs
Generate op interface definitions.
.. option:: -gen-dialect-doc
Generate dialect documentation.
.. option:: -dialect
The dialect to generate.
.. option:: -gen-directive-decl
Generate declarations for directives (OpenMP, etc.).
.. option:: -gen-enum-decls
Generate enum utility declarations.
.. option:: -gen-enum-defs
Generate enum utility definitions.
.. option:: -gen-enum-from-llvmir-conversions
Generate conversions of EnumAttrs from LLVM IR.
.. option:: -gen-enum-to-llvmir-conversions
Generate conversions of EnumAttrs to LLVM IR.
.. option:: -gen-llvmir-conversions
Generate LLVM IR conversions.
.. option:: -gen-llvmir-intrinsics
Generate LLVM IR intrinsics.
.. option:: -llvmir-intrinsics-filter
Only keep the intrinsics with the specified substring in their record name.
.. option:: -dialect-opclass-base
The base class for the ops in the dialect we are to emit.
.. option:: -gen-op-decls
Generate operation declarations.
.. option:: -gen-op-defs
Generate operation definitions.
.. option:: -asmformat-error-is-fatal
Emit a fatal error if format parsing fails.
.. option:: -op-exclude-regex
Regular expression of name of ops to exclude (no filter if empty).
.. option:: -op-include-regex
Regular expression of name of ops to include (no filter if empty).
.. option:: -gen-op-doc
Generate operation documentation.
.. option:: -gen-pass-decls
Generate operation documentation.
.. option:: -name namestring
The name of this group of passes.
.. option:: -gen-pass-doc
Generate pass documentation.
.. option:: -gen-rewriters
Generate pattern rewriters.
.. option:: -gen-spirv-avail-impls
Generate SPIR-V operation utility definitions.
.. option:: -gen-spirv-capability-implication
Generate utility function to return implied capabilities for a given capability.
.. option:: -gen-spirv-enum-avail-decls
Generate SPIR-V enum availability declarations.
.. option:: -gen-spirv-enum-avail-defs
Generate SPIR-V enum availability definitions.
.. option:: -gen-spirv-op-utils
Generate SPIR-V operation utility definitions.
.. option:: -gen-spirv-serialization
Generate SPIR-V (de)serialization utilities and functions.
.. option:: -gen-struct-attr-decls
Generate struct utility declarations.
.. option:: -gen-struct-attr-defs
Generate struct utility definitions.
.. option:: -gen-typedef-decls
Generate TypeDef declarations.
.. option:: -gen-typedef-defs
Generate TypeDef definitions.
.. option:: -typedefs-dialect name
Generate types for this dialect.
[docs] Add ReST version of all the man pages. - The POD versions are slated for execution, but are still around until llvm.org machinery is in place. llvm-svn: 156384
2012-05-09 00:50:35 +08:00
EXIT STATUS
-----------
[TableGen] [Docs] Add lldb-tblgen to command guide; add 4 guide stubs Differential Revision: https://reviews.llvm.org/D99605
2021-03-31 00:37:13 +08:00
If :program:`*-tblgen` succeeds, it will exit with 0. Otherwise, if an error
[docs] Add ReST version of all the man pages. - The POD versions are slated for execution, but are still around until llvm.org machinery is in place. llvm-svn: 156384
2012-05-09 00:50:35 +08:00
occurs, it will exit with a non-zero value.