2020-03-12 17:02:54 +08:00
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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[PowerPC] Enable default support of quad precision operations
Summary: Remove option guarding support of quad precision operations.
Reviewers: nemanjai, #powerpc, steven.zhang
Reviewed By: nemanjai, #powerpc, steven.zhang
Subscribers: qiucf, wuzish, nemanjai, hiraditya, kbarton, shchenz, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D83437
2020-07-09 06:07:34 +08:00
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; RUN: llc -verify-machineinstrs -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
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; RUN: < %s -mtriple=powerpc64le-unknown-linux -mcpu=pwr9 | FileCheck %s
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2020-03-12 17:02:54 +08:00
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declare fp128 @llvm.experimental.constrained.fadd.f128(fp128, fp128, metadata, metadata)
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declare fp128 @llvm.experimental.constrained.fsub.f128(fp128, fp128, metadata, metadata)
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declare fp128 @llvm.experimental.constrained.fmul.f128(fp128, fp128, metadata, metadata)
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declare fp128 @llvm.experimental.constrained.fdiv.f128(fp128, fp128, metadata, metadata)
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2020-05-12 13:40:54 +08:00
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declare fp128 @llvm.experimental.constrained.fma.f128(fp128, fp128, fp128, metadata, metadata)
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declare fp128 @llvm.experimental.constrained.sqrt.f128(fp128, metadata, metadata)
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2020-05-30 00:15:54 +08:00
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define fp128 @fadd_f128(fp128 %f1, fp128 %f2) #0 {
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2020-03-12 17:02:54 +08:00
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; CHECK-LABEL: fadd_f128:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xsaddqp v2, v2, v3
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; CHECK-NEXT: blr
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%res = call fp128 @llvm.experimental.constrained.fadd.f128(
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fp128 %f1, fp128 %f2,
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metadata !"round.dynamic",
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2020-05-30 00:15:54 +08:00
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metadata !"fpexcept.strict") #0
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2020-03-12 17:02:54 +08:00
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ret fp128 %res
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}
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2020-05-30 00:15:54 +08:00
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define fp128 @fsub_f128(fp128 %f1, fp128 %f2) #0 {
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2020-03-12 17:02:54 +08:00
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; CHECK-LABEL: fsub_f128:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xssubqp v2, v2, v3
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; CHECK-NEXT: blr
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%res = call fp128 @llvm.experimental.constrained.fsub.f128(
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fp128 %f1, fp128 %f2,
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metadata !"round.dynamic",
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2020-05-30 00:15:54 +08:00
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metadata !"fpexcept.strict") #0
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2020-03-12 17:02:54 +08:00
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ret fp128 %res
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}
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2020-05-30 00:15:54 +08:00
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define fp128 @fmul_f128(fp128 %f1, fp128 %f2) #0 {
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2020-03-12 17:02:54 +08:00
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; CHECK-LABEL: fmul_f128:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xsmulqp v2, v2, v3
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; CHECK-NEXT: blr
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%res = call fp128 @llvm.experimental.constrained.fmul.f128(
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fp128 %f1, fp128 %f2,
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metadata !"round.dynamic",
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2020-05-30 00:15:54 +08:00
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metadata !"fpexcept.strict") #0
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2020-03-12 17:02:54 +08:00
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ret fp128 %res
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}
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2020-05-30 00:15:54 +08:00
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define fp128 @fdiv_f128(fp128 %f1, fp128 %f2) #0 {
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2020-03-12 17:02:54 +08:00
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; CHECK-LABEL: fdiv_f128:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xsdivqp v2, v2, v3
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; CHECK-NEXT: blr
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%res = call fp128 @llvm.experimental.constrained.fdiv.f128(
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fp128 %f1, fp128 %f2,
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metadata !"round.dynamic",
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2020-05-30 00:15:54 +08:00
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metadata !"fpexcept.strict") #0
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2020-03-12 17:02:54 +08:00
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ret fp128 %res
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}
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2020-05-12 13:40:54 +08:00
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2020-05-30 00:15:54 +08:00
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define fp128 @fmadd_f128(fp128 %f0, fp128 %f1, fp128 %f2) #0 {
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2020-05-12 13:40:54 +08:00
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; CHECK-LABEL: fmadd_f128:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xsmaddqp v4, v2, v3
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; CHECK-NEXT: vmr v2, v4
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; CHECK-NEXT: blr
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%res = call fp128 @llvm.experimental.constrained.fma.f128(
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fp128 %f0, fp128 %f1, fp128 %f2,
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metadata !"round.dynamic",
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2020-05-30 00:15:54 +08:00
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metadata !"fpexcept.strict") #0
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2020-05-12 13:40:54 +08:00
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ret fp128 %res
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}
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2020-05-30 00:15:54 +08:00
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define fp128 @fmsub_f128(fp128 %f0, fp128 %f1, fp128 %f2) #0 {
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2020-05-12 13:40:54 +08:00
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; CHECK-LABEL: fmsub_f128:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xsmsubqp v4, v2, v3
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; CHECK-NEXT: vmr v2, v4
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; CHECK-NEXT: blr
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%neg = fneg fp128 %f2
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%res = call fp128 @llvm.experimental.constrained.fma.f128(
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fp128 %f0, fp128 %f1, fp128 %neg,
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metadata !"round.dynamic",
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2020-05-30 00:15:54 +08:00
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metadata !"fpexcept.strict") #0
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2020-05-12 13:40:54 +08:00
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ret fp128 %res
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}
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2020-05-30 00:15:54 +08:00
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define fp128 @fnmadd_f128(fp128 %f0, fp128 %f1, fp128 %f2) #0 {
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2020-05-12 13:40:54 +08:00
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; CHECK-LABEL: fnmadd_f128:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xsnmaddqp v4, v2, v3
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; CHECK-NEXT: vmr v2, v4
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; CHECK-NEXT: blr
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%fma = call fp128 @llvm.experimental.constrained.fma.f128(
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fp128 %f0, fp128 %f1, fp128 %f2,
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metadata !"round.dynamic",
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2020-05-30 00:15:54 +08:00
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metadata !"fpexcept.strict") #0
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2020-05-12 13:40:54 +08:00
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%res = fneg fp128 %fma
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ret fp128 %res
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}
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2020-05-30 00:15:54 +08:00
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define fp128 @fnmsub_f128(fp128 %f0, fp128 %f1, fp128 %f2) #0 {
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2020-05-12 13:40:54 +08:00
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; CHECK-LABEL: fnmsub_f128:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xsnmsubqp v4, v2, v3
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; CHECK-NEXT: vmr v2, v4
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; CHECK-NEXT: blr
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%neg = fneg fp128 %f2
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%fma = call fp128 @llvm.experimental.constrained.fma.f128(
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fp128 %f0, fp128 %f1, fp128 %neg,
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metadata !"round.dynamic",
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2020-05-30 00:15:54 +08:00
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metadata !"fpexcept.strict") #0
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2020-05-12 13:40:54 +08:00
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%res = fneg fp128 %fma
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ret fp128 %res
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}
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2020-05-30 00:15:54 +08:00
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define fp128 @fsqrt_f128(fp128 %f1) #0 {
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2020-05-12 13:40:54 +08:00
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; CHECK-LABEL: fsqrt_f128:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xssqrtqp v2, v2
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; CHECK-NEXT: blr
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%res = call fp128 @llvm.experimental.constrained.sqrt.f128(
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fp128 %f1,
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metadata !"round.dynamic",
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2020-05-30 00:15:54 +08:00
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metadata !"fpexcept.strict") #0
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2020-05-12 13:40:54 +08:00
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ret fp128 %res
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}
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2020-05-30 00:15:54 +08:00
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attributes #0 = { strictfp }
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