2017-10-19 05:46:47 +08:00
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|
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//===- LoopReroll.cpp - Loop rerolling pass -------------------------------===//
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2013-11-17 07:59:05 +08:00
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//
|
2019-01-19 16:50:56 +08:00
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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2013-11-17 07:59:05 +08:00
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//
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//===----------------------------------------------------------------------===//
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//
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// This pass implements a simple loop reroller.
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//
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//===----------------------------------------------------------------------===//
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2017-10-19 05:46:47 +08:00
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#include "llvm/ADT/APInt.h"
|
2017-06-06 19:49:48 +08:00
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|
|
#include "llvm/ADT/BitVector.h"
|
2017-10-19 05:46:47 +08:00
|
|
|
#include "llvm/ADT/DenseMap.h"
|
|
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|
#include "llvm/ADT/DenseSet.h"
|
2015-01-30 05:52:03 +08:00
|
|
|
#include "llvm/ADT/MapVector.h"
|
2014-01-07 19:48:04 +08:00
|
|
|
#include "llvm/ADT/STLExtras.h"
|
2018-06-12 19:16:56 +08:00
|
|
|
#include "llvm/ADT/SmallPtrSet.h"
|
2017-10-19 05:46:47 +08:00
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|
|
#include "llvm/ADT/SmallVector.h"
|
2013-11-17 07:59:05 +08:00
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|
|
#include "llvm/ADT/Statistic.h"
|
|
|
|
#include "llvm/Analysis/AliasAnalysis.h"
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|
|
|
#include "llvm/Analysis/AliasSetTracker.h"
|
2017-10-19 05:46:47 +08:00
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|
|
#include "llvm/Analysis/LoopInfo.h"
|
2013-11-17 07:59:05 +08:00
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|
|
#include "llvm/Analysis/LoopPass.h"
|
|
|
|
#include "llvm/Analysis/ScalarEvolution.h"
|
|
|
|
#include "llvm/Analysis/ScalarEvolutionExpander.h"
|
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|
#include "llvm/Analysis/ScalarEvolutionExpressions.h"
|
2015-03-24 03:32:43 +08:00
|
|
|
#include "llvm/Analysis/TargetLibraryInfo.h"
|
2018-06-05 05:23:21 +08:00
|
|
|
#include "llvm/Transforms/Utils/Local.h"
|
2013-11-17 07:59:05 +08:00
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|
|
#include "llvm/Analysis/ValueTracking.h"
|
2017-10-19 05:46:47 +08:00
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|
|
#include "llvm/IR/BasicBlock.h"
|
|
|
|
#include "llvm/IR/Constants.h"
|
2013-11-17 07:59:05 +08:00
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|
#include "llvm/IR/DataLayout.h"
|
2017-10-19 05:46:47 +08:00
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|
|
#include "llvm/IR/DerivedTypes.h"
|
2014-01-13 17:26:24 +08:00
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|
#include "llvm/IR/Dominators.h"
|
2017-10-19 05:46:47 +08:00
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|
#include "llvm/IR/IRBuilder.h"
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#include "llvm/IR/InstrTypes.h"
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|
#include "llvm/IR/Instruction.h"
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|
#include "llvm/IR/Instructions.h"
|
2013-11-17 07:59:05 +08:00
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|
#include "llvm/IR/IntrinsicInst.h"
|
2017-10-19 05:46:47 +08:00
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|
#include "llvm/IR/Intrinsics.h"
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|
#include "llvm/IR/Module.h"
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|
#include "llvm/IR/Type.h"
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|
#include "llvm/IR/Use.h"
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#include "llvm/IR/User.h"
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#include "llvm/IR/Value.h"
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#include "llvm/Pass.h"
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|
#include "llvm/Support/Casting.h"
|
2013-11-17 07:59:05 +08:00
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|
#include "llvm/Support/CommandLine.h"
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|
#include "llvm/Support/Debug.h"
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|
#include "llvm/Support/raw_ostream.h"
|
2017-06-06 19:49:48 +08:00
|
|
|
#include "llvm/Transforms/Scalar.h"
|
2018-03-29 01:44:36 +08:00
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|
#include "llvm/Transforms/Utils.h"
|
2013-11-17 07:59:05 +08:00
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|
#include "llvm/Transforms/Utils/BasicBlockUtils.h"
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|
#include "llvm/Transforms/Utils/LoopUtils.h"
|
2017-10-19 05:46:47 +08:00
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|
#include <cassert>
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|
#include <cstddef>
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#include <cstdint>
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|
#include <cstdlib>
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|
#include <iterator>
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#include <map>
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|
#include <utility>
|
2013-11-17 07:59:05 +08:00
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using namespace llvm;
|
|
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|
|
2014-04-22 10:55:47 +08:00
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|
#define DEBUG_TYPE "loop-reroll"
|
|
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|
2013-11-17 07:59:05 +08:00
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|
|
STATISTIC(NumRerolledLoops, "Number of rerolled loops");
|
|
|
|
|
2015-02-12 23:54:14 +08:00
|
|
|
static cl::opt<unsigned>
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|
|
NumToleratedFailedMatches("reroll-num-tolerated-failed-matches", cl::init(400),
|
|
|
|
cl::Hidden,
|
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|
|
cl::desc("The maximum number of failures to tolerate"
|
|
|
|
" during fuzzy matching. (default: 400)"));
|
|
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|
2013-11-17 07:59:05 +08:00
|
|
|
// This loop re-rolling transformation aims to transform loops like this:
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|
|
|
//
|
|
|
|
// int foo(int a);
|
|
|
|
// void bar(int *x) {
|
|
|
|
// for (int i = 0; i < 500; i += 3) {
|
|
|
|
// foo(i);
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|
|
// foo(i+1);
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|
|
|
// foo(i+2);
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|
|
|
// }
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|
|
// }
|
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|
//
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|
|
|
// into a loop like this:
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|
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|
//
|
|
|
|
// void bar(int *x) {
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|
|
|
// for (int i = 0; i < 500; ++i)
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|
|
|
// foo(i);
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|
|
|
// }
|
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|
//
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|
|
|
// It does this by looking for loops that, besides the latch code, are composed
|
|
|
|
// of isomorphic DAGs of instructions, with each DAG rooted at some increment
|
|
|
|
// to the induction variable, and where each DAG is isomorphic to the DAG
|
|
|
|
// rooted at the induction variable (excepting the sub-DAGs which root the
|
|
|
|
// other induction-variable increments). In other words, we're looking for loop
|
|
|
|
// bodies of the form:
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|
|
|
//
|
|
|
|
// %iv = phi [ (preheader, ...), (body, %iv.next) ]
|
|
|
|
// f(%iv)
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|
|
|
// %iv.1 = add %iv, 1 <-- a root increment
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|
|
|
// f(%iv.1)
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|
|
|
// %iv.2 = add %iv, 2 <-- a root increment
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|
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|
// f(%iv.2)
|
|
|
|
// %iv.scale_m_1 = add %iv, scale-1 <-- a root increment
|
|
|
|
// f(%iv.scale_m_1)
|
|
|
|
// ...
|
|
|
|
// %iv.next = add %iv, scale
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|
|
|
// %cmp = icmp(%iv, ...)
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|
|
|
// br %cmp, header, exit
|
|
|
|
//
|
|
|
|
// where each f(i) is a set of instructions that, collectively, are a function
|
|
|
|
// only of i (and other loop-invariant values).
|
|
|
|
//
|
|
|
|
// As a special case, we can also reroll loops like this:
|
|
|
|
//
|
|
|
|
// int foo(int);
|
|
|
|
// void bar(int *x) {
|
|
|
|
// for (int i = 0; i < 500; ++i) {
|
|
|
|
// x[3*i] = foo(0);
|
|
|
|
// x[3*i+1] = foo(0);
|
|
|
|
// x[3*i+2] = foo(0);
|
|
|
|
// }
|
|
|
|
// }
|
|
|
|
//
|
|
|
|
// into this:
|
|
|
|
//
|
|
|
|
// void bar(int *x) {
|
|
|
|
// for (int i = 0; i < 1500; ++i)
|
|
|
|
// x[i] = foo(0);
|
|
|
|
// }
|
|
|
|
//
|
|
|
|
// in which case, we're looking for inputs like this:
|
|
|
|
//
|
|
|
|
// %iv = phi [ (preheader, ...), (body, %iv.next) ]
|
|
|
|
// %scaled.iv = mul %iv, scale
|
|
|
|
// f(%scaled.iv)
|
|
|
|
// %scaled.iv.1 = add %scaled.iv, 1
|
|
|
|
// f(%scaled.iv.1)
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|
|
|
// %scaled.iv.2 = add %scaled.iv, 2
|
|
|
|
// f(%scaled.iv.2)
|
|
|
|
// %scaled.iv.scale_m_1 = add %scaled.iv, scale-1
|
|
|
|
// f(%scaled.iv.scale_m_1)
|
|
|
|
// ...
|
|
|
|
// %iv.next = add %iv, 1
|
|
|
|
// %cmp = icmp(%iv, ...)
|
|
|
|
// br %cmp, header, exit
|
|
|
|
|
|
|
|
namespace {
|
2017-10-19 05:46:47 +08:00
|
|
|
|
2015-01-30 05:52:03 +08:00
|
|
|
enum IterationLimits {
|
2016-02-22 17:38:28 +08:00
|
|
|
/// The maximum number of iterations that we'll try and reroll.
|
|
|
|
IL_MaxRerollIterations = 32,
|
2015-01-30 05:52:03 +08:00
|
|
|
/// The bitvector index used by loop induction variables and other
|
2015-02-11 17:19:47 +08:00
|
|
|
/// instructions that belong to all iterations.
|
|
|
|
IL_All,
|
2015-01-30 05:52:03 +08:00
|
|
|
IL_End
|
|
|
|
};
|
|
|
|
|
2013-11-17 07:59:05 +08:00
|
|
|
class LoopReroll : public LoopPass {
|
|
|
|
public:
|
|
|
|
static char ID; // Pass ID, replacement for typeid
|
2017-10-19 05:46:47 +08:00
|
|
|
|
2013-11-17 07:59:05 +08:00
|
|
|
LoopReroll() : LoopPass(ID) {
|
|
|
|
initializeLoopRerollPass(*PassRegistry::getPassRegistry());
|
|
|
|
}
|
|
|
|
|
2014-03-05 17:10:37 +08:00
|
|
|
bool runOnLoop(Loop *L, LPPassManager &LPM) override;
|
2013-11-17 07:59:05 +08:00
|
|
|
|
2014-03-05 17:10:37 +08:00
|
|
|
void getAnalysisUsage(AnalysisUsage &AU) const override {
|
2015-01-15 18:41:28 +08:00
|
|
|
AU.addRequired<TargetLibraryInfoWrapperPass>();
|
[LPM] Factor all of the loop analysis usage updates into a common helper
routine.
We were getting this wrong in small ways and generally being very
inconsistent about it across loop passes. Instead, let's have a common
place where we do this. One minor downside is that this will require
some analyses like SCEV in more places than they are strictly needed.
However, this seems benign as these analyses are complete no-ops, and
without this consistency we can in many cases end up with the legacy
pass manager scheduling deciding to split up a loop pass pipeline in
order to run the function analysis half-way through. It is very, very
annoying to fix these without just being very pedantic across the board.
The only loop passes I've not updated here are ones that use
AU.setPreservesAll() such as IVUsers (an analysis) and the pass printer.
They seemed less relevant.
With this patch, almost all of the problems in PR24804 around loop pass
pipelines are fixed. The one remaining issue is that we run simplify-cfg
and instcombine in the middle of the loop pass pipeline. We've recently
added some loop variants of these passes that would seem substantially
cleaner to use, but this at least gets us much closer to the previous
state. Notably, the seven loop pass managers is down to three.
I've not updated the loop passes using LoopAccessAnalysis because that
analysis hasn't been fully wired into LoopSimplify/LCSSA, and it isn't
clear that those transforms want to support those forms anyways. They
all run late anyways, so this is harmless. Similarly, LSR is left alone
because it already carefully manages its forms and doesn't need to get
fused into a single loop pass manager with a bunch of other loop passes.
LoopReroll didn't use loop simplified form previously, and I've updated
the test case to match the trivially different output.
Finally, I've also factored all the pass initialization for the passes
that use this technique as well, so that should be done regularly and
reliably.
Thanks to James for the help reviewing and thinking about this stuff,
and Ben for help thinking about it as well!
Differential Revision: http://reviews.llvm.org/D17435
llvm-svn: 261316
2016-02-19 18:45:18 +08:00
|
|
|
getLoopAnalysisUsage(AU);
|
2013-11-17 07:59:05 +08:00
|
|
|
}
|
|
|
|
|
2015-01-30 05:52:03 +08:00
|
|
|
protected:
|
2013-11-17 07:59:05 +08:00
|
|
|
AliasAnalysis *AA;
|
|
|
|
LoopInfo *LI;
|
|
|
|
ScalarEvolution *SE;
|
|
|
|
TargetLibraryInfo *TLI;
|
|
|
|
DominatorTree *DT;
|
2015-12-16 03:40:57 +08:00
|
|
|
bool PreserveLCSSA;
|
2013-11-17 07:59:05 +08:00
|
|
|
|
2017-10-19 05:46:47 +08:00
|
|
|
using SmallInstructionVector = SmallVector<Instruction *, 16>;
|
2018-06-09 13:04:20 +08:00
|
|
|
using SmallInstructionSet = SmallPtrSet<Instruction *, 16>;
|
2013-11-17 07:59:05 +08:00
|
|
|
|
2015-07-25 06:01:49 +08:00
|
|
|
// Map between induction variable and its increment
|
|
|
|
DenseMap<Instruction *, int64_t> IVToIncMap;
|
2017-10-19 05:46:47 +08:00
|
|
|
|
2016-04-30 08:51:22 +08:00
|
|
|
// For loop with multiple induction variable, remember the one used only to
|
|
|
|
// control the loop.
|
|
|
|
Instruction *LoopControlIV;
|
2015-07-25 06:01:49 +08:00
|
|
|
|
|
|
|
// A chain of isomorphic instructions, identified by a single-use PHI
|
2013-11-17 07:59:05 +08:00
|
|
|
// representing a reduction. Only the last value may be used outside the
|
|
|
|
// loop.
|
|
|
|
struct SimpleLoopReduction {
|
2017-10-19 05:46:47 +08:00
|
|
|
SimpleLoopReduction(Instruction *P, Loop *L) : Instructions(1, P) {
|
2013-11-17 07:59:05 +08:00
|
|
|
assert(isa<PHINode>(P) && "First reduction instruction must be a PHI");
|
|
|
|
add(L);
|
|
|
|
}
|
|
|
|
|
|
|
|
bool valid() const {
|
|
|
|
return Valid;
|
|
|
|
}
|
|
|
|
|
|
|
|
Instruction *getPHI() const {
|
|
|
|
assert(Valid && "Using invalid reduction");
|
|
|
|
return Instructions.front();
|
|
|
|
}
|
|
|
|
|
|
|
|
Instruction *getReducedValue() const {
|
|
|
|
assert(Valid && "Using invalid reduction");
|
|
|
|
return Instructions.back();
|
|
|
|
}
|
|
|
|
|
|
|
|
Instruction *get(size_t i) const {
|
|
|
|
assert(Valid && "Using invalid reduction");
|
|
|
|
return Instructions[i+1];
|
|
|
|
}
|
|
|
|
|
|
|
|
Instruction *operator [] (size_t i) const { return get(i); }
|
|
|
|
|
|
|
|
// The size, ignoring the initial PHI.
|
|
|
|
size_t size() const {
|
|
|
|
assert(Valid && "Using invalid reduction");
|
|
|
|
return Instructions.size()-1;
|
|
|
|
}
|
|
|
|
|
2017-10-19 05:46:47 +08:00
|
|
|
using iterator = SmallInstructionVector::iterator;
|
|
|
|
using const_iterator = SmallInstructionVector::const_iterator;
|
2013-11-17 07:59:05 +08:00
|
|
|
|
|
|
|
iterator begin() {
|
|
|
|
assert(Valid && "Using invalid reduction");
|
2014-03-02 20:27:27 +08:00
|
|
|
return std::next(Instructions.begin());
|
2013-11-17 07:59:05 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
const_iterator begin() const {
|
|
|
|
assert(Valid && "Using invalid reduction");
|
2014-03-02 20:27:27 +08:00
|
|
|
return std::next(Instructions.begin());
|
2013-11-17 07:59:05 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
iterator end() { return Instructions.end(); }
|
|
|
|
const_iterator end() const { return Instructions.end(); }
|
|
|
|
|
|
|
|
protected:
|
2017-10-19 05:46:47 +08:00
|
|
|
bool Valid = false;
|
2013-11-17 07:59:05 +08:00
|
|
|
SmallInstructionVector Instructions;
|
|
|
|
|
|
|
|
void add(Loop *L);
|
|
|
|
};
|
|
|
|
|
|
|
|
// The set of all reductions, and state tracking of possible reductions
|
|
|
|
// during loop instruction processing.
|
|
|
|
struct ReductionTracker {
|
2017-10-19 05:46:47 +08:00
|
|
|
using SmallReductionVector = SmallVector<SimpleLoopReduction, 16>;
|
2013-11-17 07:59:05 +08:00
|
|
|
|
|
|
|
// Add a new possible reduction.
|
2014-10-28 19:54:52 +08:00
|
|
|
void addSLR(SimpleLoopReduction &SLR) { PossibleReds.push_back(SLR); }
|
2013-11-17 07:59:05 +08:00
|
|
|
|
|
|
|
// Setup to track possible reductions corresponding to the provided
|
|
|
|
// rerolling scale. Only reductions with a number of non-PHI instructions
|
|
|
|
// that is divisible by the scale are considered. Three instructions sets
|
|
|
|
// are filled in:
|
|
|
|
// - A set of all possible instructions in eligible reductions.
|
|
|
|
// - A set of all PHIs in eligible reductions
|
2014-10-28 19:54:52 +08:00
|
|
|
// - A set of all reduced values (last instructions) in eligible
|
|
|
|
// reductions.
|
2013-11-17 07:59:05 +08:00
|
|
|
void restrictToScale(uint64_t Scale,
|
|
|
|
SmallInstructionSet &PossibleRedSet,
|
|
|
|
SmallInstructionSet &PossibleRedPHISet,
|
|
|
|
SmallInstructionSet &PossibleRedLastSet) {
|
|
|
|
PossibleRedIdx.clear();
|
|
|
|
PossibleRedIter.clear();
|
|
|
|
Reds.clear();
|
|
|
|
|
|
|
|
for (unsigned i = 0, e = PossibleReds.size(); i != e; ++i)
|
|
|
|
if (PossibleReds[i].size() % Scale == 0) {
|
|
|
|
PossibleRedLastSet.insert(PossibleReds[i].getReducedValue());
|
|
|
|
PossibleRedPHISet.insert(PossibleReds[i].getPHI());
|
2014-10-28 19:53:30 +08:00
|
|
|
|
2013-11-17 07:59:05 +08:00
|
|
|
PossibleRedSet.insert(PossibleReds[i].getPHI());
|
|
|
|
PossibleRedIdx[PossibleReds[i].getPHI()] = i;
|
2014-10-28 19:54:05 +08:00
|
|
|
for (Instruction *J : PossibleReds[i]) {
|
|
|
|
PossibleRedSet.insert(J);
|
|
|
|
PossibleRedIdx[J] = i;
|
2013-11-17 07:59:05 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
// The functions below are used while processing the loop instructions.
|
|
|
|
|
|
|
|
// Are the two instructions both from reductions, and furthermore, from
|
|
|
|
// the same reduction?
|
|
|
|
bool isPairInSame(Instruction *J1, Instruction *J2) {
|
|
|
|
DenseMap<Instruction *, int>::iterator J1I = PossibleRedIdx.find(J1);
|
|
|
|
if (J1I != PossibleRedIdx.end()) {
|
|
|
|
DenseMap<Instruction *, int>::iterator J2I = PossibleRedIdx.find(J2);
|
|
|
|
if (J2I != PossibleRedIdx.end() && J1I->second == J2I->second)
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
// The two provided instructions, the first from the base iteration, and
|
|
|
|
// the second from iteration i, form a matched pair. If these are part of
|
|
|
|
// a reduction, record that fact.
|
|
|
|
void recordPair(Instruction *J1, Instruction *J2, unsigned i) {
|
|
|
|
if (PossibleRedIdx.count(J1)) {
|
|
|
|
assert(PossibleRedIdx.count(J2) &&
|
|
|
|
"Recording reduction vs. non-reduction instruction?");
|
|
|
|
|
|
|
|
PossibleRedIter[J1] = 0;
|
|
|
|
PossibleRedIter[J2] = i;
|
|
|
|
|
|
|
|
int Idx = PossibleRedIdx[J1];
|
|
|
|
assert(Idx == PossibleRedIdx[J2] &&
|
|
|
|
"Recording pair from different reductions?");
|
2013-11-17 09:21:54 +08:00
|
|
|
Reds.insert(Idx);
|
2013-11-17 07:59:05 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
// The functions below can be called after we've finished processing all
|
|
|
|
// instructions in the loop, and we know which reductions were selected.
|
|
|
|
|
|
|
|
bool validateSelected();
|
|
|
|
void replaceSelected();
|
|
|
|
|
|
|
|
protected:
|
|
|
|
// The vector of all possible reductions (for any scale).
|
|
|
|
SmallReductionVector PossibleReds;
|
|
|
|
|
|
|
|
DenseMap<Instruction *, int> PossibleRedIdx;
|
|
|
|
DenseMap<Instruction *, int> PossibleRedIter;
|
|
|
|
DenseSet<int> Reds;
|
|
|
|
};
|
|
|
|
|
2015-02-11 17:19:47 +08:00
|
|
|
// A DAGRootSet models an induction variable being used in a rerollable
|
|
|
|
// loop. For example,
|
|
|
|
//
|
|
|
|
// x[i*3+0] = y1
|
|
|
|
// x[i*3+1] = y2
|
|
|
|
// x[i*3+2] = y3
|
|
|
|
//
|
2015-07-25 06:01:49 +08:00
|
|
|
// Base instruction -> i*3
|
2015-02-11 17:19:47 +08:00
|
|
|
// +---+----+
|
|
|
|
// / | \
|
|
|
|
// ST[y1] +1 +2 <-- Roots
|
|
|
|
// | |
|
|
|
|
// ST[y2] ST[y3]
|
|
|
|
//
|
|
|
|
// There may be multiple DAGRoots, for example:
|
|
|
|
//
|
|
|
|
// x[i*2+0] = ... (1)
|
|
|
|
// x[i*2+1] = ... (1)
|
|
|
|
// x[i*2+4] = ... (2)
|
|
|
|
// x[i*2+5] = ... (2)
|
|
|
|
// x[(i+1234)*2+5678] = ... (3)
|
|
|
|
// x[(i+1234)*2+5679] = ... (3)
|
|
|
|
//
|
|
|
|
// The loop will be rerolled by adding a new loop induction variable,
|
|
|
|
// one for the Base instruction in each DAGRootSet.
|
|
|
|
//
|
|
|
|
struct DAGRootSet {
|
|
|
|
Instruction *BaseInst;
|
|
|
|
SmallInstructionVector Roots;
|
2017-10-19 05:46:47 +08:00
|
|
|
|
2015-02-11 17:19:47 +08:00
|
|
|
// The instructions between IV and BaseInst (but not including BaseInst).
|
|
|
|
SmallInstructionSet SubsumedInsts;
|
|
|
|
};
|
|
|
|
|
2015-01-29 21:48:05 +08:00
|
|
|
// The set of all DAG roots, and state tracking of all roots
|
|
|
|
// for a particular induction variable.
|
|
|
|
struct DAGRootTracker {
|
|
|
|
DAGRootTracker(LoopReroll *Parent, Loop *L, Instruction *IV,
|
|
|
|
ScalarEvolution *SE, AliasAnalysis *AA,
|
2015-12-16 03:40:57 +08:00
|
|
|
TargetLibraryInfo *TLI, DominatorTree *DT, LoopInfo *LI,
|
|
|
|
bool PreserveLCSSA,
|
2016-04-30 08:51:22 +08:00
|
|
|
DenseMap<Instruction *, int64_t> &IncrMap,
|
|
|
|
Instruction *LoopCtrlIV)
|
2015-12-16 03:40:57 +08:00
|
|
|
: Parent(Parent), L(L), SE(SE), AA(AA), TLI(TLI), DT(DT), LI(LI),
|
2016-04-30 08:51:22 +08:00
|
|
|
PreserveLCSSA(PreserveLCSSA), IV(IV), IVToIncMap(IncrMap),
|
|
|
|
LoopControlIV(LoopCtrlIV) {}
|
2015-01-29 21:48:05 +08:00
|
|
|
|
|
|
|
/// Stage 1: Find all the DAG roots for the induction variable.
|
|
|
|
bool findRoots();
|
2017-10-19 05:46:47 +08:00
|
|
|
|
2015-01-29 21:48:05 +08:00
|
|
|
/// Stage 2: Validate if the found roots are valid.
|
|
|
|
bool validate(ReductionTracker &Reductions);
|
2017-10-19 05:46:47 +08:00
|
|
|
|
2015-01-29 21:48:05 +08:00
|
|
|
/// Stage 3: Assuming validate() returned true, perform the
|
|
|
|
/// replacement.
|
2018-06-23 06:58:55 +08:00
|
|
|
/// @param BackedgeTakenCount The backedge-taken count of L.
|
|
|
|
void replace(const SCEV *BackedgeTakenCount);
|
2015-01-29 21:48:05 +08:00
|
|
|
|
|
|
|
protected:
|
2017-10-19 05:46:47 +08:00
|
|
|
using UsesTy = MapVector<Instruction *, BitVector>;
|
2015-01-30 05:52:03 +08:00
|
|
|
|
2016-11-22 06:35:34 +08:00
|
|
|
void findRootsRecursive(Instruction *IVU,
|
2015-02-11 17:19:47 +08:00
|
|
|
SmallInstructionSet SubsumedInsts);
|
|
|
|
bool findRootsBase(Instruction *IVU, SmallInstructionSet SubsumedInsts);
|
|
|
|
bool collectPossibleRoots(Instruction *Base,
|
|
|
|
std::map<int64_t,Instruction*> &Roots);
|
2016-11-22 06:35:34 +08:00
|
|
|
bool validateRootSet(DAGRootSet &DRS);
|
2015-01-29 21:48:05 +08:00
|
|
|
|
2015-01-30 05:52:03 +08:00
|
|
|
bool collectUsedInstructions(SmallInstructionSet &PossibleRedSet);
|
2015-01-29 21:48:05 +08:00
|
|
|
void collectInLoopUserSet(const SmallInstructionVector &Roots,
|
|
|
|
const SmallInstructionSet &Exclude,
|
|
|
|
const SmallInstructionSet &Final,
|
|
|
|
DenseSet<Instruction *> &Users);
|
|
|
|
void collectInLoopUserSet(Instruction *Root,
|
|
|
|
const SmallInstructionSet &Exclude,
|
|
|
|
const SmallInstructionSet &Final,
|
|
|
|
DenseSet<Instruction *> &Users);
|
|
|
|
|
2015-02-12 23:54:14 +08:00
|
|
|
UsesTy::iterator nextInstr(int Val, UsesTy &In,
|
|
|
|
const SmallInstructionSet &Exclude,
|
|
|
|
UsesTy::iterator *StartI=nullptr);
|
2015-02-11 17:19:47 +08:00
|
|
|
bool isBaseInst(Instruction *I);
|
|
|
|
bool isRootInst(Instruction *I);
|
2015-02-12 23:54:14 +08:00
|
|
|
bool instrDependsOn(Instruction *I,
|
|
|
|
UsesTy::iterator Start,
|
|
|
|
UsesTy::iterator End);
|
2018-06-23 06:58:55 +08:00
|
|
|
void replaceIV(DAGRootSet &DRS, const SCEV *Start, const SCEV *IncrExpr);
|
2015-01-30 05:52:03 +08:00
|
|
|
|
2015-01-29 21:48:05 +08:00
|
|
|
LoopReroll *Parent;
|
|
|
|
|
|
|
|
// Members of Parent, replicated here for brevity.
|
|
|
|
Loop *L;
|
|
|
|
ScalarEvolution *SE;
|
|
|
|
AliasAnalysis *AA;
|
|
|
|
TargetLibraryInfo *TLI;
|
2015-12-16 03:40:57 +08:00
|
|
|
DominatorTree *DT;
|
|
|
|
LoopInfo *LI;
|
|
|
|
bool PreserveLCSSA;
|
2015-01-29 21:48:05 +08:00
|
|
|
|
|
|
|
// The loop induction variable.
|
|
|
|
Instruction *IV;
|
2017-10-19 05:46:47 +08:00
|
|
|
|
2015-01-29 21:48:05 +08:00
|
|
|
// Loop step amount.
|
2015-07-25 06:01:49 +08:00
|
|
|
int64_t Inc;
|
2017-10-19 05:46:47 +08:00
|
|
|
|
2015-01-29 21:48:05 +08:00
|
|
|
// Loop reroll count; if Inc == 1, this records the scaling applied
|
|
|
|
// to the indvar: a[i*2+0] = ...; a[i*2+1] = ... ;
|
|
|
|
// If Inc is not 1, Scale = Inc.
|
|
|
|
uint64_t Scale;
|
2017-10-19 05:46:47 +08:00
|
|
|
|
2015-01-29 21:48:05 +08:00
|
|
|
// The roots themselves.
|
2015-02-11 17:19:47 +08:00
|
|
|
SmallVector<DAGRootSet,16> RootSets;
|
2017-10-19 05:46:47 +08:00
|
|
|
|
2015-01-29 21:48:05 +08:00
|
|
|
// All increment instructions for IV.
|
|
|
|
SmallInstructionVector LoopIncs;
|
2017-10-19 05:46:47 +08:00
|
|
|
|
2015-01-30 05:52:03 +08:00
|
|
|
// Map of all instructions in the loop (in order) to the iterations
|
2015-02-11 17:19:47 +08:00
|
|
|
// they are used in (or specially, IL_All for instructions
|
2015-01-30 05:52:03 +08:00
|
|
|
// used in the loop increment mechanism).
|
|
|
|
UsesTy Uses;
|
2017-10-19 05:46:47 +08:00
|
|
|
|
2015-07-25 06:01:49 +08:00
|
|
|
// Map between induction variable and its increment
|
|
|
|
DenseMap<Instruction *, int64_t> &IVToIncMap;
|
2017-10-19 05:46:47 +08:00
|
|
|
|
2016-04-30 08:51:22 +08:00
|
|
|
Instruction *LoopControlIV;
|
2015-01-29 21:48:05 +08:00
|
|
|
};
|
|
|
|
|
2016-04-30 08:51:22 +08:00
|
|
|
// Check if it is a compare-like instruction whose user is a branch
|
|
|
|
bool isCompareUsedByBranch(Instruction *I) {
|
|
|
|
auto *TI = I->getParent()->getTerminator();
|
|
|
|
if (!isa<BranchInst>(TI) || !isa<CmpInst>(I))
|
|
|
|
return false;
|
|
|
|
return I->hasOneUse() && TI->getOperand(0) == I;
|
|
|
|
};
|
|
|
|
|
|
|
|
bool isLoopControlIV(Loop *L, Instruction *IV);
|
2013-11-17 07:59:05 +08:00
|
|
|
void collectPossibleIVs(Loop *L, SmallInstructionVector &PossibleIVs);
|
|
|
|
void collectPossibleReductions(Loop *L,
|
|
|
|
ReductionTracker &Reductions);
|
2018-06-23 06:58:55 +08:00
|
|
|
bool reroll(Instruction *IV, Loop *L, BasicBlock *Header,
|
|
|
|
const SCEV *BackedgeTakenCount, ReductionTracker &Reductions);
|
2013-11-17 07:59:05 +08:00
|
|
|
};
|
2017-10-19 05:46:47 +08:00
|
|
|
|
|
|
|
} // end anonymous namespace
|
2013-11-17 07:59:05 +08:00
|
|
|
|
|
|
|
char LoopReroll::ID = 0;
|
2017-10-19 05:46:47 +08:00
|
|
|
|
2013-11-17 07:59:05 +08:00
|
|
|
INITIALIZE_PASS_BEGIN(LoopReroll, "loop-reroll", "Reroll loops", false, false)
|
[LPM] Factor all of the loop analysis usage updates into a common helper
routine.
We were getting this wrong in small ways and generally being very
inconsistent about it across loop passes. Instead, let's have a common
place where we do this. One minor downside is that this will require
some analyses like SCEV in more places than they are strictly needed.
However, this seems benign as these analyses are complete no-ops, and
without this consistency we can in many cases end up with the legacy
pass manager scheduling deciding to split up a loop pass pipeline in
order to run the function analysis half-way through. It is very, very
annoying to fix these without just being very pedantic across the board.
The only loop passes I've not updated here are ones that use
AU.setPreservesAll() such as IVUsers (an analysis) and the pass printer.
They seemed less relevant.
With this patch, almost all of the problems in PR24804 around loop pass
pipelines are fixed. The one remaining issue is that we run simplify-cfg
and instcombine in the middle of the loop pass pipeline. We've recently
added some loop variants of these passes that would seem substantially
cleaner to use, but this at least gets us much closer to the previous
state. Notably, the seven loop pass managers is down to three.
I've not updated the loop passes using LoopAccessAnalysis because that
analysis hasn't been fully wired into LoopSimplify/LCSSA, and it isn't
clear that those transforms want to support those forms anyways. They
all run late anyways, so this is harmless. Similarly, LSR is left alone
because it already carefully manages its forms and doesn't need to get
fused into a single loop pass manager with a bunch of other loop passes.
LoopReroll didn't use loop simplified form previously, and I've updated
the test case to match the trivially different output.
Finally, I've also factored all the pass initialization for the passes
that use this technique as well, so that should be done regularly and
reliably.
Thanks to James for the help reviewing and thinking about this stuff,
and Ben for help thinking about it as well!
Differential Revision: http://reviews.llvm.org/D17435
llvm-svn: 261316
2016-02-19 18:45:18 +08:00
|
|
|
INITIALIZE_PASS_DEPENDENCY(LoopPass)
|
2015-01-15 18:41:28 +08:00
|
|
|
INITIALIZE_PASS_DEPENDENCY(TargetLibraryInfoWrapperPass)
|
2013-11-17 07:59:05 +08:00
|
|
|
INITIALIZE_PASS_END(LoopReroll, "loop-reroll", "Reroll loops", false, false)
|
|
|
|
|
|
|
|
Pass *llvm::createLoopRerollPass() {
|
|
|
|
return new LoopReroll;
|
|
|
|
}
|
|
|
|
|
|
|
|
// Returns true if the provided instruction is used outside the given loop.
|
|
|
|
// This operates like Instruction::isUsedOutsideOfBlock, but considers PHIs in
|
|
|
|
// non-loop blocks to be outside the loop.
|
|
|
|
static bool hasUsesOutsideLoop(Instruction *I, Loop *L) {
|
2015-01-30 05:52:03 +08:00
|
|
|
for (User *U : I->users()) {
|
2014-03-09 11:16:01 +08:00
|
|
|
if (!L->contains(cast<Instruction>(U)))
|
2013-11-17 07:59:05 +08:00
|
|
|
return true;
|
2015-01-30 05:52:03 +08:00
|
|
|
}
|
2013-11-17 07:59:05 +08:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2016-04-30 08:51:22 +08:00
|
|
|
// Check if an IV is only used to control the loop. There are two cases:
|
|
|
|
// 1. It only has one use which is loop increment, and the increment is only
|
2016-05-11 05:16:49 +08:00
|
|
|
// used by comparison and the PHI (could has sext with nsw in between), and the
|
|
|
|
// comparison is only used by branch.
|
2016-04-30 08:51:22 +08:00
|
|
|
// 2. It is used by loop increment and the comparison, the loop increment is
|
|
|
|
// only used by the PHI, and the comparison is used only by the branch.
|
|
|
|
bool LoopReroll::isLoopControlIV(Loop *L, Instruction *IV) {
|
|
|
|
unsigned IVUses = IV->getNumUses();
|
|
|
|
if (IVUses != 2 && IVUses != 1)
|
|
|
|
return false;
|
|
|
|
|
|
|
|
for (auto *User : IV->users()) {
|
|
|
|
int32_t IncOrCmpUses = User->getNumUses();
|
|
|
|
bool IsCompInst = isCompareUsedByBranch(cast<Instruction>(User));
|
|
|
|
|
|
|
|
// User can only have one or two uses.
|
|
|
|
if (IncOrCmpUses != 2 && IncOrCmpUses != 1)
|
|
|
|
return false;
|
|
|
|
|
|
|
|
// Case 1
|
|
|
|
if (IVUses == 1) {
|
|
|
|
// The only user must be the loop increment.
|
|
|
|
// The loop increment must have two uses.
|
|
|
|
if (IsCompInst || IncOrCmpUses != 2)
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
// Case 2
|
|
|
|
if (IVUses == 2 && IncOrCmpUses != 1)
|
|
|
|
return false;
|
|
|
|
|
|
|
|
// The users of the IV must be a binary operation or a comparison
|
|
|
|
if (auto *BO = dyn_cast<BinaryOperator>(User)) {
|
|
|
|
if (BO->getOpcode() == Instruction::Add) {
|
|
|
|
// Loop Increment
|
|
|
|
// User of Loop Increment should be either PHI or CMP
|
|
|
|
for (auto *UU : User->users()) {
|
|
|
|
if (PHINode *PN = dyn_cast<PHINode>(UU)) {
|
|
|
|
if (PN != IV)
|
|
|
|
return false;
|
|
|
|
}
|
2016-05-11 05:16:49 +08:00
|
|
|
// Must be a CMP or an ext (of a value with nsw) then CMP
|
|
|
|
else {
|
|
|
|
Instruction *UUser = dyn_cast<Instruction>(UU);
|
|
|
|
// Skip SExt if we are extending an nsw value
|
|
|
|
// TODO: Allow ZExt too
|
2017-04-18 22:55:43 +08:00
|
|
|
if (BO->hasNoSignedWrap() && UUser && UUser->hasOneUse() &&
|
2016-05-11 05:16:49 +08:00
|
|
|
isa<SExtInst>(UUser))
|
|
|
|
UUser = dyn_cast<Instruction>(*(UUser->user_begin()));
|
|
|
|
if (!isCompareUsedByBranch(UUser))
|
|
|
|
return false;
|
|
|
|
}
|
2016-04-30 08:51:22 +08:00
|
|
|
}
|
|
|
|
} else
|
|
|
|
return false;
|
|
|
|
// Compare : can only have one use, and must be branch
|
|
|
|
} else if (!IsCompInst)
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2013-11-17 07:59:05 +08:00
|
|
|
// Collect the list of loop induction variables with respect to which it might
|
|
|
|
// be possible to reroll the loop.
|
|
|
|
void LoopReroll::collectPossibleIVs(Loop *L,
|
|
|
|
SmallInstructionVector &PossibleIVs) {
|
|
|
|
BasicBlock *Header = L->getHeader();
|
|
|
|
for (BasicBlock::iterator I = Header->begin(),
|
|
|
|
IE = Header->getFirstInsertionPt(); I != IE; ++I) {
|
|
|
|
if (!isa<PHINode>(I))
|
|
|
|
continue;
|
2016-01-26 03:43:45 +08:00
|
|
|
if (!I->getType()->isIntegerTy() && !I->getType()->isPointerTy())
|
2013-11-17 07:59:05 +08:00
|
|
|
continue;
|
|
|
|
|
|
|
|
if (const SCEVAddRecExpr *PHISCEV =
|
2015-10-14 03:26:58 +08:00
|
|
|
dyn_cast<SCEVAddRecExpr>(SE->getSCEV(&*I))) {
|
2013-11-17 07:59:05 +08:00
|
|
|
if (PHISCEV->getLoop() != L)
|
|
|
|
continue;
|
|
|
|
if (!PHISCEV->isAffine())
|
|
|
|
continue;
|
2018-06-23 06:58:55 +08:00
|
|
|
auto IncSCEV = dyn_cast<SCEVConstant>(PHISCEV->getStepRecurrence(*SE));
|
2016-01-26 03:43:45 +08:00
|
|
|
if (IncSCEV) {
|
2015-10-14 03:26:58 +08:00
|
|
|
IVToIncMap[&*I] = IncSCEV->getValue()->getSExtValue();
|
2018-05-14 20:53:11 +08:00
|
|
|
LLVM_DEBUG(dbgs() << "LRR: Possible IV: " << *I << " = " << *PHISCEV
|
|
|
|
<< "\n");
|
2016-04-30 08:51:22 +08:00
|
|
|
|
|
|
|
if (isLoopControlIV(L, &*I)) {
|
|
|
|
assert(!LoopControlIV && "Found two loop control only IV");
|
|
|
|
LoopControlIV = &(*I);
|
2018-05-14 20:53:11 +08:00
|
|
|
LLVM_DEBUG(dbgs() << "LRR: Possible loop control only IV: " << *I
|
|
|
|
<< " = " << *PHISCEV << "\n");
|
2016-04-30 08:51:22 +08:00
|
|
|
} else
|
|
|
|
PossibleIVs.push_back(&*I);
|
2013-11-17 07:59:05 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
// Add the remainder of the reduction-variable chain to the instruction vector
|
|
|
|
// (the initial PHINode has already been added). If successful, the object is
|
|
|
|
// marked as valid.
|
|
|
|
void LoopReroll::SimpleLoopReduction::add(Loop *L) {
|
|
|
|
assert(!Valid && "Cannot add to an already-valid chain");
|
|
|
|
|
|
|
|
// The reduction variable must be a chain of single-use instructions
|
|
|
|
// (including the PHI), except for the last value (which is used by the PHI
|
|
|
|
// and also outside the loop).
|
|
|
|
Instruction *C = Instructions.front();
|
2015-02-17 01:01:52 +08:00
|
|
|
if (C->user_empty())
|
|
|
|
return;
|
2013-11-17 07:59:05 +08:00
|
|
|
|
|
|
|
do {
|
2014-03-09 11:16:01 +08:00
|
|
|
C = cast<Instruction>(*C->user_begin());
|
2013-11-17 07:59:05 +08:00
|
|
|
if (C->hasOneUse()) {
|
|
|
|
if (!C->isBinaryOp())
|
|
|
|
return;
|
|
|
|
|
|
|
|
if (!(isa<PHINode>(Instructions.back()) ||
|
|
|
|
C->isSameOperationAs(Instructions.back())))
|
|
|
|
return;
|
|
|
|
|
|
|
|
Instructions.push_back(C);
|
|
|
|
}
|
|
|
|
} while (C->hasOneUse());
|
|
|
|
|
|
|
|
if (Instructions.size() < 2 ||
|
|
|
|
!C->isSameOperationAs(Instructions.back()) ||
|
2014-03-09 11:16:01 +08:00
|
|
|
C->use_empty())
|
2013-11-17 07:59:05 +08:00
|
|
|
return;
|
|
|
|
|
|
|
|
// C is now the (potential) last instruction in the reduction chain.
|
2015-01-30 05:52:03 +08:00
|
|
|
for (User *U : C->users()) {
|
2013-11-17 07:59:05 +08:00
|
|
|
// The only in-loop user can be the initial PHI.
|
2014-03-09 11:16:01 +08:00
|
|
|
if (L->contains(cast<Instruction>(U)))
|
|
|
|
if (cast<Instruction>(U) != Instructions.front())
|
2013-11-17 07:59:05 +08:00
|
|
|
return;
|
2015-01-30 05:52:03 +08:00
|
|
|
}
|
2013-11-17 07:59:05 +08:00
|
|
|
|
|
|
|
Instructions.push_back(C);
|
|
|
|
Valid = true;
|
|
|
|
}
|
|
|
|
|
|
|
|
// Collect the vector of possible reduction variables.
|
|
|
|
void LoopReroll::collectPossibleReductions(Loop *L,
|
|
|
|
ReductionTracker &Reductions) {
|
|
|
|
BasicBlock *Header = L->getHeader();
|
|
|
|
for (BasicBlock::iterator I = Header->begin(),
|
|
|
|
IE = Header->getFirstInsertionPt(); I != IE; ++I) {
|
|
|
|
if (!isa<PHINode>(I))
|
|
|
|
continue;
|
|
|
|
if (!I->getType()->isSingleValueType())
|
|
|
|
continue;
|
|
|
|
|
2015-10-14 03:26:58 +08:00
|
|
|
SimpleLoopReduction SLR(&*I, L);
|
2013-11-17 07:59:05 +08:00
|
|
|
if (!SLR.valid())
|
|
|
|
continue;
|
|
|
|
|
2018-05-14 20:53:11 +08:00
|
|
|
LLVM_DEBUG(dbgs() << "LRR: Possible reduction: " << *I << " (with "
|
|
|
|
<< SLR.size() << " chained instructions)\n");
|
2013-11-17 07:59:05 +08:00
|
|
|
Reductions.addSLR(SLR);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
// Collect the set of all users of the provided root instruction. This set of
|
|
|
|
// users contains not only the direct users of the root instruction, but also
|
|
|
|
// all users of those users, and so on. There are two exceptions:
|
|
|
|
//
|
|
|
|
// 1. Instructions in the set of excluded instructions are never added to the
|
|
|
|
// use set (even if they are users). This is used, for example, to exclude
|
|
|
|
// including root increments in the use set of the primary IV.
|
|
|
|
//
|
|
|
|
// 2. Instructions in the set of final instructions are added to the use set
|
|
|
|
// if they are users, but their users are not added. This is used, for
|
|
|
|
// example, to prevent a reduction update from forcing all later reduction
|
|
|
|
// updates into the use set.
|
2015-01-29 21:48:05 +08:00
|
|
|
void LoopReroll::DAGRootTracker::collectInLoopUserSet(
|
2013-11-17 07:59:05 +08:00
|
|
|
Instruction *Root, const SmallInstructionSet &Exclude,
|
|
|
|
const SmallInstructionSet &Final,
|
|
|
|
DenseSet<Instruction *> &Users) {
|
|
|
|
SmallInstructionVector Queue(1, Root);
|
|
|
|
while (!Queue.empty()) {
|
|
|
|
Instruction *I = Queue.pop_back_val();
|
|
|
|
if (!Users.insert(I).second)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
if (!Final.count(I))
|
2014-03-09 11:16:01 +08:00
|
|
|
for (Use &U : I->uses()) {
|
|
|
|
Instruction *User = cast<Instruction>(U.getUser());
|
2013-11-17 07:59:05 +08:00
|
|
|
if (PHINode *PN = dyn_cast<PHINode>(User)) {
|
|
|
|
// Ignore "wrap-around" uses to PHIs of this loop's header.
|
2014-03-09 11:16:01 +08:00
|
|
|
if (PN->getIncomingBlock(U) == L->getHeader())
|
2013-11-17 07:59:05 +08:00
|
|
|
continue;
|
|
|
|
}
|
2014-10-28 19:53:30 +08:00
|
|
|
|
2013-11-17 07:59:05 +08:00
|
|
|
if (L->contains(User) && !Exclude.count(User)) {
|
|
|
|
Queue.push_back(User);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
// We also want to collect single-user "feeder" values.
|
|
|
|
for (User::op_iterator OI = I->op_begin(),
|
|
|
|
OIE = I->op_end(); OI != OIE; ++OI) {
|
|
|
|
if (Instruction *Op = dyn_cast<Instruction>(*OI))
|
|
|
|
if (Op->hasOneUse() && L->contains(Op) && !Exclude.count(Op) &&
|
|
|
|
!Final.count(Op))
|
|
|
|
Queue.push_back(Op);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
// Collect all of the users of all of the provided root instructions (combined
|
|
|
|
// into a single set).
|
2015-01-29 21:48:05 +08:00
|
|
|
void LoopReroll::DAGRootTracker::collectInLoopUserSet(
|
2013-11-17 07:59:05 +08:00
|
|
|
const SmallInstructionVector &Roots,
|
|
|
|
const SmallInstructionSet &Exclude,
|
|
|
|
const SmallInstructionSet &Final,
|
|
|
|
DenseSet<Instruction *> &Users) {
|
2016-06-26 20:28:59 +08:00
|
|
|
for (Instruction *Root : Roots)
|
|
|
|
collectInLoopUserSet(Root, Exclude, Final, Users);
|
2013-11-17 07:59:05 +08:00
|
|
|
}
|
|
|
|
|
2016-07-19 08:23:54 +08:00
|
|
|
static bool isUnorderedLoadStore(Instruction *I) {
|
2013-11-17 07:59:05 +08:00
|
|
|
if (LoadInst *LI = dyn_cast<LoadInst>(I))
|
2016-07-19 08:23:54 +08:00
|
|
|
return LI->isUnordered();
|
2013-11-17 07:59:05 +08:00
|
|
|
if (StoreInst *SI = dyn_cast<StoreInst>(I))
|
2016-07-19 08:23:54 +08:00
|
|
|
return SI->isUnordered();
|
2013-11-17 07:59:05 +08:00
|
|
|
if (MemIntrinsic *MI = dyn_cast<MemIntrinsic>(I))
|
|
|
|
return !MI->isVolatile();
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2015-02-11 17:19:47 +08:00
|
|
|
/// Return true if IVU is a "simple" arithmetic operation.
|
|
|
|
/// This is used for narrowing the search space for DAGRoots; only arithmetic
|
|
|
|
/// and GEPs can be part of a DAGRoot.
|
|
|
|
static bool isSimpleArithmeticOp(User *IVU) {
|
|
|
|
if (Instruction *I = dyn_cast<Instruction>(IVU)) {
|
|
|
|
switch (I->getOpcode()) {
|
|
|
|
default: return false;
|
|
|
|
case Instruction::Add:
|
|
|
|
case Instruction::Sub:
|
|
|
|
case Instruction::Mul:
|
|
|
|
case Instruction::Shl:
|
|
|
|
case Instruction::AShr:
|
|
|
|
case Instruction::LShr:
|
|
|
|
case Instruction::GetElementPtr:
|
|
|
|
case Instruction::Trunc:
|
|
|
|
case Instruction::ZExt:
|
|
|
|
case Instruction::SExt:
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
2015-01-29 21:48:05 +08:00
|
|
|
|
2015-02-11 17:19:47 +08:00
|
|
|
static bool isLoopIncrement(User *U, Instruction *IV) {
|
|
|
|
BinaryOperator *BO = dyn_cast<BinaryOperator>(U);
|
2016-01-26 03:43:45 +08:00
|
|
|
|
|
|
|
if ((BO && BO->getOpcode() != Instruction::Add) ||
|
|
|
|
(!BO && !isa<GetElementPtrInst>(U)))
|
2015-01-29 21:48:05 +08:00
|
|
|
return false;
|
|
|
|
|
2016-01-26 03:43:45 +08:00
|
|
|
for (auto *UU : U->users()) {
|
2015-02-11 17:19:47 +08:00
|
|
|
PHINode *PN = dyn_cast<PHINode>(UU);
|
|
|
|
if (PN && PN == IV)
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
2015-01-29 21:48:05 +08:00
|
|
|
|
2015-02-11 17:19:47 +08:00
|
|
|
bool LoopReroll::DAGRootTracker::
|
|
|
|
collectPossibleRoots(Instruction *Base, std::map<int64_t,Instruction*> &Roots) {
|
|
|
|
SmallInstructionVector BaseUsers;
|
|
|
|
|
|
|
|
for (auto *I : Base->users()) {
|
|
|
|
ConstantInt *CI = nullptr;
|
|
|
|
|
|
|
|
if (isLoopIncrement(I, IV)) {
|
|
|
|
LoopIncs.push_back(cast<Instruction>(I));
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
|
|
|
// The root nodes must be either GEPs, ORs or ADDs.
|
|
|
|
if (auto *BO = dyn_cast<BinaryOperator>(I)) {
|
|
|
|
if (BO->getOpcode() == Instruction::Add ||
|
|
|
|
BO->getOpcode() == Instruction::Or)
|
|
|
|
CI = dyn_cast<ConstantInt>(BO->getOperand(1));
|
|
|
|
} else if (auto *GEP = dyn_cast<GetElementPtrInst>(I)) {
|
|
|
|
Value *LastOperand = GEP->getOperand(GEP->getNumOperands()-1);
|
|
|
|
CI = dyn_cast<ConstantInt>(LastOperand);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!CI) {
|
|
|
|
if (Instruction *II = dyn_cast<Instruction>(I)) {
|
|
|
|
BaseUsers.push_back(II);
|
|
|
|
continue;
|
|
|
|
} else {
|
2018-05-14 20:53:11 +08:00
|
|
|
LLVM_DEBUG(dbgs() << "LRR: Aborting due to non-instruction: " << *I
|
|
|
|
<< "\n");
|
2015-02-11 17:19:47 +08:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2015-07-25 06:01:49 +08:00
|
|
|
int64_t V = std::abs(CI->getValue().getSExtValue());
|
2015-02-11 17:19:47 +08:00
|
|
|
if (Roots.find(V) != Roots.end())
|
|
|
|
// No duplicates, please.
|
|
|
|
return false;
|
|
|
|
|
|
|
|
Roots[V] = cast<Instruction>(I);
|
|
|
|
}
|
|
|
|
|
2016-11-22 06:35:34 +08:00
|
|
|
// Make sure we have at least two roots.
|
|
|
|
if (Roots.empty() || (Roots.size() == 1 && BaseUsers.empty()))
|
2015-01-30 05:52:03 +08:00
|
|
|
return false;
|
2015-02-11 17:19:47 +08:00
|
|
|
|
|
|
|
// If we found non-loop-inc, non-root users of Base, assume they are
|
|
|
|
// for the zeroth root index. This is because "add %a, 0" gets optimized
|
|
|
|
// away.
|
2015-02-17 01:02:00 +08:00
|
|
|
if (BaseUsers.size()) {
|
|
|
|
if (Roots.find(0) != Roots.end()) {
|
2018-05-14 20:53:11 +08:00
|
|
|
LLVM_DEBUG(dbgs() << "LRR: Multiple roots found for base - aborting!\n");
|
2015-02-17 01:02:00 +08:00
|
|
|
return false;
|
|
|
|
}
|
2015-02-11 17:19:47 +08:00
|
|
|
Roots[0] = Base;
|
2015-02-17 01:02:00 +08:00
|
|
|
}
|
2015-02-11 17:19:47 +08:00
|
|
|
|
|
|
|
// Calculate the number of users of the base, or lowest indexed, iteration.
|
|
|
|
unsigned NumBaseUses = BaseUsers.size();
|
|
|
|
if (NumBaseUses == 0)
|
|
|
|
NumBaseUses = Roots.begin()->second->getNumUses();
|
2015-07-25 06:01:49 +08:00
|
|
|
|
2015-02-11 17:19:47 +08:00
|
|
|
// Check that every node has the same number of users.
|
|
|
|
for (auto &KV : Roots) {
|
|
|
|
if (KV.first == 0)
|
|
|
|
continue;
|
2017-04-19 05:42:21 +08:00
|
|
|
if (!KV.second->hasNUses(NumBaseUses)) {
|
2018-05-14 20:53:11 +08:00
|
|
|
LLVM_DEBUG(dbgs() << "LRR: Aborting - Root and Base #users not the same: "
|
|
|
|
<< "#Base=" << NumBaseUses
|
|
|
|
<< ", #Root=" << KV.second->getNumUses() << "\n");
|
2015-02-11 17:19:47 +08:00
|
|
|
return false;
|
|
|
|
}
|
2015-01-30 05:52:03 +08:00
|
|
|
}
|
|
|
|
|
2015-07-25 06:01:49 +08:00
|
|
|
return true;
|
2015-01-29 21:48:05 +08:00
|
|
|
}
|
|
|
|
|
2016-11-22 06:35:34 +08:00
|
|
|
void LoopReroll::DAGRootTracker::
|
2015-02-11 17:19:47 +08:00
|
|
|
findRootsRecursive(Instruction *I, SmallInstructionSet SubsumedInsts) {
|
|
|
|
// Does the user look like it could be part of a root set?
|
|
|
|
// All its users must be simple arithmetic ops.
|
2017-04-19 05:42:21 +08:00
|
|
|
if (I->hasNUsesOrMore(IL_MaxRerollIterations + 1))
|
2016-11-22 06:35:34 +08:00
|
|
|
return;
|
2013-11-17 07:59:05 +08:00
|
|
|
|
2016-11-22 06:35:34 +08:00
|
|
|
if (I != IV && findRootsBase(I, SubsumedInsts))
|
|
|
|
return;
|
2013-11-17 07:59:05 +08:00
|
|
|
|
2015-02-11 17:19:47 +08:00
|
|
|
SubsumedInsts.insert(I);
|
2013-11-17 07:59:05 +08:00
|
|
|
|
2015-02-11 17:19:47 +08:00
|
|
|
for (User *V : I->users()) {
|
2016-11-22 06:35:34 +08:00
|
|
|
Instruction *I = cast<Instruction>(V);
|
2016-08-12 06:21:41 +08:00
|
|
|
if (is_contained(LoopIncs, I))
|
2015-02-11 17:19:47 +08:00
|
|
|
continue;
|
|
|
|
|
2016-11-22 06:35:34 +08:00
|
|
|
if (!isSimpleArithmeticOp(I))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
// The recursive call makes a copy of SubsumedInsts.
|
|
|
|
findRootsRecursive(I, SubsumedInsts);
|
2015-02-11 17:19:47 +08:00
|
|
|
}
|
2016-11-22 06:35:34 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
bool LoopReroll::DAGRootTracker::validateRootSet(DAGRootSet &DRS) {
|
|
|
|
if (DRS.Roots.empty())
|
|
|
|
return false;
|
|
|
|
|
|
|
|
// Consider a DAGRootSet with N-1 roots (so N different values including
|
|
|
|
// BaseInst).
|
|
|
|
// Define d = Roots[0] - BaseInst, which should be the same as
|
|
|
|
// Roots[I] - Roots[I-1] for all I in [1..N).
|
|
|
|
// Define D = BaseInst@J - BaseInst@J-1, where "@J" means the value at the
|
|
|
|
// loop iteration J.
|
|
|
|
//
|
|
|
|
// Now, For the loop iterations to be consecutive:
|
|
|
|
// D = d * N
|
|
|
|
const auto *ADR = dyn_cast<SCEVAddRecExpr>(SE->getSCEV(DRS.BaseInst));
|
|
|
|
if (!ADR)
|
|
|
|
return false;
|
2019-02-12 08:33:25 +08:00
|
|
|
|
|
|
|
// Check that the first root is evenly spaced.
|
2016-11-22 06:35:34 +08:00
|
|
|
unsigned N = DRS.Roots.size() + 1;
|
|
|
|
const SCEV *StepSCEV = SE->getMinusSCEV(SE->getSCEV(DRS.Roots[0]), ADR);
|
|
|
|
const SCEV *ScaleSCEV = SE->getConstant(StepSCEV->getType(), N);
|
|
|
|
if (ADR->getStepRecurrence(*SE) != SE->getMulExpr(StepSCEV, ScaleSCEV))
|
|
|
|
return false;
|
|
|
|
|
2019-02-12 08:33:25 +08:00
|
|
|
// Check that the remainling roots are evenly spaced.
|
|
|
|
for (unsigned i = 1; i < N - 1; ++i) {
|
|
|
|
const SCEV *NewStepSCEV = SE->getMinusSCEV(SE->getSCEV(DRS.Roots[i]),
|
|
|
|
SE->getSCEV(DRS.Roots[i-1]));
|
|
|
|
if (NewStepSCEV != StepSCEV)
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2015-02-11 17:19:47 +08:00
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool LoopReroll::DAGRootTracker::
|
|
|
|
findRootsBase(Instruction *IVU, SmallInstructionSet SubsumedInsts) {
|
2016-11-22 06:35:34 +08:00
|
|
|
// The base of a RootSet must be an AddRec, so it can be erased.
|
|
|
|
const auto *IVU_ADR = dyn_cast<SCEVAddRecExpr>(SE->getSCEV(IVU));
|
|
|
|
if (!IVU_ADR || IVU_ADR->getLoop() != L)
|
2013-11-17 07:59:05 +08:00
|
|
|
return false;
|
|
|
|
|
2015-02-11 17:19:47 +08:00
|
|
|
std::map<int64_t, Instruction*> V;
|
|
|
|
if (!collectPossibleRoots(IVU, V))
|
|
|
|
return false;
|
2015-01-29 21:48:05 +08:00
|
|
|
|
2015-07-25 06:01:49 +08:00
|
|
|
// If we didn't get a root for index zero, then IVU must be
|
2015-02-11 17:19:47 +08:00
|
|
|
// subsumed.
|
|
|
|
if (V.find(0) == V.end())
|
|
|
|
SubsumedInsts.insert(IVU);
|
|
|
|
|
|
|
|
// Partition the vector into monotonically increasing indexes.
|
|
|
|
DAGRootSet DRS;
|
|
|
|
DRS.BaseInst = nullptr;
|
|
|
|
|
2016-11-22 06:35:34 +08:00
|
|
|
SmallVector<DAGRootSet, 16> PotentialRootSets;
|
|
|
|
|
2015-02-11 17:19:47 +08:00
|
|
|
for (auto &KV : V) {
|
|
|
|
if (!DRS.BaseInst) {
|
|
|
|
DRS.BaseInst = KV.second;
|
|
|
|
DRS.SubsumedInsts = SubsumedInsts;
|
|
|
|
} else if (DRS.Roots.empty()) {
|
|
|
|
DRS.Roots.push_back(KV.second);
|
|
|
|
} else if (V.find(KV.first - 1) != V.end()) {
|
|
|
|
DRS.Roots.push_back(KV.second);
|
|
|
|
} else {
|
|
|
|
// Linear sequence terminated.
|
2016-11-22 06:35:34 +08:00
|
|
|
if (!validateRootSet(DRS))
|
|
|
|
return false;
|
|
|
|
|
|
|
|
// Construct a new DAGRootSet with the next sequence.
|
|
|
|
PotentialRootSets.push_back(DRS);
|
2015-02-11 17:19:47 +08:00
|
|
|
DRS.BaseInst = KV.second;
|
|
|
|
DRS.Roots.clear();
|
|
|
|
}
|
|
|
|
}
|
2016-11-22 06:35:34 +08:00
|
|
|
|
|
|
|
if (!validateRootSet(DRS))
|
|
|
|
return false;
|
|
|
|
|
|
|
|
PotentialRootSets.push_back(DRS);
|
|
|
|
|
|
|
|
RootSets.append(PotentialRootSets.begin(), PotentialRootSets.end());
|
2015-01-29 21:48:05 +08:00
|
|
|
|
2013-11-17 07:59:05 +08:00
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2015-02-11 17:19:47 +08:00
|
|
|
bool LoopReroll::DAGRootTracker::findRoots() {
|
2015-07-25 06:01:49 +08:00
|
|
|
Inc = IVToIncMap[IV];
|
2015-02-11 17:19:47 +08:00
|
|
|
|
|
|
|
assert(RootSets.empty() && "Unclean state!");
|
2015-07-25 06:01:49 +08:00
|
|
|
if (std::abs(Inc) == 1) {
|
2015-02-11 17:19:47 +08:00
|
|
|
for (auto *IVU : IV->users()) {
|
|
|
|
if (isLoopIncrement(IVU, IV))
|
|
|
|
LoopIncs.push_back(cast<Instruction>(IVU));
|
2013-11-17 07:59:05 +08:00
|
|
|
}
|
2016-11-22 06:35:34 +08:00
|
|
|
findRootsRecursive(IV, SmallInstructionSet());
|
2015-02-11 17:19:47 +08:00
|
|
|
LoopIncs.push_back(IV);
|
|
|
|
} else {
|
|
|
|
if (!findRootsBase(IV, SmallInstructionSet()))
|
|
|
|
return false;
|
2013-11-17 07:59:05 +08:00
|
|
|
}
|
|
|
|
|
2015-02-11 17:19:47 +08:00
|
|
|
// Ensure all sets have the same size.
|
|
|
|
if (RootSets.empty()) {
|
2018-05-14 20:53:11 +08:00
|
|
|
LLVM_DEBUG(dbgs() << "LRR: Aborting because no root sets found!\n");
|
2015-02-11 17:19:47 +08:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
for (auto &V : RootSets) {
|
|
|
|
if (V.Roots.empty() || V.Roots.size() != RootSets[0].Roots.size()) {
|
2018-05-14 20:53:11 +08:00
|
|
|
LLVM_DEBUG(
|
|
|
|
dbgs()
|
|
|
|
<< "LRR: Aborting because not all root sets have the same size\n");
|
2015-01-29 21:48:05 +08:00
|
|
|
return false;
|
2015-02-11 17:19:47 +08:00
|
|
|
}
|
2013-11-17 07:59:05 +08:00
|
|
|
}
|
|
|
|
|
2015-02-11 17:19:47 +08:00
|
|
|
Scale = RootSets[0].Roots.size() + 1;
|
|
|
|
|
|
|
|
if (Scale > IL_MaxRerollIterations) {
|
2018-05-14 20:53:11 +08:00
|
|
|
LLVM_DEBUG(dbgs() << "LRR: Aborting - too many iterations found. "
|
|
|
|
<< "#Found=" << Scale
|
|
|
|
<< ", #Max=" << IL_MaxRerollIterations << "\n");
|
2015-02-11 17:19:47 +08:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2018-05-14 20:53:11 +08:00
|
|
|
LLVM_DEBUG(dbgs() << "LRR: Successfully found roots: Scale=" << Scale
|
|
|
|
<< "\n");
|
2015-02-11 17:19:47 +08:00
|
|
|
|
2013-11-17 07:59:05 +08:00
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2015-01-30 05:52:03 +08:00
|
|
|
bool LoopReroll::DAGRootTracker::collectUsedInstructions(SmallInstructionSet &PossibleRedSet) {
|
|
|
|
// Populate the MapVector with all instructions in the block, in order first,
|
|
|
|
// so we can iterate over the contents later in perfect order.
|
|
|
|
for (auto &I : *L->getHeader()) {
|
|
|
|
Uses[&I].resize(IL_End);
|
|
|
|
}
|
|
|
|
|
|
|
|
SmallInstructionSet Exclude;
|
2015-02-11 17:19:47 +08:00
|
|
|
for (auto &DRS : RootSets) {
|
|
|
|
Exclude.insert(DRS.Roots.begin(), DRS.Roots.end());
|
|
|
|
Exclude.insert(DRS.SubsumedInsts.begin(), DRS.SubsumedInsts.end());
|
|
|
|
Exclude.insert(DRS.BaseInst);
|
|
|
|
}
|
2015-01-30 05:52:03 +08:00
|
|
|
Exclude.insert(LoopIncs.begin(), LoopIncs.end());
|
|
|
|
|
2015-02-11 17:19:47 +08:00
|
|
|
for (auto &DRS : RootSets) {
|
|
|
|
DenseSet<Instruction*> VBase;
|
|
|
|
collectInLoopUserSet(DRS.BaseInst, Exclude, PossibleRedSet, VBase);
|
|
|
|
for (auto *I : VBase) {
|
|
|
|
Uses[I].set(0);
|
|
|
|
}
|
2015-01-30 05:52:03 +08:00
|
|
|
|
2015-02-11 17:19:47 +08:00
|
|
|
unsigned Idx = 1;
|
|
|
|
for (auto *Root : DRS.Roots) {
|
|
|
|
DenseSet<Instruction*> V;
|
|
|
|
collectInLoopUserSet(Root, Exclude, PossibleRedSet, V);
|
2015-01-30 05:52:03 +08:00
|
|
|
|
2015-02-11 17:19:47 +08:00
|
|
|
// While we're here, check the use sets are the same size.
|
|
|
|
if (V.size() != VBase.size()) {
|
2018-05-14 20:53:11 +08:00
|
|
|
LLVM_DEBUG(dbgs() << "LRR: Aborting - use sets are different sizes\n");
|
2015-02-11 17:19:47 +08:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
for (auto *I : V) {
|
|
|
|
Uses[I].set(Idx);
|
|
|
|
}
|
|
|
|
++Idx;
|
2015-01-30 05:52:03 +08:00
|
|
|
}
|
|
|
|
|
2015-02-11 17:19:47 +08:00
|
|
|
// Make sure our subsumed instructions are remembered too.
|
|
|
|
for (auto *I : DRS.SubsumedInsts) {
|
|
|
|
Uses[I].set(IL_All);
|
2015-01-30 05:52:03 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
// Make sure the loop increments are also accounted for.
|
2015-02-11 17:19:47 +08:00
|
|
|
|
2015-01-30 05:52:03 +08:00
|
|
|
Exclude.clear();
|
2015-02-11 17:19:47 +08:00
|
|
|
for (auto &DRS : RootSets) {
|
|
|
|
Exclude.insert(DRS.Roots.begin(), DRS.Roots.end());
|
|
|
|
Exclude.insert(DRS.SubsumedInsts.begin(), DRS.SubsumedInsts.end());
|
|
|
|
Exclude.insert(DRS.BaseInst);
|
|
|
|
}
|
2015-01-30 05:52:03 +08:00
|
|
|
|
|
|
|
DenseSet<Instruction*> V;
|
|
|
|
collectInLoopUserSet(LoopIncs, Exclude, PossibleRedSet, V);
|
|
|
|
for (auto *I : V) {
|
2015-02-11 17:19:47 +08:00
|
|
|
Uses[I].set(IL_All);
|
2015-01-30 05:52:03 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2015-02-12 23:54:14 +08:00
|
|
|
/// Get the next instruction in "In" that is a member of set Val.
|
|
|
|
/// Start searching from StartI, and do not return anything in Exclude.
|
|
|
|
/// If StartI is not given, start from In.begin().
|
2015-01-30 05:52:03 +08:00
|
|
|
LoopReroll::DAGRootTracker::UsesTy::iterator
|
|
|
|
LoopReroll::DAGRootTracker::nextInstr(int Val, UsesTy &In,
|
2015-02-12 23:54:14 +08:00
|
|
|
const SmallInstructionSet &Exclude,
|
|
|
|
UsesTy::iterator *StartI) {
|
|
|
|
UsesTy::iterator I = StartI ? *StartI : In.begin();
|
|
|
|
while (I != In.end() && (I->second.test(Val) == 0 ||
|
|
|
|
Exclude.count(I->first) != 0))
|
2015-01-30 05:52:03 +08:00
|
|
|
++I;
|
|
|
|
return I;
|
|
|
|
}
|
|
|
|
|
2015-02-11 17:19:47 +08:00
|
|
|
bool LoopReroll::DAGRootTracker::isBaseInst(Instruction *I) {
|
|
|
|
for (auto &DRS : RootSets) {
|
|
|
|
if (DRS.BaseInst == I)
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool LoopReroll::DAGRootTracker::isRootInst(Instruction *I) {
|
|
|
|
for (auto &DRS : RootSets) {
|
2016-08-12 06:21:41 +08:00
|
|
|
if (is_contained(DRS.Roots, I))
|
2015-02-11 17:19:47 +08:00
|
|
|
return true;
|
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2015-02-12 23:54:14 +08:00
|
|
|
/// Return true if instruction I depends on any instruction between
|
|
|
|
/// Start and End.
|
|
|
|
bool LoopReroll::DAGRootTracker::instrDependsOn(Instruction *I,
|
|
|
|
UsesTy::iterator Start,
|
|
|
|
UsesTy::iterator End) {
|
|
|
|
for (auto *U : I->users()) {
|
|
|
|
for (auto It = Start; It != End; ++It)
|
|
|
|
if (U == It->first)
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2015-09-29 01:03:23 +08:00
|
|
|
static bool isIgnorableInst(const Instruction *I) {
|
|
|
|
if (isa<DbgInfoIntrinsic>(I))
|
|
|
|
return true;
|
|
|
|
const IntrinsicInst* II = dyn_cast<IntrinsicInst>(I);
|
|
|
|
if (!II)
|
|
|
|
return false;
|
|
|
|
switch (II->getIntrinsicID()) {
|
|
|
|
default:
|
|
|
|
return false;
|
2017-10-19 05:46:47 +08:00
|
|
|
case Intrinsic::annotation:
|
2015-09-29 01:03:23 +08:00
|
|
|
case Intrinsic::ptr_annotation:
|
|
|
|
case Intrinsic::var_annotation:
|
|
|
|
// TODO: the following intrinsics may also be whitelisted:
|
|
|
|
// lifetime_start, lifetime_end, invariant_start, invariant_end
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2015-01-30 05:52:03 +08:00
|
|
|
bool LoopReroll::DAGRootTracker::validate(ReductionTracker &Reductions) {
|
2013-11-17 07:59:05 +08:00
|
|
|
// We now need to check for equivalence of the use graph of each root with
|
|
|
|
// that of the primary induction variable (excluding the roots). Our goal
|
|
|
|
// here is not to solve the full graph isomorphism problem, but rather to
|
|
|
|
// catch common cases without a lot of work. As a result, we will assume
|
|
|
|
// that the relative order of the instructions in each unrolled iteration
|
|
|
|
// is the same (although we will not make an assumption about how the
|
|
|
|
// different iterations are intermixed). Note that while the order must be
|
|
|
|
// the same, the instructions may not be in the same basic block.
|
|
|
|
|
2015-01-29 21:48:05 +08:00
|
|
|
// An array of just the possible reductions for this scale factor. When we
|
|
|
|
// collect the set of all users of some root instructions, these reduction
|
|
|
|
// instructions are treated as 'final' (their uses are not considered).
|
|
|
|
// This is important because we don't want the root use set to search down
|
|
|
|
// the reduction chain.
|
|
|
|
SmallInstructionSet PossibleRedSet;
|
|
|
|
SmallInstructionSet PossibleRedLastSet;
|
|
|
|
SmallInstructionSet PossibleRedPHISet;
|
|
|
|
Reductions.restrictToScale(Scale, PossibleRedSet,
|
|
|
|
PossibleRedPHISet, PossibleRedLastSet);
|
|
|
|
|
2015-01-30 05:52:03 +08:00
|
|
|
// Populate "Uses" with where each instruction is used.
|
|
|
|
if (!collectUsedInstructions(PossibleRedSet))
|
|
|
|
return false;
|
2013-11-17 07:59:05 +08:00
|
|
|
|
2015-01-30 05:52:03 +08:00
|
|
|
// Make sure we mark the reduction PHIs as used in all iterations.
|
|
|
|
for (auto *I : PossibleRedPHISet) {
|
2015-02-11 17:19:47 +08:00
|
|
|
Uses[I].set(IL_All);
|
2015-01-30 05:52:03 +08:00
|
|
|
}
|
2013-11-17 07:59:05 +08:00
|
|
|
|
2016-04-30 08:51:22 +08:00
|
|
|
// Make sure we mark loop-control-only PHIs as used in all iterations. See
|
|
|
|
// comment above LoopReroll::isLoopControlIV for more information.
|
|
|
|
BasicBlock *Header = L->getHeader();
|
|
|
|
if (LoopControlIV && LoopControlIV != IV) {
|
|
|
|
for (auto *U : LoopControlIV->users()) {
|
|
|
|
Instruction *IVUser = dyn_cast<Instruction>(U);
|
|
|
|
// IVUser could be loop increment or compare
|
|
|
|
Uses[IVUser].set(IL_All);
|
|
|
|
for (auto *UU : IVUser->users()) {
|
|
|
|
Instruction *UUser = dyn_cast<Instruction>(UU);
|
|
|
|
// UUser could be compare, PHI or branch
|
|
|
|
Uses[UUser].set(IL_All);
|
2016-05-11 05:16:49 +08:00
|
|
|
// Skip SExt
|
|
|
|
if (isa<SExtInst>(UUser)) {
|
|
|
|
UUser = dyn_cast<Instruction>(*(UUser->user_begin()));
|
|
|
|
Uses[UUser].set(IL_All);
|
|
|
|
}
|
2016-04-30 08:51:22 +08:00
|
|
|
// Is UUser a compare instruction?
|
|
|
|
if (UU->hasOneUse()) {
|
|
|
|
Instruction *BI = dyn_cast<BranchInst>(*UUser->user_begin());
|
|
|
|
if (BI == cast<BranchInst>(Header->getTerminator()))
|
|
|
|
Uses[BI].set(IL_All);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2015-01-30 05:52:03 +08:00
|
|
|
// Make sure all instructions in the loop are in one and only one
|
|
|
|
// set.
|
|
|
|
for (auto &KV : Uses) {
|
2015-09-29 01:03:23 +08:00
|
|
|
if (KV.second.count() != 1 && !isIgnorableInst(KV.first)) {
|
2018-05-14 20:53:11 +08:00
|
|
|
LLVM_DEBUG(
|
|
|
|
dbgs() << "LRR: Aborting - instruction is not used in 1 iteration: "
|
|
|
|
<< *KV.first << " (#uses=" << KV.second.count() << ")\n");
|
2015-01-30 05:52:03 +08:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
}
|
2013-11-17 07:59:05 +08:00
|
|
|
|
2018-05-14 20:53:11 +08:00
|
|
|
LLVM_DEBUG(for (auto &KV
|
|
|
|
: Uses) {
|
|
|
|
dbgs() << "LRR: " << KV.second.find_first() << "\t" << *KV.first << "\n";
|
|
|
|
});
|
2013-11-17 07:59:05 +08:00
|
|
|
|
2015-01-30 05:52:03 +08:00
|
|
|
for (unsigned Iter = 1; Iter < Scale; ++Iter) {
|
2013-11-17 07:59:05 +08:00
|
|
|
// In addition to regular aliasing information, we need to look for
|
|
|
|
// instructions from later (future) iterations that have side effects
|
|
|
|
// preventing us from reordering them past other instructions with side
|
|
|
|
// effects.
|
|
|
|
bool FutureSideEffects = false;
|
|
|
|
AliasSetTracker AST(*AA);
|
|
|
|
// The map between instructions in f(%iv.(i+1)) and f(%iv).
|
|
|
|
DenseMap<Value *, Value *> BaseMap;
|
|
|
|
|
2015-01-30 05:52:03 +08:00
|
|
|
// Compare iteration Iter to the base.
|
2015-02-12 23:54:14 +08:00
|
|
|
SmallInstructionSet Visited;
|
|
|
|
auto BaseIt = nextInstr(0, Uses, Visited);
|
|
|
|
auto RootIt = nextInstr(Iter, Uses, Visited);
|
2015-01-30 05:52:03 +08:00
|
|
|
auto LastRootIt = Uses.begin();
|
2013-11-17 07:59:05 +08:00
|
|
|
|
2015-01-30 05:52:03 +08:00
|
|
|
while (BaseIt != Uses.end() && RootIt != Uses.end()) {
|
|
|
|
Instruction *BaseInst = BaseIt->first;
|
|
|
|
Instruction *RootInst = RootIt->first;
|
2013-11-17 07:59:05 +08:00
|
|
|
|
2015-01-30 05:52:03 +08:00
|
|
|
// Skip over the IV or root instructions; only match their users.
|
|
|
|
bool Continue = false;
|
2015-02-11 17:19:47 +08:00
|
|
|
if (isBaseInst(BaseInst)) {
|
2015-02-12 23:54:14 +08:00
|
|
|
Visited.insert(BaseInst);
|
|
|
|
BaseIt = nextInstr(0, Uses, Visited);
|
2015-01-30 05:52:03 +08:00
|
|
|
Continue = true;
|
|
|
|
}
|
2015-02-11 17:19:47 +08:00
|
|
|
if (isRootInst(RootInst)) {
|
2015-01-30 05:52:03 +08:00
|
|
|
LastRootIt = RootIt;
|
2015-02-12 23:54:14 +08:00
|
|
|
Visited.insert(RootInst);
|
|
|
|
RootIt = nextInstr(Iter, Uses, Visited);
|
2015-01-30 05:52:03 +08:00
|
|
|
Continue = true;
|
|
|
|
}
|
|
|
|
if (Continue) continue;
|
|
|
|
|
2015-02-12 23:54:14 +08:00
|
|
|
if (!BaseInst->isSameOperationAs(RootInst)) {
|
|
|
|
// Last chance saloon. We don't try and solve the full isomorphism
|
|
|
|
// problem, but try and at least catch the case where two instructions
|
|
|
|
// *of different types* are round the wrong way. We won't be able to
|
|
|
|
// efficiently tell, given two ADD instructions, which way around we
|
|
|
|
// should match them, but given an ADD and a SUB, we can at least infer
|
|
|
|
// which one is which.
|
|
|
|
//
|
|
|
|
// This should allow us to deal with a greater subset of the isomorphism
|
|
|
|
// problem. It does however change a linear algorithm into a quadratic
|
|
|
|
// one, so limit the number of probes we do.
|
|
|
|
auto TryIt = RootIt;
|
|
|
|
unsigned N = NumToleratedFailedMatches;
|
|
|
|
while (TryIt != Uses.end() &&
|
|
|
|
!BaseInst->isSameOperationAs(TryIt->first) &&
|
|
|
|
N--) {
|
|
|
|
++TryIt;
|
|
|
|
TryIt = nextInstr(Iter, Uses, Visited, &TryIt);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (TryIt == Uses.end() || TryIt == RootIt ||
|
|
|
|
instrDependsOn(TryIt->first, RootIt, TryIt)) {
|
2018-05-14 20:53:11 +08:00
|
|
|
LLVM_DEBUG(dbgs() << "LRR: iteration root match failed at "
|
|
|
|
<< *BaseInst << " vs. " << *RootInst << "\n");
|
2015-02-12 23:54:14 +08:00
|
|
|
return false;
|
|
|
|
}
|
2015-07-25 06:01:49 +08:00
|
|
|
|
2015-02-12 23:54:14 +08:00
|
|
|
RootIt = TryIt;
|
|
|
|
RootInst = TryIt->first;
|
|
|
|
}
|
|
|
|
|
2015-01-30 05:52:03 +08:00
|
|
|
// All instructions between the last root and this root
|
2015-07-25 06:01:49 +08:00
|
|
|
// may belong to some other iteration. If they belong to a
|
2015-01-30 05:52:03 +08:00
|
|
|
// future iteration, then they're dangerous to alias with.
|
2015-07-25 06:01:49 +08:00
|
|
|
//
|
2015-02-12 23:54:14 +08:00
|
|
|
// Note that because we allow a limited amount of flexibility in the order
|
|
|
|
// that we visit nodes, LastRootIt might be *before* RootIt, in which
|
|
|
|
// case we've already checked this set of instructions so we shouldn't
|
|
|
|
// do anything.
|
|
|
|
for (; LastRootIt < RootIt; ++LastRootIt) {
|
2015-01-30 05:52:03 +08:00
|
|
|
Instruction *I = LastRootIt->first;
|
|
|
|
if (LastRootIt->second.find_first() < (int)Iter)
|
|
|
|
continue;
|
|
|
|
if (I->mayWriteToMemory())
|
|
|
|
AST.add(I);
|
|
|
|
// Note: This is specifically guarded by a check on isa<PHINode>,
|
|
|
|
// which while a valid (somewhat arbitrary) micro-optimization, is
|
|
|
|
// needed because otherwise isSafeToSpeculativelyExecute returns
|
|
|
|
// false on PHI nodes.
|
2016-07-19 08:23:54 +08:00
|
|
|
if (!isa<PHINode>(I) && !isUnorderedLoadStore(I) &&
|
2015-03-10 10:37:25 +08:00
|
|
|
!isSafeToSpeculativelyExecute(I))
|
2015-01-30 05:52:03 +08:00
|
|
|
// Intervening instructions cause side effects.
|
|
|
|
FutureSideEffects = true;
|
2013-11-17 07:59:05 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
// Make sure that this instruction, which is in the use set of this
|
|
|
|
// root instruction, does not also belong to the base set or the set of
|
2015-01-30 05:52:03 +08:00
|
|
|
// some other root instruction.
|
|
|
|
if (RootIt->second.count() > 1) {
|
2018-05-14 20:53:11 +08:00
|
|
|
LLVM_DEBUG(dbgs() << "LRR: iteration root match failed at " << *BaseInst
|
|
|
|
<< " vs. " << *RootInst << " (prev. case overlap)\n");
|
2015-01-30 05:52:03 +08:00
|
|
|
return false;
|
2013-11-17 07:59:05 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
// Make sure that we don't alias with any instruction in the alias set
|
|
|
|
// tracker. If we do, then we depend on a future iteration, and we
|
|
|
|
// can't reroll.
|
2015-01-30 05:52:03 +08:00
|
|
|
if (RootInst->mayReadFromMemory())
|
|
|
|
for (auto &K : AST) {
|
|
|
|
if (K.aliasesUnknownInst(RootInst, *AA)) {
|
2018-05-14 20:53:11 +08:00
|
|
|
LLVM_DEBUG(dbgs() << "LRR: iteration root match failed at "
|
|
|
|
<< *BaseInst << " vs. " << *RootInst
|
|
|
|
<< " (depends on future store)\n");
|
2015-01-30 05:52:03 +08:00
|
|
|
return false;
|
2013-11-17 07:59:05 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
// If we've past an instruction from a future iteration that may have
|
|
|
|
// side effects, and this instruction might also, then we can't reorder
|
|
|
|
// them, and this matching fails. As an exception, we allow the alias
|
2016-07-19 08:23:54 +08:00
|
|
|
// set tracker to handle regular (unordered) load/store dependencies.
|
|
|
|
if (FutureSideEffects && ((!isUnorderedLoadStore(BaseInst) &&
|
2015-03-10 10:37:25 +08:00
|
|
|
!isSafeToSpeculativelyExecute(BaseInst)) ||
|
2016-07-19 08:23:54 +08:00
|
|
|
(!isUnorderedLoadStore(RootInst) &&
|
2015-03-10 10:37:25 +08:00
|
|
|
!isSafeToSpeculativelyExecute(RootInst)))) {
|
2018-05-14 20:53:11 +08:00
|
|
|
LLVM_DEBUG(dbgs() << "LRR: iteration root match failed at " << *BaseInst
|
|
|
|
<< " vs. " << *RootInst
|
|
|
|
<< " (side effects prevent reordering)\n");
|
2015-01-30 05:52:03 +08:00
|
|
|
return false;
|
2013-11-17 07:59:05 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
// For instructions that are part of a reduction, if the operation is
|
|
|
|
// associative, then don't bother matching the operands (because we
|
|
|
|
// already know that the instructions are isomorphic, and the order
|
|
|
|
// within the iteration does not matter). For non-associative reductions,
|
|
|
|
// we do need to match the operands, because we need to reject
|
|
|
|
// out-of-order instructions within an iteration!
|
|
|
|
// For example (assume floating-point addition), we need to reject this:
|
|
|
|
// x += a[i]; x += b[i];
|
|
|
|
// x += a[i+1]; x += b[i+1];
|
|
|
|
// x += b[i+2]; x += a[i+2];
|
2015-01-30 05:52:03 +08:00
|
|
|
bool InReduction = Reductions.isPairInSame(BaseInst, RootInst);
|
2013-11-17 07:59:05 +08:00
|
|
|
|
2015-01-30 05:52:03 +08:00
|
|
|
if (!(InReduction && BaseInst->isAssociative())) {
|
2014-04-20 07:56:35 +08:00
|
|
|
bool Swapped = false, SomeOpMatched = false;
|
2015-01-30 05:52:03 +08:00
|
|
|
for (unsigned j = 0; j < BaseInst->getNumOperands(); ++j) {
|
|
|
|
Value *Op2 = RootInst->getOperand(j);
|
2013-11-17 07:59:05 +08:00
|
|
|
|
2014-10-28 19:53:30 +08:00
|
|
|
// If this is part of a reduction (and the operation is not
|
|
|
|
// associatve), then we match all operands, but not those that are
|
|
|
|
// part of the reduction.
|
2013-11-17 07:59:05 +08:00
|
|
|
if (InReduction)
|
|
|
|
if (Instruction *Op2I = dyn_cast<Instruction>(Op2))
|
2015-01-30 05:52:03 +08:00
|
|
|
if (Reductions.isPairInSame(RootInst, Op2I))
|
2013-11-17 07:59:05 +08:00
|
|
|
continue;
|
|
|
|
|
|
|
|
DenseMap<Value *, Value *>::iterator BMI = BaseMap.find(Op2);
|
2015-02-11 17:19:47 +08:00
|
|
|
if (BMI != BaseMap.end()) {
|
2013-11-17 07:59:05 +08:00
|
|
|
Op2 = BMI->second;
|
2015-02-11 17:19:47 +08:00
|
|
|
} else {
|
|
|
|
for (auto &DRS : RootSets) {
|
|
|
|
if (DRS.Roots[Iter-1] == (Instruction*) Op2) {
|
|
|
|
Op2 = DRS.BaseInst;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
2013-11-17 07:59:05 +08:00
|
|
|
|
2015-01-30 05:52:03 +08:00
|
|
|
if (BaseInst->getOperand(Swapped ? unsigned(!j) : j) != Op2) {
|
2014-10-28 19:53:30 +08:00
|
|
|
// If we've not already decided to swap the matched operands, and
|
|
|
|
// we've not already matched our first operand (note that we could
|
|
|
|
// have skipped matching the first operand because it is part of a
|
|
|
|
// reduction above), and the instruction is commutative, then try
|
|
|
|
// the swapped match.
|
2015-01-30 05:52:03 +08:00
|
|
|
if (!Swapped && BaseInst->isCommutative() && !SomeOpMatched &&
|
|
|
|
BaseInst->getOperand(!j) == Op2) {
|
2013-11-17 07:59:05 +08:00
|
|
|
Swapped = true;
|
|
|
|
} else {
|
2018-05-14 20:53:11 +08:00
|
|
|
LLVM_DEBUG(dbgs()
|
|
|
|
<< "LRR: iteration root match failed at " << *BaseInst
|
|
|
|
<< " vs. " << *RootInst << " (operand " << j << ")\n");
|
2015-01-30 05:52:03 +08:00
|
|
|
return false;
|
2013-11-17 07:59:05 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
SomeOpMatched = true;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2015-01-30 05:52:03 +08:00
|
|
|
if ((!PossibleRedLastSet.count(BaseInst) &&
|
|
|
|
hasUsesOutsideLoop(BaseInst, L)) ||
|
|
|
|
(!PossibleRedLastSet.count(RootInst) &&
|
|
|
|
hasUsesOutsideLoop(RootInst, L))) {
|
2018-05-14 20:53:11 +08:00
|
|
|
LLVM_DEBUG(dbgs() << "LRR: iteration root match failed at " << *BaseInst
|
|
|
|
<< " vs. " << *RootInst << " (uses outside loop)\n");
|
2015-01-30 05:52:03 +08:00
|
|
|
return false;
|
2013-11-17 07:59:05 +08:00
|
|
|
}
|
|
|
|
|
2015-01-30 05:52:03 +08:00
|
|
|
Reductions.recordPair(BaseInst, RootInst, Iter);
|
|
|
|
BaseMap.insert(std::make_pair(RootInst, BaseInst));
|
2013-11-17 07:59:05 +08:00
|
|
|
|
2015-01-30 05:52:03 +08:00
|
|
|
LastRootIt = RootIt;
|
2015-02-12 23:54:14 +08:00
|
|
|
Visited.insert(BaseInst);
|
|
|
|
Visited.insert(RootInst);
|
|
|
|
BaseIt = nextInstr(0, Uses, Visited);
|
|
|
|
RootIt = nextInstr(Iter, Uses, Visited);
|
2013-11-17 07:59:05 +08:00
|
|
|
}
|
2017-10-19 05:46:47 +08:00
|
|
|
assert(BaseIt == Uses.end() && RootIt == Uses.end() &&
|
|
|
|
"Mismatched set sizes!");
|
2013-11-17 07:59:05 +08:00
|
|
|
}
|
|
|
|
|
2018-05-14 20:53:11 +08:00
|
|
|
LLVM_DEBUG(dbgs() << "LRR: Matched all iteration increments for " << *IV
|
|
|
|
<< "\n");
|
2013-11-17 07:59:05 +08:00
|
|
|
|
2015-01-29 21:48:05 +08:00
|
|
|
return true;
|
|
|
|
}
|
2013-11-17 07:59:05 +08:00
|
|
|
|
2018-06-23 06:58:55 +08:00
|
|
|
void LoopReroll::DAGRootTracker::replace(const SCEV *BackedgeTakenCount) {
|
2015-01-29 21:48:05 +08:00
|
|
|
BasicBlock *Header = L->getHeader();
|
2018-06-23 06:58:55 +08:00
|
|
|
|
|
|
|
// Compute the start and increment for each BaseInst before we start erasing
|
|
|
|
// instructions.
|
|
|
|
SmallVector<const SCEV *, 8> StartExprs;
|
|
|
|
SmallVector<const SCEV *, 8> IncrExprs;
|
|
|
|
for (auto &DRS : RootSets) {
|
|
|
|
const SCEVAddRecExpr *IVSCEV =
|
|
|
|
cast<SCEVAddRecExpr>(SE->getSCEV(DRS.BaseInst));
|
|
|
|
StartExprs.push_back(IVSCEV->getStart());
|
|
|
|
IncrExprs.push_back(SE->getMinusSCEV(SE->getSCEV(DRS.Roots[0]), IVSCEV));
|
|
|
|
}
|
|
|
|
|
2013-11-17 07:59:05 +08:00
|
|
|
// Remove instructions associated with non-base iterations.
|
ADT: Give ilist<T>::reverse_iterator a handle to the current node
Reverse iterators to doubly-linked lists can be simpler (and cheaper)
than std::reverse_iterator. Make it so.
In particular, change ilist<T>::reverse_iterator so that it is *never*
invalidated unless the node it references is deleted. This matches the
guarantees of ilist<T>::iterator.
(Note: MachineBasicBlock::iterator is *not* an ilist iterator, but a
MachineInstrBundleIterator<MachineInstr>. This commit does not change
MachineBasicBlock::reverse_iterator, but it does update
MachineBasicBlock::reverse_instr_iterator. See note at end of commit
message for details on bundle iterators.)
Given the list (with the Sentinel showing twice for simplicity):
[Sentinel] <-> A <-> B <-> [Sentinel]
the following is now true:
1. begin() represents A.
2. begin() holds the pointer for A.
3. end() represents [Sentinel].
4. end() holds the poitner for [Sentinel].
5. rbegin() represents B.
6. rbegin() holds the pointer for B.
7. rend() represents [Sentinel].
8. rend() holds the pointer for [Sentinel].
The changes are #6 and #8. Here are some properties from the old
scheme (which used std::reverse_iterator):
- rbegin() held the pointer for [Sentinel] and rend() held the pointer
for A;
- operator*() cost two dereferences instead of one;
- converting from a valid iterator to its valid reverse_iterator
involved a confusing increment; and
- "RI++->erase()" left RI invalid. The unintuitive replacement was
"RI->erase(), RE = end()".
With vector-like data structures these properties are hard to avoid
(since past-the-beginning is not a valid pointer), and don't impose a
real cost (since there's still only one dereference, and all iterators
are invalidated on erase). But with lists, this was a poor design.
Specifically, the following code (which obviously works with normal
iterators) now works with ilist::reverse_iterator as well:
for (auto RI = L.rbegin(), RE = L.rend(); RI != RE;)
fooThatMightRemoveArgFromList(*RI++);
Converting between iterator and reverse_iterator for the same node uses
the getReverse() function.
reverse_iterator iterator::getReverse();
iterator reverse_iterator::getReverse();
Why doesn't iterator <=> reverse_iterator conversion use constructors?
In order to catch and update old code, reverse_iterator does not even
have an explicit conversion from iterator. It wouldn't be safe because
there would be no reasonable way to catch all the bugs from the changed
semantic (see the changes at call sites that are part of this patch).
Old code used this API:
std::reverse_iterator::reverse_iterator(iterator);
iterator std::reverse_iterator::base();
Here's how to update from old code to new (that incorporates the
semantic change), assuming I is an ilist<>::iterator and RI is an
ilist<>::reverse_iterator:
[Old] ==> [New]
reverse_iterator(I) (--I).getReverse()
reverse_iterator(I) ++I.getReverse()
--reverse_iterator(I) I.getReverse()
reverse_iterator(++I) I.getReverse()
RI.base() (--RI).getReverse()
RI.base() ++RI.getReverse()
--RI.base() RI.getReverse()
(++RI).base() RI.getReverse()
delete &*RI, RE = end() delete &*RI++
RI->erase(), RE = end() RI++->erase()
=======================================
Note: bundle iterators are out of scope
=======================================
MachineBasicBlock::iterator, also known as
MachineInstrBundleIterator<MachineInstr>, is a wrapper to represent
MachineInstr bundles. The idea is that each operator++ takes you to the
beginning of the next bundle. Implementing a sane reverse iterator for
this is harder than ilist. Here are the options:
- Use std::reverse_iterator<MBB::i>. Store a handle to the beginning of
the next bundle. A call to operator*() runs a loop (usually
operator--() will be called 1 time, for unbundled instructions).
Increment/decrement just works. This is the status quo.
- Store a handle to the final node in the bundle. A call to operator*()
still runs a loop, but it iterates one time fewer (usually
operator--() will be called 0 times, for unbundled instructions).
Increment/decrement just works.
- Make the ilist_sentinel<MachineInstr> *always* store that it's the
sentinel (instead of just in asserts mode). Then the bundle iterator
can sniff the sentinel bit in operator++().
I initially tried implementing the end() option as part of this commit,
but updating iterator/reverse_iterator conversion call sites was
error-prone. I have a WIP series of patches that implements the final
option.
llvm-svn: 280032
2016-08-30 08:13:12 +08:00
|
|
|
for (BasicBlock::reverse_iterator J = Header->rbegin(), JE = Header->rend();
|
|
|
|
J != JE;) {
|
2015-01-30 05:52:03 +08:00
|
|
|
unsigned I = Uses[&*J].find_first();
|
2015-02-11 17:19:47 +08:00
|
|
|
if (I > 0 && I < IL_All) {
|
2018-05-14 20:53:11 +08:00
|
|
|
LLVM_DEBUG(dbgs() << "LRR: removing: " << *J << "\n");
|
ADT: Give ilist<T>::reverse_iterator a handle to the current node
Reverse iterators to doubly-linked lists can be simpler (and cheaper)
than std::reverse_iterator. Make it so.
In particular, change ilist<T>::reverse_iterator so that it is *never*
invalidated unless the node it references is deleted. This matches the
guarantees of ilist<T>::iterator.
(Note: MachineBasicBlock::iterator is *not* an ilist iterator, but a
MachineInstrBundleIterator<MachineInstr>. This commit does not change
MachineBasicBlock::reverse_iterator, but it does update
MachineBasicBlock::reverse_instr_iterator. See note at end of commit
message for details on bundle iterators.)
Given the list (with the Sentinel showing twice for simplicity):
[Sentinel] <-> A <-> B <-> [Sentinel]
the following is now true:
1. begin() represents A.
2. begin() holds the pointer for A.
3. end() represents [Sentinel].
4. end() holds the poitner for [Sentinel].
5. rbegin() represents B.
6. rbegin() holds the pointer for B.
7. rend() represents [Sentinel].
8. rend() holds the pointer for [Sentinel].
The changes are #6 and #8. Here are some properties from the old
scheme (which used std::reverse_iterator):
- rbegin() held the pointer for [Sentinel] and rend() held the pointer
for A;
- operator*() cost two dereferences instead of one;
- converting from a valid iterator to its valid reverse_iterator
involved a confusing increment; and
- "RI++->erase()" left RI invalid. The unintuitive replacement was
"RI->erase(), RE = end()".
With vector-like data structures these properties are hard to avoid
(since past-the-beginning is not a valid pointer), and don't impose a
real cost (since there's still only one dereference, and all iterators
are invalidated on erase). But with lists, this was a poor design.
Specifically, the following code (which obviously works with normal
iterators) now works with ilist::reverse_iterator as well:
for (auto RI = L.rbegin(), RE = L.rend(); RI != RE;)
fooThatMightRemoveArgFromList(*RI++);
Converting between iterator and reverse_iterator for the same node uses
the getReverse() function.
reverse_iterator iterator::getReverse();
iterator reverse_iterator::getReverse();
Why doesn't iterator <=> reverse_iterator conversion use constructors?
In order to catch and update old code, reverse_iterator does not even
have an explicit conversion from iterator. It wouldn't be safe because
there would be no reasonable way to catch all the bugs from the changed
semantic (see the changes at call sites that are part of this patch).
Old code used this API:
std::reverse_iterator::reverse_iterator(iterator);
iterator std::reverse_iterator::base();
Here's how to update from old code to new (that incorporates the
semantic change), assuming I is an ilist<>::iterator and RI is an
ilist<>::reverse_iterator:
[Old] ==> [New]
reverse_iterator(I) (--I).getReverse()
reverse_iterator(I) ++I.getReverse()
--reverse_iterator(I) I.getReverse()
reverse_iterator(++I) I.getReverse()
RI.base() (--RI).getReverse()
RI.base() ++RI.getReverse()
--RI.base() RI.getReverse()
(++RI).base() RI.getReverse()
delete &*RI, RE = end() delete &*RI++
RI->erase(), RE = end() RI++->erase()
=======================================
Note: bundle iterators are out of scope
=======================================
MachineBasicBlock::iterator, also known as
MachineInstrBundleIterator<MachineInstr>, is a wrapper to represent
MachineInstr bundles. The idea is that each operator++ takes you to the
beginning of the next bundle. Implementing a sane reverse iterator for
this is harder than ilist. Here are the options:
- Use std::reverse_iterator<MBB::i>. Store a handle to the beginning of
the next bundle. A call to operator*() runs a loop (usually
operator--() will be called 1 time, for unbundled instructions).
Increment/decrement just works. This is the status quo.
- Store a handle to the final node in the bundle. A call to operator*()
still runs a loop, but it iterates one time fewer (usually
operator--() will be called 0 times, for unbundled instructions).
Increment/decrement just works.
- Make the ilist_sentinel<MachineInstr> *always* store that it's the
sentinel (instead of just in asserts mode). Then the bundle iterator
can sniff the sentinel bit in operator++().
I initially tried implementing the end() option as part of this commit,
but updating iterator/reverse_iterator conversion call sites was
error-prone. I have a WIP series of patches that implements the final
option.
llvm-svn: 280032
2016-08-30 08:13:12 +08:00
|
|
|
J++->eraseFromParent();
|
2013-11-17 07:59:05 +08:00
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
2014-10-28 19:53:30 +08:00
|
|
|
++J;
|
2013-11-17 07:59:05 +08:00
|
|
|
}
|
|
|
|
|
2018-06-23 06:58:55 +08:00
|
|
|
// Rewrite each BaseInst using SCEV.
|
|
|
|
for (size_t i = 0, e = RootSets.size(); i != e; ++i)
|
|
|
|
// Insert the new induction variable.
|
|
|
|
replaceIV(RootSets[i], StartExprs[i], IncrExprs[i]);
|
2016-04-30 08:51:22 +08:00
|
|
|
|
2018-06-23 06:58:55 +08:00
|
|
|
{ // Limit the lifetime of SCEVExpander.
|
|
|
|
BranchInst *BI = cast<BranchInst>(Header->getTerminator());
|
|
|
|
const DataLayout &DL = Header->getModule()->getDataLayout();
|
|
|
|
SCEVExpander Expander(*SE, DL, "reroll");
|
|
|
|
auto Zero = SE->getZero(BackedgeTakenCount->getType());
|
|
|
|
auto One = SE->getOne(BackedgeTakenCount->getType());
|
|
|
|
auto NewIVSCEV = SE->getAddRecExpr(Zero, One, L, SCEV::FlagAnyWrap);
|
|
|
|
Value *NewIV =
|
|
|
|
Expander.expandCodeFor(NewIVSCEV, BackedgeTakenCount->getType(),
|
|
|
|
Header->getFirstNonPHIOrDbg());
|
|
|
|
// FIXME: This arithmetic can overflow.
|
|
|
|
auto TripCount = SE->getAddExpr(BackedgeTakenCount, One);
|
|
|
|
auto ScaledTripCount = SE->getMulExpr(
|
|
|
|
TripCount, SE->getConstant(BackedgeTakenCount->getType(), Scale));
|
|
|
|
auto ScaledBECount = SE->getMinusSCEV(ScaledTripCount, One);
|
|
|
|
Value *TakenCount =
|
|
|
|
Expander.expandCodeFor(ScaledBECount, BackedgeTakenCount->getType(),
|
|
|
|
Header->getFirstNonPHIOrDbg());
|
|
|
|
Value *Cond =
|
|
|
|
new ICmpInst(BI, CmpInst::ICMP_EQ, NewIV, TakenCount, "exitcond");
|
|
|
|
BI->setCondition(Cond);
|
|
|
|
|
|
|
|
if (BI->getSuccessor(1) != Header)
|
|
|
|
BI->swapSuccessors();
|
|
|
|
}
|
2015-02-11 17:19:47 +08:00
|
|
|
|
2016-01-26 03:43:45 +08:00
|
|
|
SimplifyInstructionsInBlock(Header, TLI);
|
|
|
|
DeleteDeadPHIs(Header, TLI);
|
|
|
|
}
|
2015-02-11 17:19:47 +08:00
|
|
|
|
2018-06-23 06:58:55 +08:00
|
|
|
void LoopReroll::DAGRootTracker::replaceIV(DAGRootSet &DRS,
|
|
|
|
const SCEV *Start,
|
|
|
|
const SCEV *IncrExpr) {
|
2016-01-26 03:43:45 +08:00
|
|
|
BasicBlock *Header = L->getHeader();
|
2018-06-23 06:58:55 +08:00
|
|
|
Instruction *Inst = DRS.BaseInst;
|
|
|
|
|
2016-01-26 03:43:45 +08:00
|
|
|
const SCEV *NewIVSCEV =
|
|
|
|
SE->getAddRecExpr(Start, IncrExpr, L, SCEV::FlagAnyWrap);
|
|
|
|
|
|
|
|
{ // Limit the lifetime of SCEVExpander.
|
|
|
|
const DataLayout &DL = Header->getModule()->getDataLayout();
|
|
|
|
SCEVExpander Expander(*SE, DL, "reroll");
|
2016-11-22 06:35:34 +08:00
|
|
|
Value *NewIV = Expander.expandCodeFor(NewIVSCEV, Inst->getType(),
|
|
|
|
Header->getFirstNonPHIOrDbg());
|
2016-01-26 03:43:45 +08:00
|
|
|
|
|
|
|
for (auto &KV : Uses)
|
|
|
|
if (KV.second.find_first() == 0)
|
|
|
|
KV.first->replaceUsesOfWith(Inst, NewIV);
|
2013-11-17 07:59:05 +08:00
|
|
|
}
|
2015-01-29 21:48:05 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
// Validate the selected reductions. All iterations must have an isomorphic
|
|
|
|
// part of the reduction chain and, for non-associative reductions, the chain
|
|
|
|
// entries must appear in order.
|
|
|
|
bool LoopReroll::ReductionTracker::validateSelected() {
|
|
|
|
// For a non-associative reduction, the chain entries must appear in order.
|
2016-06-26 20:28:59 +08:00
|
|
|
for (int i : Reds) {
|
2015-01-29 21:48:05 +08:00
|
|
|
int PrevIter = 0, BaseCount = 0, Count = 0;
|
|
|
|
for (Instruction *J : PossibleReds[i]) {
|
|
|
|
// Note that all instructions in the chain must have been found because
|
|
|
|
// all instructions in the function must have been assigned to some
|
|
|
|
// iteration.
|
|
|
|
int Iter = PossibleRedIter[J];
|
|
|
|
if (Iter != PrevIter && Iter != PrevIter + 1 &&
|
|
|
|
!PossibleReds[i].getReducedValue()->isAssociative()) {
|
2018-05-14 20:53:11 +08:00
|
|
|
LLVM_DEBUG(dbgs() << "LRR: Out-of-order non-associative reduction: "
|
|
|
|
<< J << "\n");
|
2015-01-29 21:48:05 +08:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (Iter != PrevIter) {
|
|
|
|
if (Count != BaseCount) {
|
2018-05-14 20:53:11 +08:00
|
|
|
LLVM_DEBUG(dbgs()
|
|
|
|
<< "LRR: Iteration " << PrevIter << " reduction use count "
|
|
|
|
<< Count << " is not equal to the base use count "
|
|
|
|
<< BaseCount << "\n");
|
2015-01-29 21:48:05 +08:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
Count = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
++Count;
|
|
|
|
if (Iter == 0)
|
|
|
|
++BaseCount;
|
|
|
|
|
|
|
|
PrevIter = Iter;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
// For all selected reductions, remove all parts except those in the first
|
|
|
|
// iteration (and the PHI). Replace outside uses of the reduced value with uses
|
|
|
|
// of the first-iteration reduced value (in other words, reroll the selected
|
|
|
|
// reductions).
|
|
|
|
void LoopReroll::ReductionTracker::replaceSelected() {
|
|
|
|
// Fixup reductions to refer to the last instruction associated with the
|
|
|
|
// first iteration (not the last).
|
2016-06-26 20:28:59 +08:00
|
|
|
for (int i : Reds) {
|
2015-01-29 21:48:05 +08:00
|
|
|
int j = 0;
|
|
|
|
for (int e = PossibleReds[i].size(); j != e; ++j)
|
|
|
|
if (PossibleRedIter[PossibleReds[i][j]] != 0) {
|
|
|
|
--j;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
// Replace users with the new end-of-chain value.
|
|
|
|
SmallInstructionVector Users;
|
2015-01-30 05:52:03 +08:00
|
|
|
for (User *U : PossibleReds[i].getReducedValue()->users()) {
|
2015-01-29 21:48:05 +08:00
|
|
|
Users.push_back(cast<Instruction>(U));
|
2015-01-30 05:52:03 +08:00
|
|
|
}
|
2015-01-29 21:48:05 +08:00
|
|
|
|
2016-06-26 20:28:59 +08:00
|
|
|
for (Instruction *User : Users)
|
|
|
|
User->replaceUsesOfWith(PossibleReds[i].getReducedValue(),
|
2015-01-29 21:48:05 +08:00
|
|
|
PossibleReds[i][j]);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
// Reroll the provided loop with respect to the provided induction variable.
|
|
|
|
// Generally, we're looking for a loop like this:
|
|
|
|
//
|
|
|
|
// %iv = phi [ (preheader, ...), (body, %iv.next) ]
|
|
|
|
// f(%iv)
|
|
|
|
// %iv.1 = add %iv, 1 <-- a root increment
|
|
|
|
// f(%iv.1)
|
|
|
|
// %iv.2 = add %iv, 2 <-- a root increment
|
|
|
|
// f(%iv.2)
|
|
|
|
// %iv.scale_m_1 = add %iv, scale-1 <-- a root increment
|
|
|
|
// f(%iv.scale_m_1)
|
|
|
|
// ...
|
|
|
|
// %iv.next = add %iv, scale
|
|
|
|
// %cmp = icmp(%iv, ...)
|
|
|
|
// br %cmp, header, exit
|
|
|
|
//
|
|
|
|
// Notably, we do not require that f(%iv), f(%iv.1), etc. be isolated groups of
|
|
|
|
// instructions. In other words, the instructions in f(%iv), f(%iv.1), etc. can
|
|
|
|
// be intermixed with eachother. The restriction imposed by this algorithm is
|
|
|
|
// that the relative order of the isomorphic instructions in f(%iv), f(%iv.1),
|
|
|
|
// etc. be the same.
|
|
|
|
//
|
|
|
|
// First, we collect the use set of %iv, excluding the other increment roots.
|
|
|
|
// This gives us f(%iv). Then we iterate over the loop instructions (scale-1)
|
|
|
|
// times, having collected the use set of f(%iv.(i+1)), during which we:
|
|
|
|
// - Ensure that the next unmatched instruction in f(%iv) is isomorphic to
|
|
|
|
// the next unmatched instruction in f(%iv.(i+1)).
|
|
|
|
// - Ensure that both matched instructions don't have any external users
|
|
|
|
// (with the exception of last-in-chain reduction instructions).
|
|
|
|
// - Track the (aliasing) write set, and other side effects, of all
|
|
|
|
// instructions that belong to future iterations that come before the matched
|
|
|
|
// instructions. If the matched instructions read from that write set, then
|
|
|
|
// f(%iv) or f(%iv.(i+1)) has some dependency on instructions in
|
|
|
|
// f(%iv.(j+1)) for some j > i, and we cannot reroll the loop. Similarly,
|
|
|
|
// if any of these future instructions had side effects (could not be
|
|
|
|
// speculatively executed), and so do the matched instructions, when we
|
|
|
|
// cannot reorder those side-effect-producing instructions, and rerolling
|
|
|
|
// fails.
|
|
|
|
//
|
|
|
|
// Finally, we make sure that all loop instructions are either loop increment
|
|
|
|
// roots, belong to simple latch code, parts of validated reductions, part of
|
|
|
|
// f(%iv) or part of some f(%iv.i). If all of that is true (and all reductions
|
|
|
|
// have been validated), then we reroll the loop.
|
|
|
|
bool LoopReroll::reroll(Instruction *IV, Loop *L, BasicBlock *Header,
|
2018-06-23 06:58:55 +08:00
|
|
|
const SCEV *BackedgeTakenCount,
|
2015-01-29 21:48:05 +08:00
|
|
|
ReductionTracker &Reductions) {
|
2015-12-16 03:40:57 +08:00
|
|
|
DAGRootTracker DAGRoots(this, L, IV, SE, AA, TLI, DT, LI, PreserveLCSSA,
|
2016-04-30 08:51:22 +08:00
|
|
|
IVToIncMap, LoopControlIV);
|
2015-01-29 21:48:05 +08:00
|
|
|
|
|
|
|
if (!DAGRoots.findRoots())
|
|
|
|
return false;
|
2018-05-14 20:53:11 +08:00
|
|
|
LLVM_DEBUG(dbgs() << "LRR: Found all root induction increments for: " << *IV
|
|
|
|
<< "\n");
|
2015-07-25 06:01:49 +08:00
|
|
|
|
2015-01-29 21:48:05 +08:00
|
|
|
if (!DAGRoots.validate(Reductions))
|
|
|
|
return false;
|
|
|
|
if (!Reductions.validateSelected())
|
|
|
|
return false;
|
|
|
|
// At this point, we've validated the rerolling, and we're committed to
|
|
|
|
// making changes!
|
|
|
|
|
|
|
|
Reductions.replaceSelected();
|
2018-06-23 06:58:55 +08:00
|
|
|
DAGRoots.replace(BackedgeTakenCount);
|
2015-01-29 21:48:05 +08:00
|
|
|
|
2013-11-17 07:59:05 +08:00
|
|
|
++NumRerolledLoops;
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool LoopReroll::runOnLoop(Loop *L, LPPassManager &LPM) {
|
2016-04-23 06:06:11 +08:00
|
|
|
if (skipLoop(L))
|
2014-02-06 08:07:05 +08:00
|
|
|
return false;
|
|
|
|
|
[PM/AA] Rebuild LLVM's alias analysis infrastructure in a way compatible
with the new pass manager, and no longer relying on analysis groups.
This builds essentially a ground-up new AA infrastructure stack for
LLVM. The core ideas are the same that are used throughout the new pass
manager: type erased polymorphism and direct composition. The design is
as follows:
- FunctionAAResults is a type-erasing alias analysis results aggregation
interface to walk a single query across a range of results from
different alias analyses. Currently this is function-specific as we
always assume that aliasing queries are *within* a function.
- AAResultBase is a CRTP utility providing stub implementations of
various parts of the alias analysis result concept, notably in several
cases in terms of other more general parts of the interface. This can
be used to implement only a narrow part of the interface rather than
the entire interface. This isn't really ideal, this logic should be
hoisted into FunctionAAResults as currently it will cause
a significant amount of redundant work, but it faithfully models the
behavior of the prior infrastructure.
- All the alias analysis passes are ported to be wrapper passes for the
legacy PM and new-style analysis passes for the new PM with a shared
result object. In some cases (most notably CFL), this is an extremely
naive approach that we should revisit when we can specialize for the
new pass manager.
- BasicAA has been restructured to reflect that it is much more
fundamentally a function analysis because it uses dominator trees and
loop info that need to be constructed for each function.
All of the references to getting alias analysis results have been
updated to use the new aggregation interface. All the preservation and
other pass management code has been updated accordingly.
The way the FunctionAAResultsWrapperPass works is to detect the
available alias analyses when run, and add them to the results object.
This means that we should be able to continue to respect when various
passes are added to the pipeline, for example adding CFL or adding TBAA
passes should just cause their results to be available and to get folded
into this. The exception to this rule is BasicAA which really needs to
be a function pass due to using dominator trees and loop info. As
a consequence, the FunctionAAResultsWrapperPass directly depends on
BasicAA and always includes it in the aggregation.
This has significant implications for preserving analyses. Generally,
most passes shouldn't bother preserving FunctionAAResultsWrapperPass
because rebuilding the results just updates the set of known AA passes.
The exception to this rule are LoopPass instances which need to preserve
all the function analyses that the loop pass manager will end up
needing. This means preserving both BasicAAWrapperPass and the
aggregating FunctionAAResultsWrapperPass.
Now, when preserving an alias analysis, you do so by directly preserving
that analysis. This is only necessary for non-immutable-pass-provided
alias analyses though, and there are only three of interest: BasicAA,
GlobalsAA (formerly GlobalsModRef), and SCEVAA. Usually BasicAA is
preserved when needed because it (like DominatorTree and LoopInfo) is
marked as a CFG-only pass. I've expanded GlobalsAA into the preserved
set everywhere we previously were preserving all of AliasAnalysis, and
I've added SCEVAA in the intersection of that with where we preserve
SCEV itself.
One significant challenge to all of this is that the CGSCC passes were
actually using the alias analysis implementations by taking advantage of
a pretty amazing set of loop holes in the old pass manager's analysis
management code which allowed analysis groups to slide through in many
cases. Moving away from analysis groups makes this problem much more
obvious. To fix it, I've leveraged the flexibility the design of the new
PM components provides to just directly construct the relevant alias
analyses for the relevant functions in the IPO passes that need them.
This is a bit hacky, but should go away with the new pass manager, and
is already in many ways cleaner than the prior state.
Another significant challenge is that various facilities of the old
alias analysis infrastructure just don't fit any more. The most
significant of these is the alias analysis 'counter' pass. That pass
relied on the ability to snoop on AA queries at different points in the
analysis group chain. Instead, I'm planning to build printing
functionality directly into the aggregation layer. I've not included
that in this patch merely to keep it smaller.
Note that all of this needs a nearly complete rewrite of the AA
documentation. I'm planning to do that, but I'd like to make sure the
new design settles, and to flesh out a bit more of what it looks like in
the new pass manager first.
Differential Revision: http://reviews.llvm.org/D12080
llvm-svn: 247167
2015-09-10 01:55:00 +08:00
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AA = &getAnalysis<AAResultsWrapperPass>().getAAResults();
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2015-01-17 22:16:18 +08:00
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LI = &getAnalysis<LoopInfoWrapperPass>().getLoopInfo();
|
[PM] Port ScalarEvolution to the new pass manager.
This change makes ScalarEvolution a stand-alone object and just produces
one from a pass as needed. Making this work well requires making the
object movable, using references instead of overwritten pointers in
a number of places, and other refactorings.
I've also wired it up to the new pass manager and added a RUN line to
a test to exercise it under the new pass manager. This includes basic
printing support much like with other analyses.
But there is a big and somewhat scary change here. Prior to this patch
ScalarEvolution was never *actually* invalidated!!! Re-running the pass
just re-wired up the various other analyses and didn't remove any of the
existing entries in the SCEV caches or clear out anything at all. This
might seem OK as everything in SCEV that can uses ValueHandles to track
updates to the values that serve as SCEV keys. However, this still means
that as we ran SCEV over each function in the module, we kept
accumulating more and more SCEVs into the cache. At the end, we would
have a SCEV cache with every value that we ever needed a SCEV for in the
entire module!!! Yowzers. The releaseMemory routine would dump all of
this, but that isn't realy called during normal runs of the pipeline as
far as I can see.
To make matters worse, there *is* actually a key that we don't update
with value handles -- there is a map keyed off of Loop*s. Because
LoopInfo *does* release its memory from run to run, it is entirely
possible to run SCEV over one function, then over another function, and
then lookup a Loop* from the second function but find an entry inserted
for the first function! Ouch.
To make matters still worse, there are plenty of updates that *don't*
trip a value handle. It seems incredibly unlikely that today GVN or
another pass that invalidates SCEV can update values in *just* such
a way that a subsequent run of SCEV will incorrectly find lookups in
a cache, but it is theoretically possible and would be a nightmare to
debug.
With this refactoring, I've fixed all this by actually destroying and
recreating the ScalarEvolution object from run to run. Technically, this
could increase the amount of malloc traffic we see, but then again it is
also technically correct. ;] I don't actually think we're suffering from
tons of malloc traffic from SCEV because if we were, the fact that we
never clear the memory would seem more likely to have come up as an
actual problem before now. So, I've made the simple fix here. If in fact
there are serious issues with too much allocation and deallocation,
I can work on a clever fix that preserves the allocations (while
clearing the data) between each run, but I'd prefer to do that kind of
optimization with a test case / benchmark that shows why we need such
cleverness (and that can test that we actually make it faster). It's
possible that this will make some things faster by making the SCEV
caches have higher locality (due to being significantly smaller) so
until there is a clear benchmark, I think the simple change is best.
Differential Revision: http://reviews.llvm.org/D12063
llvm-svn: 245193
2015-08-17 10:08:17 +08:00
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|
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SE = &getAnalysis<ScalarEvolutionWrapperPass>().getSE();
|
2015-01-15 18:41:28 +08:00
|
|
|
TLI = &getAnalysis<TargetLibraryInfoWrapperPass>().getTLI();
|
2014-01-13 21:07:17 +08:00
|
|
|
DT = &getAnalysis<DominatorTreeWrapperPass>().getDomTree();
|
2015-12-16 03:40:57 +08:00
|
|
|
PreserveLCSSA = mustPreserveAnalysisID(LCSSAID);
|
2013-11-17 07:59:05 +08:00
|
|
|
|
|
|
|
BasicBlock *Header = L->getHeader();
|
2018-05-14 20:53:11 +08:00
|
|
|
LLVM_DEBUG(dbgs() << "LRR: F[" << Header->getParent()->getName() << "] Loop %"
|
|
|
|
<< Header->getName() << " (" << L->getNumBlocks()
|
|
|
|
<< " block(s))\n");
|
2013-11-17 07:59:05 +08:00
|
|
|
|
|
|
|
// For now, we'll handle only single BB loops.
|
|
|
|
if (L->getNumBlocks() > 1)
|
2016-03-22 21:50:57 +08:00
|
|
|
return false;
|
2013-11-17 07:59:05 +08:00
|
|
|
|
|
|
|
if (!SE->hasLoopInvariantBackedgeTakenCount(L))
|
2016-03-22 21:50:57 +08:00
|
|
|
return false;
|
2013-11-17 07:59:05 +08:00
|
|
|
|
2018-06-23 06:58:55 +08:00
|
|
|
const SCEV *BackedgeTakenCount = SE->getBackedgeTakenCount(L);
|
2018-05-14 20:53:11 +08:00
|
|
|
LLVM_DEBUG(dbgs() << "\n Before Reroll:\n" << *(L->getHeader()) << "\n");
|
2018-06-23 06:58:55 +08:00
|
|
|
LLVM_DEBUG(dbgs() << "LRR: backedge-taken count = " << *BackedgeTakenCount
|
|
|
|
<< "\n");
|
2013-11-17 07:59:05 +08:00
|
|
|
|
|
|
|
// First, we need to find the induction variable with respect to which we can
|
|
|
|
// reroll (there may be several possible options).
|
|
|
|
SmallInstructionVector PossibleIVs;
|
2015-07-25 06:01:49 +08:00
|
|
|
IVToIncMap.clear();
|
2016-04-30 08:51:22 +08:00
|
|
|
LoopControlIV = nullptr;
|
2013-11-17 07:59:05 +08:00
|
|
|
collectPossibleIVs(L, PossibleIVs);
|
|
|
|
|
|
|
|
if (PossibleIVs.empty()) {
|
2018-05-14 20:53:11 +08:00
|
|
|
LLVM_DEBUG(dbgs() << "LRR: No possible IVs found\n");
|
2016-03-22 21:50:57 +08:00
|
|
|
return false;
|
2013-11-17 07:59:05 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
ReductionTracker Reductions;
|
|
|
|
collectPossibleReductions(L, Reductions);
|
2016-03-22 21:50:57 +08:00
|
|
|
bool Changed = false;
|
2013-11-17 07:59:05 +08:00
|
|
|
|
|
|
|
// For each possible IV, collect the associated possible set of 'root' nodes
|
|
|
|
// (i+1, i+2, etc.).
|
2016-06-26 20:28:59 +08:00
|
|
|
for (Instruction *PossibleIV : PossibleIVs)
|
2018-06-23 06:58:55 +08:00
|
|
|
if (reroll(PossibleIV, L, Header, BackedgeTakenCount, Reductions)) {
|
2013-11-17 07:59:05 +08:00
|
|
|
Changed = true;
|
|
|
|
break;
|
|
|
|
}
|
2018-05-14 20:53:11 +08:00
|
|
|
LLVM_DEBUG(dbgs() << "\n After Reroll:\n" << *(L->getHeader()) << "\n");
|
2013-11-17 07:59:05 +08:00
|
|
|
|
2016-03-22 21:50:57 +08:00
|
|
|
// Trip count of L has changed so SE must be re-evaluated.
|
|
|
|
if (Changed)
|
|
|
|
SE->forgetLoop(L);
|
|
|
|
|
2013-11-17 07:59:05 +08:00
|
|
|
return Changed;
|
|
|
|
}
|