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llvm-project/llvm/test/CodeGen/X86/implicit-null-check.ll

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[ImplicitNullChecks] Account for implicit-defs as well when updating the liveness. The replaced load may have implicit-defs and those defs may be used in the block of the original load. Make sure to update the liveness accordingly. This is a generalization of r267817. llvm-svn: 268412
2016-05-04 02:09:06 +08:00
; RUN: llc -verify-machineinstrs -O3 -mtriple=x86_64-apple-macosx -enable-implicit-null-checks < %s | FileCheck %s
[CodeGen] Add a pass to fold null checks into nearby memory operations. Summary: This change adds an "ImplicitNullChecks" target dependent pass. This pass folds null checks into memory operation using the FAULTING_LOAD pseudo-op introduced in previous patches. Depends on D10197 Depends on D10199 Depends on D10200 Reviewers: reames, rnk, pgavlin, JosephTremoulet, atrick Reviewed By: atrick Subscribers: ab, JosephTremoulet, llvm-commits Differential Revision: http://reviews.llvm.org/D10201 llvm-svn: 239743
2015-06-16 02:44:27 +08:00
define i32 @imp_null_check_load(i32* %x) {
For faulting ops, include a comment w/the fault destination A faulting_op is one that has specified behavior when a fault occurs, generally redirecting control flow to another location. This change just adds a comment to the assembly output which makes it both human readable, and machine checkable w/o having to parse the FaultMap section. This is used to split a test file into two parts, so that I can (in a near future commit) easily extend the test file to demonstrate another case. llvm-svn: 355982
2019-03-13 05:05:31 +08:00
; CHECK-LABEL: imp_null_check_load:
; CHECK: ## %bb.0: ## %entry
; CHECK-NEXT: Ltmp0:
; CHECK-NEXT: movl (%rdi), %eax ## on-fault: LBB0_1
; CHECK-NEXT: ## %bb.2: ## %not_null
; CHECK-NEXT: retq
; CHECK-NEXT: LBB0_1: ## %is_null
; CHECK-NEXT: movl $42, %eax
; CHECK-NEXT: retq
[CodeGen] Add a pass to fold null checks into nearby memory operations. Summary: This change adds an "ImplicitNullChecks" target dependent pass. This pass folds null checks into memory operation using the FAULTING_LOAD pseudo-op introduced in previous patches. Depends on D10197 Depends on D10199 Depends on D10200 Reviewers: reames, rnk, pgavlin, JosephTremoulet, atrick Reviewed By: atrick Subscribers: ab, JosephTremoulet, llvm-commits Differential Revision: http://reviews.llvm.org/D10201 llvm-svn: 239743
2015-06-16 02:44:27 +08:00
entry:
%c = icmp eq i32* %x, null
[FaultMaps] Let the frontend pre-select implicit null check candidates. Summary: This change introduces a !make.implicit metadata that allows the frontend to pre-select the set of explicit null checks that will be considered for transformation into implicit null checks. The reason for not using profiling data instead of !make.implicit is explained in the change to `FaultMaps.rst`. Reviewers: atrick, reames, pgavlin, JosephTremoulet Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10824 llvm-svn: 241116
2015-07-01 05:22:32 +08:00
br i1 %c, label %is_null, label %not_null, !make.implicit !0
[CodeGen] Add a pass to fold null checks into nearby memory operations. Summary: This change adds an "ImplicitNullChecks" target dependent pass. This pass folds null checks into memory operation using the FAULTING_LOAD pseudo-op introduced in previous patches. Depends on D10197 Depends on D10199 Depends on D10200 Reviewers: reames, rnk, pgavlin, JosephTremoulet, atrick Reviewed By: atrick Subscribers: ab, JosephTremoulet, llvm-commits Differential Revision: http://reviews.llvm.org/D10201 llvm-svn: 239743
2015-06-16 02:44:27 +08:00
is_null:
ret i32 42
not_null:
%t = load i32, i32* %x
ret i32 %t
}
[Test] Add tests for implicit null checks on atomic/volatile instructions llvm-svn: 355983
2019-03-13 05:09:58 +08:00
; TODO: can make implicit
define i32 @imp_null_check_unordered_load(i32* %x) {
; CHECK-LABEL: imp_null_check_unordered_load:
; CHECK: ## %bb.0: ## %entry
[ImplicitNullChecks] Support unordered atomic accesses Update the INC pass to allow folding unordered atomics. This is the first optimization unblocked by the changes landed from D57601. llvm-svn: 356006
2019-03-13 11:25:20 +08:00
; CHECK-NEXT: Ltmp1:
; CHECK-NEXT: movl (%rdi), %eax ## on-fault: LBB1_1
[Test] Add tests for implicit null checks on atomic/volatile instructions llvm-svn: 355983
2019-03-13 05:09:58 +08:00
; CHECK-NEXT: ## %bb.2: ## %not_null
; CHECK-NEXT: retq
; CHECK-NEXT: LBB1_1: ## %is_null
; CHECK-NEXT: movl $42, %eax
; CHECK-NEXT: retq
entry:
%c = icmp eq i32* %x, null
br i1 %c, label %is_null, label %not_null, !make.implicit !0
is_null:
ret i32 42
not_null:
%t = load atomic i32, i32* %x unordered, align 4
ret i32 %t
}
[ImplicitNullCheck] Handle instructions that preserve zero value This is the first in a series of patches to make implicit null checks more general. This patch identifies instructions that preserves zero value of a register and considers that as a valid instruction to hoist along with the faulting load. See added testcases. Reviewed-By: reames, dantrushin Differential Revision: https://reviews.llvm.org/D87108
2020-09-11 01:14:44 +08:00
; TODO: Can be converted into implicit check.
[Test] Add tests for implicit null checks on atomic/volatile instructions llvm-svn: 355983
2019-03-13 05:09:58 +08:00
;; Probably could be implicit, but we're conservative for now
define i32 @imp_null_check_seq_cst_load(i32* %x) {
; CHECK-LABEL: imp_null_check_seq_cst_load:
; CHECK: ## %bb.0: ## %entry
; CHECK-NEXT: testq %rdi, %rdi
; CHECK-NEXT: je LBB2_1
; CHECK-NEXT: ## %bb.2: ## %not_null
; CHECK-NEXT: movl (%rdi), %eax
; CHECK-NEXT: retq
; CHECK-NEXT: LBB2_1: ## %is_null
; CHECK-NEXT: movl $42, %eax
; CHECK-NEXT: retq
entry:
%c = icmp eq i32* %x, null
br i1 %c, label %is_null, label %not_null, !make.implicit !0
is_null:
ret i32 42
not_null:
%t = load atomic i32, i32* %x seq_cst, align 4
ret i32 %t
}
;; Might be memory mapped IO, so can't rely on fault behavior
define i32 @imp_null_check_volatile_load(i32* %x) {
; CHECK-LABEL: imp_null_check_volatile_load:
; CHECK: ## %bb.0: ## %entry
; CHECK-NEXT: testq %rdi, %rdi
; CHECK-NEXT: je LBB3_1
; CHECK-NEXT: ## %bb.2: ## %not_null
; CHECK-NEXT: movl (%rdi), %eax
; CHECK-NEXT: retq
; CHECK-NEXT: LBB3_1: ## %is_null
; CHECK-NEXT: movl $42, %eax
; CHECK-NEXT: retq
entry:
%c = icmp eq i32* %x, null
br i1 %c, label %is_null, label %not_null, !make.implicit !0
is_null:
ret i32 42
not_null:
%t = load volatile i32, i32* %x, align 4
ret i32 %t
}
[Tests] Expand implicit null check coverage llvm-svn: 356004
2019-03-13 11:17:58 +08:00
define i8 @imp_null_check_load_i8(i8* %x) {
; CHECK-LABEL: imp_null_check_load_i8:
; CHECK: ## %bb.0: ## %entry
[ImplicitNullChecks] Support unordered atomic accesses Update the INC pass to allow folding unordered atomics. This is the first optimization unblocked by the changes landed from D57601. llvm-svn: 356006
2019-03-13 11:25:20 +08:00
; CHECK-NEXT: Ltmp2:
[Tests] Expand implicit null check coverage llvm-svn: 356004
2019-03-13 11:17:58 +08:00
; CHECK-NEXT: movb (%rdi), %al ## on-fault: LBB4_1
; CHECK-NEXT: ## %bb.2: ## %not_null
; CHECK-NEXT: retq
; CHECK-NEXT: LBB4_1: ## %is_null
; CHECK-NEXT: movb $42, %al
; CHECK-NEXT: retq
entry:
%c = icmp eq i8* %x, null
br i1 %c, label %is_null, label %not_null, !make.implicit !0
is_null:
ret i8 42
not_null:
%t = load i8, i8* %x
ret i8 %t
}
define i256 @imp_null_check_load_i256(i256* %x) {
; CHECK-LABEL: imp_null_check_load_i256:
; CHECK: ## %bb.0: ## %entry
; CHECK-NEXT: movq %rdi, %rax
[ImplicitNullChecks] Support unordered atomic accesses Update the INC pass to allow folding unordered atomics. This is the first optimization unblocked by the changes landed from D57601. llvm-svn: 356006
2019-03-13 11:25:20 +08:00
; CHECK-NEXT: Ltmp3:
[Tests] Expand implicit null check coverage llvm-svn: 356004
2019-03-13 11:17:58 +08:00
; CHECK-NEXT: movq (%rsi), %rcx ## on-fault: LBB5_1
; CHECK-NEXT: ## %bb.2: ## %not_null
; CHECK-NEXT: movq 8(%rsi), %rdx
; CHECK-NEXT: movq 16(%rsi), %rdi
; CHECK-NEXT: movq 24(%rsi), %rsi
; CHECK-NEXT: movq %rsi, 24(%rax)
; CHECK-NEXT: movq %rdi, 16(%rax)
; CHECK-NEXT: movq %rdx, 8(%rax)
; CHECK-NEXT: movq %rcx, (%rax)
; CHECK-NEXT: retq
; CHECK-NEXT: LBB5_1: ## %is_null
; CHECK-NEXT: movq $0, 24(%rax)
; CHECK-NEXT: movq $0, 16(%rax)
; CHECK-NEXT: movq $0, 8(%rax)
; CHECK-NEXT: movq $42, (%rax)
; CHECK-NEXT: retq
entry:
%c = icmp eq i256* %x, null
br i1 %c, label %is_null, label %not_null, !make.implicit !0
is_null:
ret i256 42
not_null:
%t = load i256, i256* %x
ret i256 %t
}
[Test] Add tests for implicit null checks on atomic/volatile instructions llvm-svn: 355983
2019-03-13 05:09:58 +08:00
[CodeGen] Add a pass to fold null checks into nearby memory operations. Summary: This change adds an "ImplicitNullChecks" target dependent pass. This pass folds null checks into memory operation using the FAULTING_LOAD pseudo-op introduced in previous patches. Depends on D10197 Depends on D10199 Depends on D10200 Reviewers: reames, rnk, pgavlin, JosephTremoulet, atrick Reviewed By: atrick Subscribers: ab, JosephTremoulet, llvm-commits Differential Revision: http://reviews.llvm.org/D10201 llvm-svn: 239743
2015-06-16 02:44:27 +08:00
define i32 @imp_null_check_gep_load(i32* %x) {
For faulting ops, include a comment w/the fault destination A faulting_op is one that has specified behavior when a fault occurs, generally redirecting control flow to another location. This change just adds a comment to the assembly output which makes it both human readable, and machine checkable w/o having to parse the FaultMap section. This is used to split a test file into two parts, so that I can (in a near future commit) easily extend the test file to demonstrate another case. llvm-svn: 355982
2019-03-13 05:05:31 +08:00
; CHECK-LABEL: imp_null_check_gep_load:
; CHECK: ## %bb.0: ## %entry
[ImplicitNullChecks] Support unordered atomic accesses Update the INC pass to allow folding unordered atomics. This is the first optimization unblocked by the changes landed from D57601. llvm-svn: 356006
2019-03-13 11:25:20 +08:00
; CHECK-NEXT: Ltmp4:
[Tests] Expand implicit null check coverage llvm-svn: 356004
2019-03-13 11:17:58 +08:00
; CHECK-NEXT: movl 128(%rdi), %eax ## on-fault: LBB6_1
For faulting ops, include a comment w/the fault destination A faulting_op is one that has specified behavior when a fault occurs, generally redirecting control flow to another location. This change just adds a comment to the assembly output which makes it both human readable, and machine checkable w/o having to parse the FaultMap section. This is used to split a test file into two parts, so that I can (in a near future commit) easily extend the test file to demonstrate another case. llvm-svn: 355982
2019-03-13 05:05:31 +08:00
; CHECK-NEXT: ## %bb.2: ## %not_null
; CHECK-NEXT: retq
[Tests] Expand implicit null check coverage llvm-svn: 356004
2019-03-13 11:17:58 +08:00
; CHECK-NEXT: LBB6_1: ## %is_null
For faulting ops, include a comment w/the fault destination A faulting_op is one that has specified behavior when a fault occurs, generally redirecting control flow to another location. This change just adds a comment to the assembly output which makes it both human readable, and machine checkable w/o having to parse the FaultMap section. This is used to split a test file into two parts, so that I can (in a near future commit) easily extend the test file to demonstrate another case. llvm-svn: 355982
2019-03-13 05:05:31 +08:00
; CHECK-NEXT: movl $42, %eax
; CHECK-NEXT: retq
[CodeGen] Add a pass to fold null checks into nearby memory operations. Summary: This change adds an "ImplicitNullChecks" target dependent pass. This pass folds null checks into memory operation using the FAULTING_LOAD pseudo-op introduced in previous patches. Depends on D10197 Depends on D10199 Depends on D10200 Reviewers: reames, rnk, pgavlin, JosephTremoulet, atrick Reviewed By: atrick Subscribers: ab, JosephTremoulet, llvm-commits Differential Revision: http://reviews.llvm.org/D10201 llvm-svn: 239743
2015-06-16 02:44:27 +08:00
entry:
%c = icmp eq i32* %x, null
[FaultMaps] Let the frontend pre-select implicit null check candidates. Summary: This change introduces a !make.implicit metadata that allows the frontend to pre-select the set of explicit null checks that will be considered for transformation into implicit null checks. The reason for not using profiling data instead of !make.implicit is explained in the change to `FaultMaps.rst`. Reviewers: atrick, reames, pgavlin, JosephTremoulet Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10824 llvm-svn: 241116
2015-07-01 05:22:32 +08:00
br i1 %c, label %is_null, label %not_null, !make.implicit !0
[CodeGen] Add a pass to fold null checks into nearby memory operations. Summary: This change adds an "ImplicitNullChecks" target dependent pass. This pass folds null checks into memory operation using the FAULTING_LOAD pseudo-op introduced in previous patches. Depends on D10197 Depends on D10199 Depends on D10200 Reviewers: reames, rnk, pgavlin, JosephTremoulet, atrick Reviewed By: atrick Subscribers: ab, JosephTremoulet, llvm-commits Differential Revision: http://reviews.llvm.org/D10201 llvm-svn: 239743
2015-06-16 02:44:27 +08:00
is_null:
ret i32 42
not_null:
%x.gep = getelementptr i32, i32* %x, i32 32
%t = load i32, i32* %x.gep
ret i32 %t
}
define i32 @imp_null_check_add_result(i32* %x, i32 %p) {
For faulting ops, include a comment w/the fault destination A faulting_op is one that has specified behavior when a fault occurs, generally redirecting control flow to another location. This change just adds a comment to the assembly output which makes it both human readable, and machine checkable w/o having to parse the FaultMap section. This is used to split a test file into two parts, so that I can (in a near future commit) easily extend the test file to demonstrate another case. llvm-svn: 355982
2019-03-13 05:05:31 +08:00
; CHECK-LABEL: imp_null_check_add_result:
; CHECK: ## %bb.0: ## %entry
[ImplicitNullChecks] Support unordered atomic accesses Update the INC pass to allow folding unordered atomics. This is the first optimization unblocked by the changes landed from D57601. llvm-svn: 356006
2019-03-13 11:25:20 +08:00
; CHECK-NEXT: Ltmp5:
[Tests] Expand implicit null check coverage llvm-svn: 356004
2019-03-13 11:17:58 +08:00
; CHECK-NEXT: addl (%rdi), %esi ## on-fault: LBB7_1
For faulting ops, include a comment w/the fault destination A faulting_op is one that has specified behavior when a fault occurs, generally redirecting control flow to another location. This change just adds a comment to the assembly output which makes it both human readable, and machine checkable w/o having to parse the FaultMap section. This is used to split a test file into two parts, so that I can (in a near future commit) easily extend the test file to demonstrate another case. llvm-svn: 355982
2019-03-13 05:05:31 +08:00
; CHECK-NEXT: ## %bb.2: ## %not_null
; CHECK-NEXT: movl %esi, %eax
; CHECK-NEXT: retq
[Tests] Expand implicit null check coverage llvm-svn: 356004
2019-03-13 11:17:58 +08:00
; CHECK-NEXT: LBB7_1: ## %is_null
For faulting ops, include a comment w/the fault destination A faulting_op is one that has specified behavior when a fault occurs, generally redirecting control flow to another location. This change just adds a comment to the assembly output which makes it both human readable, and machine checkable w/o having to parse the FaultMap section. This is used to split a test file into two parts, so that I can (in a near future commit) easily extend the test file to demonstrate another case. llvm-svn: 355982
2019-03-13 05:05:31 +08:00
; CHECK-NEXT: movl $42, %eax
; CHECK-NEXT: retq
[CodeGen] Add a pass to fold null checks into nearby memory operations. Summary: This change adds an "ImplicitNullChecks" target dependent pass. This pass folds null checks into memory operation using the FAULTING_LOAD pseudo-op introduced in previous patches. Depends on D10197 Depends on D10199 Depends on D10200 Reviewers: reames, rnk, pgavlin, JosephTremoulet, atrick Reviewed By: atrick Subscribers: ab, JosephTremoulet, llvm-commits Differential Revision: http://reviews.llvm.org/D10201 llvm-svn: 239743
2015-06-16 02:44:27 +08:00
entry:
%c = icmp eq i32* %x, null
[FaultMaps] Let the frontend pre-select implicit null check candidates. Summary: This change introduces a !make.implicit metadata that allows the frontend to pre-select the set of explicit null checks that will be considered for transformation into implicit null checks. The reason for not using profiling data instead of !make.implicit is explained in the change to `FaultMaps.rst`. Reviewers: atrick, reames, pgavlin, JosephTremoulet Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10824 llvm-svn: 241116
2015-07-01 05:22:32 +08:00
br i1 %c, label %is_null, label %not_null, !make.implicit !0
[CodeGen] Add a pass to fold null checks into nearby memory operations. Summary: This change adds an "ImplicitNullChecks" target dependent pass. This pass folds null checks into memory operation using the FAULTING_LOAD pseudo-op introduced in previous patches. Depends on D10197 Depends on D10199 Depends on D10200 Reviewers: reames, rnk, pgavlin, JosephTremoulet, atrick Reviewed By: atrick Subscribers: ab, JosephTremoulet, llvm-commits Differential Revision: http://reviews.llvm.org/D10201 llvm-svn: 239743
2015-06-16 02:44:27 +08:00
is_null:
ret i32 42
not_null:
%t = load i32, i32* %x
%p1 = add i32 %t, %p
ret i32 %p1
}
[Tests] Expand implicit null check coverage llvm-svn: 356004
2019-03-13 11:17:58 +08:00
define i32 @imp_null_check_sub_result(i32* %x, i32 %p) {
; CHECK-LABEL: imp_null_check_sub_result:
; CHECK: ## %bb.0: ## %entry
[ImplicitNullChecks] Support unordered atomic accesses Update the INC pass to allow folding unordered atomics. This is the first optimization unblocked by the changes landed from D57601. llvm-svn: 356006
2019-03-13 11:25:20 +08:00
; CHECK-NEXT: Ltmp6:
[Tests] Expand implicit null check coverage llvm-svn: 356004
2019-03-13 11:17:58 +08:00
; CHECK-NEXT: movl (%rdi), %eax ## on-fault: LBB8_1
; CHECK-NEXT: ## %bb.2: ## %not_null
; CHECK-NEXT: subl %esi, %eax
; CHECK-NEXT: retq
; CHECK-NEXT: LBB8_1: ## %is_null
; CHECK-NEXT: movl $42, %eax
; CHECK-NEXT: retq
entry:
%c = icmp eq i32* %x, null
br i1 %c, label %is_null, label %not_null, !make.implicit !0
is_null:
ret i32 42
not_null:
%t = load i32, i32* %x
%p1 = sub i32 %t, %p
ret i32 %p1
}
define i32 @imp_null_check_mul_result(i32* %x, i32 %p) {
; CHECK-LABEL: imp_null_check_mul_result:
; CHECK: ## %bb.0: ## %entry
[ImplicitNullChecks] Support unordered atomic accesses Update the INC pass to allow folding unordered atomics. This is the first optimization unblocked by the changes landed from D57601. llvm-svn: 356006
2019-03-13 11:25:20 +08:00
; CHECK-NEXT: Ltmp7:
[Tests] Expand implicit null check coverage llvm-svn: 356004
2019-03-13 11:17:58 +08:00
; CHECK-NEXT: imull (%rdi), %esi ## on-fault: LBB9_1
; CHECK-NEXT: ## %bb.2: ## %not_null
; CHECK-NEXT: movl %esi, %eax
; CHECK-NEXT: retq
; CHECK-NEXT: LBB9_1: ## %is_null
; CHECK-NEXT: movl $42, %eax
; CHECK-NEXT: retq
entry:
%c = icmp eq i32* %x, null
br i1 %c, label %is_null, label %not_null, !make.implicit !0
is_null:
ret i32 42
not_null:
%t = load i32, i32* %x
%p1 = mul i32 %t, %p
ret i32 %p1
}
define i32 @imp_null_check_udiv_result(i32* %x, i32 %p) {
; CHECK-LABEL: imp_null_check_udiv_result:
; CHECK: ## %bb.0: ## %entry
[ImplicitNullChecks] Support unordered atomic accesses Update the INC pass to allow folding unordered atomics. This is the first optimization unblocked by the changes landed from D57601. llvm-svn: 356006
2019-03-13 11:25:20 +08:00
; CHECK-NEXT: Ltmp8:
[Tests] Expand implicit null check coverage llvm-svn: 356004
2019-03-13 11:17:58 +08:00
; CHECK-NEXT: movl (%rdi), %eax ## on-fault: LBB10_1
; CHECK-NEXT: ## %bb.2: ## %not_null
; CHECK-NEXT: xorl %edx, %edx
; CHECK-NEXT: divl %esi
; CHECK-NEXT: retq
; CHECK-NEXT: LBB10_1: ## %is_null
; CHECK-NEXT: movl $42, %eax
; CHECK-NEXT: retq
entry:
%c = icmp eq i32* %x, null
br i1 %c, label %is_null, label %not_null, !make.implicit !0
is_null:
ret i32 42
not_null:
%t = load i32, i32* %x
%p1 = udiv i32 %t, %p
ret i32 %p1
}
define i32 @imp_null_check_shl_result(i32* %x, i32 %p) {
; CHECK-LABEL: imp_null_check_shl_result:
; CHECK: ## %bb.0: ## %entry
[ImplicitNullChecks] Support unordered atomic accesses Update the INC pass to allow folding unordered atomics. This is the first optimization unblocked by the changes landed from D57601. llvm-svn: 356006
2019-03-13 11:25:20 +08:00
; CHECK-NEXT: Ltmp9:
[Tests] Expand implicit null check coverage llvm-svn: 356004
2019-03-13 11:17:58 +08:00
; CHECK-NEXT: movl (%rdi), %eax ## on-fault: LBB11_1
; CHECK-NEXT: ## %bb.2: ## %not_null
; CHECK-NEXT: movl %esi, %ecx
; CHECK-NEXT: shll %cl, %eax
; CHECK-NEXT: retq
; CHECK-NEXT: LBB11_1: ## %is_null
; CHECK-NEXT: movl $42, %eax
; CHECK-NEXT: retq
entry:
%c = icmp eq i32* %x, null
br i1 %c, label %is_null, label %not_null, !make.implicit !0
is_null:
ret i32 42
not_null:
%t = load i32, i32* %x
%p1 = shl i32 %t, %p
ret i32 %p1
}
define i32 @imp_null_check_lshr_result(i32* %x, i32 %p) {
; CHECK-LABEL: imp_null_check_lshr_result:
; CHECK: ## %bb.0: ## %entry
[ImplicitNullChecks] Support unordered atomic accesses Update the INC pass to allow folding unordered atomics. This is the first optimization unblocked by the changes landed from D57601. llvm-svn: 356006
2019-03-13 11:25:20 +08:00
; CHECK-NEXT: Ltmp10:
[Tests] Expand implicit null check coverage llvm-svn: 356004
2019-03-13 11:17:58 +08:00
; CHECK-NEXT: movl (%rdi), %eax ## on-fault: LBB12_1
; CHECK-NEXT: ## %bb.2: ## %not_null
; CHECK-NEXT: movl %esi, %ecx
; CHECK-NEXT: shrl %cl, %eax
; CHECK-NEXT: retq
; CHECK-NEXT: LBB12_1: ## %is_null
; CHECK-NEXT: movl $42, %eax
; CHECK-NEXT: retq
entry:
%c = icmp eq i32* %x, null
br i1 %c, label %is_null, label %not_null, !make.implicit !0
is_null:
ret i32 42
not_null:
%t = load i32, i32* %x
%p1 = lshr i32 %t, %p
ret i32 %p1
}
[ImplicitNullChecks] Be smarter in picking the memory op. Summary: Before this change ImplicitNullChecks would only pick loads of the form: ``` test Reg, Reg jz elsewhere fallthrough: movl 32(Reg), Reg2 ``` but not (say) ``` test Reg, Reg jz elsewhere fallthrough: inc Reg3 movl 32(Reg), Reg2 ``` This change teaches ImplicitNullChecks to look through "unrelated" instructions like `inc Reg3` when searching for a load instruction to convert to a trapping load. Reviewers: atrick, JosephTremoulet, reames Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D11044 llvm-svn: 241850
2015-07-10 04:13:25 +08:00
define i32 @imp_null_check_hoist_over_unrelated_load(i32* %x, i32* %y, i32* %z) {
For faulting ops, include a comment w/the fault destination A faulting_op is one that has specified behavior when a fault occurs, generally redirecting control flow to another location. This change just adds a comment to the assembly output which makes it both human readable, and machine checkable w/o having to parse the FaultMap section. This is used to split a test file into two parts, so that I can (in a near future commit) easily extend the test file to demonstrate another case. llvm-svn: 355982
2019-03-13 05:05:31 +08:00
; CHECK-LABEL: imp_null_check_hoist_over_unrelated_load:
; CHECK: ## %bb.0: ## %entry
[ImplicitNullChecks] Support unordered atomic accesses Update the INC pass to allow folding unordered atomics. This is the first optimization unblocked by the changes landed from D57601. llvm-svn: 356006
2019-03-13 11:25:20 +08:00
; CHECK-NEXT: Ltmp11:
[Tests] Expand implicit null check coverage llvm-svn: 356004
2019-03-13 11:17:58 +08:00
; CHECK-NEXT: movl (%rdi), %eax ## on-fault: LBB13_1
For faulting ops, include a comment w/the fault destination A faulting_op is one that has specified behavior when a fault occurs, generally redirecting control flow to another location. This change just adds a comment to the assembly output which makes it both human readable, and machine checkable w/o having to parse the FaultMap section. This is used to split a test file into two parts, so that I can (in a near future commit) easily extend the test file to demonstrate another case. llvm-svn: 355982
2019-03-13 05:05:31 +08:00
; CHECK-NEXT: ## %bb.2: ## %not_null
; CHECK-NEXT: movl (%rsi), %ecx
; CHECK-NEXT: movl %ecx, (%rdx)
; CHECK-NEXT: retq
[Tests] Expand implicit null check coverage llvm-svn: 356004
2019-03-13 11:17:58 +08:00
; CHECK-NEXT: LBB13_1: ## %is_null
For faulting ops, include a comment w/the fault destination A faulting_op is one that has specified behavior when a fault occurs, generally redirecting control flow to another location. This change just adds a comment to the assembly output which makes it both human readable, and machine checkable w/o having to parse the FaultMap section. This is used to split a test file into two parts, so that I can (in a near future commit) easily extend the test file to demonstrate another case. llvm-svn: 355982
2019-03-13 05:05:31 +08:00
; CHECK-NEXT: movl $42, %eax
; CHECK-NEXT: retq
[ImplicitNullChecks] Be smarter in picking the memory op. Summary: Before this change ImplicitNullChecks would only pick loads of the form: ``` test Reg, Reg jz elsewhere fallthrough: movl 32(Reg), Reg2 ``` but not (say) ``` test Reg, Reg jz elsewhere fallthrough: inc Reg3 movl 32(Reg), Reg2 ``` This change teaches ImplicitNullChecks to look through "unrelated" instructions like `inc Reg3` when searching for a load instruction to convert to a trapping load. Reviewers: atrick, JosephTremoulet, reames Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D11044 llvm-svn: 241850
2015-07-10 04:13:25 +08:00
entry:
%c = icmp eq i32* %x, null
br i1 %c, label %is_null, label %not_null, !make.implicit !0
is_null:
ret i32 42
not_null:
%t0 = load i32, i32* %y
%t1 = load i32, i32* %x
store i32 %t0, i32* %z
ret i32 %t1
}
[ImplicitNullChecks] Work with implicit defs. Summary: This change generalizes the implicit null checks pass to work with instructions that don't have any explicit register defs. This lets us use X86's `cmp` against memory as faulting load instructions. Reviewers: reames, JosephTremoulet Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D11286 llvm-svn: 242703
2015-07-21 04:31:39 +08:00
define i32 @imp_null_check_via_mem_comparision(i32* %x, i32 %val) {
For faulting ops, include a comment w/the fault destination A faulting_op is one that has specified behavior when a fault occurs, generally redirecting control flow to another location. This change just adds a comment to the assembly output which makes it both human readable, and machine checkable w/o having to parse the FaultMap section. This is used to split a test file into two parts, so that I can (in a near future commit) easily extend the test file to demonstrate another case. llvm-svn: 355982
2019-03-13 05:05:31 +08:00
; CHECK-LABEL: imp_null_check_via_mem_comparision:
; CHECK: ## %bb.0: ## %entry
[ImplicitNullChecks] Support unordered atomic accesses Update the INC pass to allow folding unordered atomics. This is the first optimization unblocked by the changes landed from D57601. llvm-svn: 356006
2019-03-13 11:25:20 +08:00
; CHECK-NEXT: Ltmp12:
[Tests] Expand implicit null check coverage llvm-svn: 356004
2019-03-13 11:17:58 +08:00
; CHECK-NEXT: cmpl %esi, 4(%rdi) ## on-fault: LBB14_3
For faulting ops, include a comment w/the fault destination A faulting_op is one that has specified behavior when a fault occurs, generally redirecting control flow to another location. This change just adds a comment to the assembly output which makes it both human readable, and machine checkable w/o having to parse the FaultMap section. This is used to split a test file into two parts, so that I can (in a near future commit) easily extend the test file to demonstrate another case. llvm-svn: 355982
2019-03-13 05:05:31 +08:00
; CHECK-NEXT: ## %bb.1: ## %not_null
[Tests] Expand implicit null check coverage llvm-svn: 356004
2019-03-13 11:17:58 +08:00
; CHECK-NEXT: jge LBB14_2
For faulting ops, include a comment w/the fault destination A faulting_op is one that has specified behavior when a fault occurs, generally redirecting control flow to another location. This change just adds a comment to the assembly output which makes it both human readable, and machine checkable w/o having to parse the FaultMap section. This is used to split a test file into two parts, so that I can (in a near future commit) easily extend the test file to demonstrate another case. llvm-svn: 355982
2019-03-13 05:05:31 +08:00
; CHECK-NEXT: ## %bb.4: ## %ret_100
; CHECK-NEXT: movl $100, %eax
; CHECK-NEXT: retq
[Tests] Expand implicit null check coverage llvm-svn: 356004
2019-03-13 11:17:58 +08:00
; CHECK-NEXT: LBB14_3: ## %is_null
For faulting ops, include a comment w/the fault destination A faulting_op is one that has specified behavior when a fault occurs, generally redirecting control flow to another location. This change just adds a comment to the assembly output which makes it both human readable, and machine checkable w/o having to parse the FaultMap section. This is used to split a test file into two parts, so that I can (in a near future commit) easily extend the test file to demonstrate another case. llvm-svn: 355982
2019-03-13 05:05:31 +08:00
; CHECK-NEXT: movl $42, %eax
; CHECK-NEXT: retq
[Tests] Expand implicit null check coverage llvm-svn: 356004
2019-03-13 11:17:58 +08:00
; CHECK-NEXT: LBB14_2: ## %ret_200
For faulting ops, include a comment w/the fault destination A faulting_op is one that has specified behavior when a fault occurs, generally redirecting control flow to another location. This change just adds a comment to the assembly output which makes it both human readable, and machine checkable w/o having to parse the FaultMap section. This is used to split a test file into two parts, so that I can (in a near future commit) easily extend the test file to demonstrate another case. llvm-svn: 355982
2019-03-13 05:05:31 +08:00
; CHECK-NEXT: movl $200, %eax
; CHECK-NEXT: retq
[ImplicitNullChecks] Work with implicit defs. Summary: This change generalizes the implicit null checks pass to work with instructions that don't have any explicit register defs. This lets us use X86's `cmp` against memory as faulting load instructions. Reviewers: reames, JosephTremoulet Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D11286 llvm-svn: 242703
2015-07-21 04:31:39 +08:00
entry:
%c = icmp eq i32* %x, null
br i1 %c, label %is_null, label %not_null, !make.implicit !0
is_null:
ret i32 42
not_null:
%x.loc = getelementptr i32, i32* %x, i32 1
%t = load i32, i32* %x.loc
%m = icmp slt i32 %t, %val
br i1 %m, label %ret_100, label %ret_200
ret_100:
ret i32 100
ret_200:
ret i32 200
}
[ImplicitNullCheck] Extend canReorder scope Summary: This change allows a re-order of two intructions if their uses are overlapped. Patch by Serguei Katkov! Reviewers: reames, sanjoy Reviewed By: sanjoy Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D29120 llvm-svn: 293775
2017-02-02 00:04:21 +08:00
define i32 @imp_null_check_gep_load_with_use_dep(i32* %x, i32 %a) {
; CHECK-LABEL: imp_null_check_gep_load_with_use_dep:
For faulting ops, include a comment w/the fault destination A faulting_op is one that has specified behavior when a fault occurs, generally redirecting control flow to another location. This change just adds a comment to the assembly output which makes it both human readable, and machine checkable w/o having to parse the FaultMap section. This is used to split a test file into two parts, so that I can (in a near future commit) easily extend the test file to demonstrate another case. llvm-svn: 355982
2019-03-13 05:05:31 +08:00
; CHECK: ## %bb.0: ## %entry
; CHECK-NEXT: ## kill: def $esi killed $esi def $rsi
[ImplicitNullChecks] Support unordered atomic accesses Update the INC pass to allow folding unordered atomics. This is the first optimization unblocked by the changes landed from D57601. llvm-svn: 356006
2019-03-13 11:25:20 +08:00
; CHECK-NEXT: Ltmp13:
[Tests] Expand implicit null check coverage llvm-svn: 356004
2019-03-13 11:17:58 +08:00
; CHECK-NEXT: movl (%rdi), %eax ## on-fault: LBB15_1
For faulting ops, include a comment w/the fault destination A faulting_op is one that has specified behavior when a fault occurs, generally redirecting control flow to another location. This change just adds a comment to the assembly output which makes it both human readable, and machine checkable w/o having to parse the FaultMap section. This is used to split a test file into two parts, so that I can (in a near future commit) easily extend the test file to demonstrate another case. llvm-svn: 355982
2019-03-13 05:05:31 +08:00
; CHECK-NEXT: ## %bb.2: ## %not_null
; CHECK-NEXT: addl %edi, %esi
; CHECK-NEXT: leal 4(%rax,%rsi), %eax
; CHECK-NEXT: retq
[Tests] Expand implicit null check coverage llvm-svn: 356004
2019-03-13 11:17:58 +08:00
; CHECK-NEXT: LBB15_1: ## %is_null
For faulting ops, include a comment w/the fault destination A faulting_op is one that has specified behavior when a fault occurs, generally redirecting control flow to another location. This change just adds a comment to the assembly output which makes it both human readable, and machine checkable w/o having to parse the FaultMap section. This is used to split a test file into two parts, so that I can (in a near future commit) easily extend the test file to demonstrate another case. llvm-svn: 355982
2019-03-13 05:05:31 +08:00
; CHECK-NEXT: movl $42, %eax
; CHECK-NEXT: retq
[ImplicitNullCheck] Extend canReorder scope Summary: This change allows a re-order of two intructions if their uses are overlapped. Patch by Serguei Katkov! Reviewers: reames, sanjoy Reviewed By: sanjoy Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D29120 llvm-svn: 293775
2017-02-02 00:04:21 +08:00
entry:
%c = icmp eq i32* %x, null
br i1 %c, label %is_null, label %not_null, !make.implicit !0
is_null:
ret i32 42
not_null:
%x.loc = getelementptr i32, i32* %x, i32 1
%y = ptrtoint i32* %x.loc to i32
%b = add i32 %a, %y
%t = load i32, i32* %x
%z = add i32 %t, %b
ret i32 %z
}
[Test] Add a test case fo a missed oppurtunity in implicit null checking llvm-svn: 373813
2019-10-05 07:46:26 +08:00
;; TODO: We could handle this case as we can lift the fence into the
;; previous block before the conditional without changing behavior.
define i32 @imp_null_check_load_fence1(i32* %x) {
; CHECK-LABEL: imp_null_check_load_fence1:
; CHECK: ## %bb.0: ## %entry
; CHECK-NEXT: testq %rdi, %rdi
; CHECK-NEXT: je LBB16_1
; CHECK-NEXT: ## %bb.2: ## %not_null
; CHECK-NEXT: ##MEMBARRIER
; CHECK-NEXT: movl (%rdi), %eax
; CHECK-NEXT: retq
; CHECK-NEXT: LBB16_1: ## %is_null
; CHECK-NEXT: movl $42, %eax
; CHECK-NEXT: retq
entry:
%c = icmp eq i32* %x, null
br i1 %c, label %is_null, label %not_null, !make.implicit !0
is_null:
ret i32 42
not_null:
fence acquire
%t = load i32, i32* %x
ret i32 %t
}
;; TODO: We could handle this case as we can lift the fence into the
;; previous block before the conditional without changing behavior.
define i32 @imp_null_check_load_fence2(i32* %x) {
; CHECK-LABEL: imp_null_check_load_fence2:
; CHECK: ## %bb.0: ## %entry
; CHECK-NEXT: testq %rdi, %rdi
; CHECK-NEXT: je LBB17_1
; CHECK-NEXT: ## %bb.2: ## %not_null
; CHECK-NEXT: mfence
; CHECK-NEXT: movl (%rdi), %eax
; CHECK-NEXT: retq
; CHECK-NEXT: LBB17_1: ## %is_null
; CHECK-NEXT: movl $42, %eax
; CHECK-NEXT: retq
entry:
%c = icmp eq i32* %x, null
br i1 %c, label %is_null, label %not_null, !make.implicit !0
is_null:
ret i32 42
not_null:
fence seq_cst
%t = load i32, i32* %x
ret i32 %t
}
[ImplicitNullCheck] Extend Implicit Null Check scope by using stores Summary: This change allows usage of store instruction for implicit null check. Memory Aliasing Analisys is not used and change conservatively supposes that any store and load may access the same memory. As a result re-ordering of store-store, store-load and load-store is prohibited. Patch by Serguei Katkov! Reviewers: reames, sanjoy Reviewed By: sanjoy Subscribers: atrick, llvm-commits Differential Revision: https://reviews.llvm.org/D29400 llvm-svn: 294338
2017-02-08 03:19:49 +08:00
define void @imp_null_check_store(i32* %x) {
For faulting ops, include a comment w/the fault destination A faulting_op is one that has specified behavior when a fault occurs, generally redirecting control flow to another location. This change just adds a comment to the assembly output which makes it both human readable, and machine checkable w/o having to parse the FaultMap section. This is used to split a test file into two parts, so that I can (in a near future commit) easily extend the test file to demonstrate another case. llvm-svn: 355982
2019-03-13 05:05:31 +08:00
; CHECK-LABEL: imp_null_check_store:
; CHECK: ## %bb.0: ## %entry
[ImplicitNullChecks] Support unordered atomic accesses Update the INC pass to allow folding unordered atomics. This is the first optimization unblocked by the changes landed from D57601. llvm-svn: 356006
2019-03-13 11:25:20 +08:00
; CHECK-NEXT: Ltmp14:
[Test] Add a test case fo a missed oppurtunity in implicit null checking llvm-svn: 373813
2019-10-05 07:46:26 +08:00
; CHECK-NEXT: movl $1, (%rdi) ## on-fault: LBB18_1
For faulting ops, include a comment w/the fault destination A faulting_op is one that has specified behavior when a fault occurs, generally redirecting control flow to another location. This change just adds a comment to the assembly output which makes it both human readable, and machine checkable w/o having to parse the FaultMap section. This is used to split a test file into two parts, so that I can (in a near future commit) easily extend the test file to demonstrate another case. llvm-svn: 355982
2019-03-13 05:05:31 +08:00
; CHECK-NEXT: ## %bb.2: ## %not_null
; CHECK-NEXT: retq
[Test] Add a test case fo a missed oppurtunity in implicit null checking llvm-svn: 373813
2019-10-05 07:46:26 +08:00
; CHECK-NEXT: LBB18_1: ## %is_null
For faulting ops, include a comment w/the fault destination A faulting_op is one that has specified behavior when a fault occurs, generally redirecting control flow to another location. This change just adds a comment to the assembly output which makes it both human readable, and machine checkable w/o having to parse the FaultMap section. This is used to split a test file into two parts, so that I can (in a near future commit) easily extend the test file to demonstrate another case. llvm-svn: 355982
2019-03-13 05:05:31 +08:00
; CHECK-NEXT: retq
[ImplicitNullCheck] Extend Implicit Null Check scope by using stores Summary: This change allows usage of store instruction for implicit null check. Memory Aliasing Analisys is not used and change conservatively supposes that any store and load may access the same memory. As a result re-ordering of store-store, store-load and load-store is prohibited. Patch by Serguei Katkov! Reviewers: reames, sanjoy Reviewed By: sanjoy Subscribers: atrick, llvm-commits Differential Revision: https://reviews.llvm.org/D29400 llvm-svn: 294338
2017-02-08 03:19:49 +08:00
entry:
%c = icmp eq i32* %x, null
br i1 %c, label %is_null, label %not_null, !make.implicit !0
is_null:
ret void
not_null:
store i32 1, i32* %x
ret void
}
[Test] Add tests for implicit null checks on atomic/volatile instructions llvm-svn: 355983
2019-03-13 05:09:58 +08:00
;; TODO: can be implicit
define void @imp_null_check_unordered_store(i32* %x) {
; CHECK-LABEL: imp_null_check_unordered_store:
; CHECK: ## %bb.0: ## %entry
[ImplicitNullChecks] Support unordered atomic accesses Update the INC pass to allow folding unordered atomics. This is the first optimization unblocked by the changes landed from D57601. llvm-svn: 356006
2019-03-13 11:25:20 +08:00
; CHECK-NEXT: Ltmp15:
[Test] Add a test case fo a missed oppurtunity in implicit null checking llvm-svn: 373813
2019-10-05 07:46:26 +08:00
; CHECK-NEXT: movl $1, (%rdi) ## on-fault: LBB19_1
[Test] Add tests for implicit null checks on atomic/volatile instructions llvm-svn: 355983
2019-03-13 05:09:58 +08:00
; CHECK-NEXT: ## %bb.2: ## %not_null
; CHECK-NEXT: retq
[Test] Add a test case fo a missed oppurtunity in implicit null checking llvm-svn: 373813
2019-10-05 07:46:26 +08:00
; CHECK-NEXT: LBB19_1: ## %is_null
[Test] Add tests for implicit null checks on atomic/volatile instructions llvm-svn: 355983
2019-03-13 05:09:58 +08:00
; CHECK-NEXT: retq
entry:
%c = icmp eq i32* %x, null
br i1 %c, label %is_null, label %not_null, !make.implicit !0
is_null:
ret void
not_null:
store atomic i32 1, i32* %x unordered, align 4
ret void
}
Fix implicit null check with negative offset Summary: It seems that negative offset was accidentally allowed in D17967. AFAICT small negative offset should be valid (always raise segfault) on all archs that I'm aware of (especially x86, which is the only one with this optimization enabled) and such case can be useful when loading hiden metadata from an object. However, like the positive side, it should only be done within a certain limit. For now, use the same limit on the positive side for the negative side. A separate option can be added if needs appear. Reviewers: mcrosier, skatkov Reviewed By: skatkov Subscribers: sanjoy, llvm-commits Differential Revision: https://reviews.llvm.org/D38925 llvm-svn: 315991
2017-10-17 19:47:36 +08:00
define i32 @imp_null_check_neg_gep_load(i32* %x) {
For faulting ops, include a comment w/the fault destination A faulting_op is one that has specified behavior when a fault occurs, generally redirecting control flow to another location. This change just adds a comment to the assembly output which makes it both human readable, and machine checkable w/o having to parse the FaultMap section. This is used to split a test file into two parts, so that I can (in a near future commit) easily extend the test file to demonstrate another case. llvm-svn: 355982
2019-03-13 05:05:31 +08:00
; CHECK-LABEL: imp_null_check_neg_gep_load:
; CHECK: ## %bb.0: ## %entry
[ImplicitNullChecks] Support unordered atomic accesses Update the INC pass to allow folding unordered atomics. This is the first optimization unblocked by the changes landed from D57601. llvm-svn: 356006
2019-03-13 11:25:20 +08:00
; CHECK-NEXT: Ltmp16:
[Test] Add a test case fo a missed oppurtunity in implicit null checking llvm-svn: 373813
2019-10-05 07:46:26 +08:00
; CHECK-NEXT: movl -128(%rdi), %eax ## on-fault: LBB20_1
For faulting ops, include a comment w/the fault destination A faulting_op is one that has specified behavior when a fault occurs, generally redirecting control flow to another location. This change just adds a comment to the assembly output which makes it both human readable, and machine checkable w/o having to parse the FaultMap section. This is used to split a test file into two parts, so that I can (in a near future commit) easily extend the test file to demonstrate another case. llvm-svn: 355982
2019-03-13 05:05:31 +08:00
; CHECK-NEXT: ## %bb.2: ## %not_null
; CHECK-NEXT: retq
[Test] Add a test case fo a missed oppurtunity in implicit null checking llvm-svn: 373813
2019-10-05 07:46:26 +08:00
; CHECK-NEXT: LBB20_1: ## %is_null
For faulting ops, include a comment w/the fault destination A faulting_op is one that has specified behavior when a fault occurs, generally redirecting control flow to another location. This change just adds a comment to the assembly output which makes it both human readable, and machine checkable w/o having to parse the FaultMap section. This is used to split a test file into two parts, so that I can (in a near future commit) easily extend the test file to demonstrate another case. llvm-svn: 355982
2019-03-13 05:05:31 +08:00
; CHECK-NEXT: movl $42, %eax
; CHECK-NEXT: retq
Fix implicit null check with negative offset Summary: It seems that negative offset was accidentally allowed in D17967. AFAICT small negative offset should be valid (always raise segfault) on all archs that I'm aware of (especially x86, which is the only one with this optimization enabled) and such case can be useful when loading hiden metadata from an object. However, like the positive side, it should only be done within a certain limit. For now, use the same limit on the positive side for the negative side. A separate option can be added if needs appear. Reviewers: mcrosier, skatkov Reviewed By: skatkov Subscribers: sanjoy, llvm-commits Differential Revision: https://reviews.llvm.org/D38925 llvm-svn: 315991
2017-10-17 19:47:36 +08:00
entry:
%c = icmp eq i32* %x, null
br i1 %c, label %is_null, label %not_null, !make.implicit !0
is_null:
ret i32 42
not_null:
%x.gep = getelementptr i32, i32* %x, i32 -32
%t = load i32, i32* %x.gep
ret i32 %t
}
[ImplicitNullCheck] Handle instructions that preserve zero value This is the first in a series of patches to make implicit null checks more general. This patch identifies instructions that preserves zero value of a register and considers that as a valid instruction to hoist along with the faulting load. See added testcases. Reviewed-By: reames, dantrushin Differential Revision: https://reviews.llvm.org/D87108
2020-09-11 01:14:44 +08:00
; This redefines the null check reg by doing a zero-extend and a shift on
; itself.
; Converted into implicit null check since both of these operations do not
; change the nullness of %x (i.e. if it is null, it remains null).
define i64 @imp_null_check_load_shift_addr(i64* %x) {
; CHECK-LABEL: imp_null_check_load_shift_addr:
; CHECK: ## %bb.0: ## %entry
; CHECK-NEXT: shlq $6, %rdi
; CHECK-NEXT: Ltmp17:
; CHECK-NEXT: movq 8(%rdi), %rax ## on-fault: LBB21_1
; CHECK-NEXT: ## %bb.2: ## %not_null
; CHECK-NEXT: retq
; CHECK-NEXT: LBB21_1: ## %is_null
; CHECK-NEXT: movl $42, %eax
; CHECK-NEXT: retq
entry:
%c = icmp eq i64* %x, null
br i1 %c, label %is_null, label %not_null, !make.implicit !0
is_null:
ret i64 42
not_null:
%y = ptrtoint i64* %x to i64
%shry = shl i64 %y, 6
%y.ptr = inttoptr i64 %shry to i64*
%x.loc = getelementptr i64, i64* %y.ptr, i64 1
%t = load i64, i64* %x.loc
ret i64 %t
}
; Same as imp_null_check_load_shift_addr but shift is by 3 and this is now
; converted into complex addressing.
define i64 @imp_null_check_load_shift_by_3_addr(i64* %x) {
; CHECK-LABEL: imp_null_check_load_shift_by_3_addr:
; CHECK: ## %bb.0: ## %entry
[ImplicitNullChecks] Support complex addressing mode The pass is updated to handle loads through complex addressing mode, specifically, when we have a scaled register and a scale. It requires two API updates in TII which have been implemented for X86. See added IR and MIR testcases. Tests-Run: make check Reviewed-By: reames, danstrushin Differential Revision: https://reviews.llvm.org/D87148
2020-09-24 23:00:46 +08:00
; CHECK-NEXT: Ltmp18:
; CHECK-NEXT: movq 8(,%rdi,8), %rax ## on-fault: LBB22_1
[ImplicitNullCheck] Handle instructions that preserve zero value This is the first in a series of patches to make implicit null checks more general. This patch identifies instructions that preserves zero value of a register and considers that as a valid instruction to hoist along with the faulting load. See added testcases. Reviewed-By: reames, dantrushin Differential Revision: https://reviews.llvm.org/D87108
2020-09-11 01:14:44 +08:00
; CHECK-NEXT: ## %bb.2: ## %not_null
; CHECK-NEXT: retq
; CHECK-NEXT: LBB22_1: ## %is_null
; CHECK-NEXT: movl $42, %eax
; CHECK-NEXT: retq
entry:
%c = icmp eq i64* %x, null
br i1 %c, label %is_null, label %not_null, !make.implicit !0
is_null:
ret i64 42
not_null:
%y = ptrtoint i64* %x to i64
%shry = shl i64 %y, 3
%y.ptr = inttoptr i64 %shry to i64*
%x.loc = getelementptr i64, i64* %y.ptr, i64 1
%t = load i64, i64* %x.loc
ret i64 %t
}
[ImplicitNullChecks] Support complex addressing mode The pass is updated to handle loads through complex addressing mode, specifically, when we have a scaled register and a scale. It requires two API updates in TII which have been implemented for X86. See added IR and MIR testcases. Tests-Run: make check Reviewed-By: reames, danstrushin Differential Revision: https://reviews.llvm.org/D87148
2020-09-24 23:00:46 +08:00
define i64 @imp_null_check_load_shift_add_addr(i64* %x) {
; CHECK-LABEL: imp_null_check_load_shift_add_addr:
; CHECK: ## %bb.0: ## %entry
; CHECK: movq 3526(,%rdi,8), %rax ## on-fault: LBB23_1
; CHECK-NEXT: ## %bb.2: ## %not_null
; CHECK-NEXT: retq
; CHECK-NEXT: LBB23_1: ## %is_null
; CHECK-NEXT: movl $42, %eax
; CHECK-NEXT: retq
entry:
%c = icmp eq i64* %x, null
br i1 %c, label %is_null, label %not_null, !make.implicit !0
is_null:
ret i64 42
not_null:
%y = ptrtoint i64* %x to i64
%shry = shl i64 %y, 3
%shry.add = add i64 %shry, 3518
%y.ptr = inttoptr i64 %shry.add to i64*
%x.loc = getelementptr i64, i64* %y.ptr, i64 1
%t = load i64, i64* %x.loc
ret i64 %t
}
[FaultMaps] Let the frontend pre-select implicit null check candidates. Summary: This change introduces a !make.implicit metadata that allows the frontend to pre-select the set of explicit null checks that will be considered for transformation into implicit null checks. The reason for not using profiling data instead of !make.implicit is explained in the change to `FaultMaps.rst`. Reviewers: atrick, reames, pgavlin, JosephTremoulet Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10824 llvm-svn: 241116
2015-07-01 05:22:32 +08:00
!0 = !{}