forked from OSchip/llvm-project
40 lines
562 B
TableGen
40 lines
562 B
TableGen
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// RUN: llvm-tblgen %s | FileCheck %s
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// XFAIL: vg_leak
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// CHECK: --- Defs ---
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// CHECK: def X0 {
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// CHECK: int ret = 0;
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// CHECK: }
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// CHECK: def X1 {
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// CHECK: int ret = 1;
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// CHECK: }
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// CHECK: def Y0 {
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// CHECK: int ret = 0;
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// CHECK: }
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// CHECK: def Y1 {
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// CHECK: int ret = 11;
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// CHECK: }
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class A<int dummy>;
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class B<int num> : A<num> {
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int Num = num;
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}
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class X<A a> {
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int ret = !isa<B>(a);
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}
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class Y<A a> {
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int ret = !if(!isa<B>(a), !cast<B>(a).Num, 0);
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}
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def X0 : X<A<0>>;
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def X1 : X<B<0>>;
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def Y0 : Y<A<10>>;
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def Y1 : Y<B<11>>;
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