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llvm-project/llvm/test/CodeGen/AArch64/neg-imm.ll

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[MBP] Move a latch block with conditional exit and multi predecessors to top of loop Current findBestLoopTop can find and move one kind of block to top, a latch block has one successor. Another common case is: * a latch block * it has two successors, one is loop header, another is exit * it has more than one predecessors If it is below one of its predecessors P, only P can fall through to it, all other predecessors need a jump to it, and another conditional jump to loop header. If it is moved before loop header, all its predecessors jump to it, then fall through to loop header. So all its predecessors except P can reduce one taken branch. Differential Revision: https://reviews.llvm.org/D43256 llvm-svn: 363471
2019-06-15 07:08:59 +08:00
; RUN: llc -mtriple=aarch64-linux-gnu -verify-machineinstrs -disable-block-placement -o - %s | FileCheck %s
Reapply [AArch64] Fix isLegalAddImmediate() to return true for valid negative values. Originally reviewed here: http://reviews.llvm.org/D17463 llvm-svn: 272023
2016-06-08 00:48:43 +08:00
; LSR used to pick a sub-optimal solution due to the target responding
; conservatively to isLegalAddImmediate for negative values.
declare void @foo(i32)
define void @test(i32 %px) {
; CHECK_LABEL: test:
; CHECK_LABEL: %entry
Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding" Re-enable commit r323991 now that r325931 has been committed to make MachineOperand::isRenamable() check more conservative w.r.t. code changes and opt-in on a per-target basis. llvm-svn: 326208
2018-02-28 00:59:10 +08:00
; CHECK: subs [[REG0:w[0-9]+]],
; CHECK: csel {{w[0-9]+}}, wzr, [[REG0]]
Reapply [AArch64] Fix isLegalAddImmediate() to return true for valid negative values. Originally reviewed here: http://reviews.llvm.org/D17463 llvm-svn: 272023
2016-06-08 00:48:43 +08:00
entry:
%sub = add nsw i32 %px, -1
%cmp = icmp slt i32 %px, 1
%.sub = select i1 %cmp, i32 0, i32 %sub
br label %for.body
for.body:
; CHECK_LABEL: %for.body
; CHECK: cmp
; CHECK-NEXT: b.eq
; CHECK-LABEL: %if.then3
%x.015 = phi i32 [ %inc, %for.inc ], [ %.sub, %entry ]
%cmp2 = icmp eq i32 %x.015, %px
br i1 %cmp2, label %for.inc, label %if.then3
if.then3:
tail call void @foo(i32 %x.015)
br label %for.inc
for.inc:
; CHECK_LABEL: %for.inc
ScheduleDAGInstrs: Add condjump deps to addSchedBarrierDeps() addSchedBarrierDeps() is supposed to add use operands to the ExitSU node. The current implementation adds uses for calls/barrier instruction and the MBB live-outs in all other cases. The use operands of conditional jump instructions were missed. Also added code to macrofusion to set the latencies between nodes to zero to avoid problems with the fusing nodes lingering around in the pending list now. Differential Revision: https://reviews.llvm.org/D25140 llvm-svn: 286544
2016-11-11 09:34:21 +08:00
; CHECK: cmp
; CHECK-NEXT: add
; CHECK-NEXT: b.le
Reapply [AArch64] Fix isLegalAddImmediate() to return true for valid negative values. Originally reviewed here: http://reviews.llvm.org/D17463 llvm-svn: 272023
2016-06-08 00:48:43 +08:00
; CHECK_LABEL: %for.cond.cleanup
%inc = add nsw i32 %x.015, 1
%cmp1 = icmp sgt i32 %x.015, %px
br i1 %cmp1, label %for.cond.cleanup.loopexit, label %for.body
for.cond.cleanup.loopexit:
br label %for.cond.cleanup
for.cond.cleanup:
ret void
}