2016-07-19 21:35:11 +08:00
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; RUN: llc < %s -mtriple=arm64-eabi -enable-misched=false -verify-machineinstrs | FileCheck %s
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2015-05-22 05:36:46 +08:00
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; The next set of tests makes sure we can combine the second instruction into
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; the first.
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; CHECK-LABEL: ldp_int_aa
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; CHECK: ldp w8, w9, [x1]
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; CHECK: str w0, [x1, #8]
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; CHECK: ret
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define i32 @ldp_int_aa(i32 %a, i32* %p) nounwind {
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%tmp = load i32, i32* %p, align 4
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%str.ptr = getelementptr inbounds i32, i32* %p, i64 2
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store i32 %a, i32* %str.ptr, align 4
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%add.ptr = getelementptr inbounds i32, i32* %p, i64 1
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%tmp1 = load i32, i32* %add.ptr, align 4
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%add = add nsw i32 %tmp1, %tmp
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ret i32 %add
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}
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; CHECK-LABEL: ldp_long_aa
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; CHECK: ldp x8, x9, [x1]
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; CHECK: str x0, [x1, #16]
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; CHECK: ret
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define i64 @ldp_long_aa(i64 %a, i64* %p) nounwind {
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%tmp = load i64, i64* %p, align 8
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%str.ptr = getelementptr inbounds i64, i64* %p, i64 2
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store i64 %a, i64* %str.ptr, align 4
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%add.ptr = getelementptr inbounds i64, i64* %p, i64 1
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%tmp1 = load i64, i64* %add.ptr, align 8
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%add = add nsw i64 %tmp1, %tmp
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ret i64 %add
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}
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; CHECK-LABEL: ldp_float_aa
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; CHECK: str s0, [x0, #8]
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; CHECK: ldp s1, s0, [x0]
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; CHECK: ret
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define float @ldp_float_aa(float %a, float* %p) nounwind {
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%tmp = load float, float* %p, align 4
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%str.ptr = getelementptr inbounds float, float* %p, i64 2
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store float %a, float* %str.ptr, align 4
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%add.ptr = getelementptr inbounds float, float* %p, i64 1
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%tmp1 = load float, float* %add.ptr, align 4
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%add = fadd float %tmp, %tmp1
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ret float %add
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}
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; CHECK-LABEL: ldp_double_aa
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; CHECK: str d0, [x0, #16]
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; CHECK: ldp d1, d0, [x0]
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; CHECK: ret
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define double @ldp_double_aa(double %a, double* %p) nounwind {
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%tmp = load double, double* %p, align 8
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%str.ptr = getelementptr inbounds double, double* %p, i64 2
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store double %a, double* %str.ptr, align 4
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%add.ptr = getelementptr inbounds double, double* %p, i64 1
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%tmp1 = load double, double* %add.ptr, align 8
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%add = fadd double %tmp, %tmp1
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ret double %add
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}
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