2018-05-03 21:33:07 +08:00
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=-bmi < %s | FileCheck %s --check-prefix=CHECK-NOBMI
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; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+bmi < %s | FileCheck %s --check-prefix=CHECK-BMI
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; Compare if negative and select of constants where one constant is zero.
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define i32 @neg_sel_constants(i32 %a) {
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; CHECK-NOBMI-LABEL: neg_sel_constants:
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; CHECK-NOBMI: # %bb.0:
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; CHECK-NOBMI-NEXT: sarl $31, %edi
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; CHECK-NOBMI-NEXT: andl $5, %edi
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; CHECK-NOBMI-NEXT: movl %edi, %eax
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; CHECK-NOBMI-NEXT: retq
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;
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; CHECK-BMI-LABEL: neg_sel_constants:
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; CHECK-BMI: # %bb.0:
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; CHECK-BMI-NEXT: sarl $31, %edi
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; CHECK-BMI-NEXT: andl $5, %edi
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; CHECK-BMI-NEXT: movl %edi, %eax
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; CHECK-BMI-NEXT: retq
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%tmp.1 = icmp slt i32 %a, 0
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%retval = select i1 %tmp.1, i32 5, i32 0
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ret i32 %retval
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}
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; Compare if negative and select of constants where one constant is zero and the other is a single bit.
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define i32 @neg_sel_special_constant(i32 %a) {
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; CHECK-NOBMI-LABEL: neg_sel_special_constant:
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; CHECK-NOBMI: # %bb.0:
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; CHECK-NOBMI-NEXT: shrl $22, %edi
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; CHECK-NOBMI-NEXT: andl $512, %edi # imm = 0x200
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; CHECK-NOBMI-NEXT: movl %edi, %eax
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; CHECK-NOBMI-NEXT: retq
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;
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; CHECK-BMI-LABEL: neg_sel_special_constant:
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; CHECK-BMI: # %bb.0:
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; CHECK-BMI-NEXT: shrl $22, %edi
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; CHECK-BMI-NEXT: andl $512, %edi # imm = 0x200
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; CHECK-BMI-NEXT: movl %edi, %eax
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; CHECK-BMI-NEXT: retq
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%tmp.1 = icmp slt i32 %a, 0
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%retval = select i1 %tmp.1, i32 512, i32 0
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ret i32 %retval
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}
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; Compare if negative and select variable or zero.
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define i32 @neg_sel_variable_and_zero(i32 %a, i32 %b) {
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; CHECK-NOBMI-LABEL: neg_sel_variable_and_zero:
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; CHECK-NOBMI: # %bb.0:
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; CHECK-NOBMI-NEXT: sarl $31, %edi
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; CHECK-NOBMI-NEXT: andl %esi, %edi
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; CHECK-NOBMI-NEXT: movl %edi, %eax
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; CHECK-NOBMI-NEXT: retq
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;
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; CHECK-BMI-LABEL: neg_sel_variable_and_zero:
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; CHECK-BMI: # %bb.0:
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; CHECK-BMI-NEXT: sarl $31, %edi
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; CHECK-BMI-NEXT: andl %esi, %edi
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; CHECK-BMI-NEXT: movl %edi, %eax
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; CHECK-BMI-NEXT: retq
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%tmp.1 = icmp slt i32 %a, 0
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%retval = select i1 %tmp.1, i32 %b, i32 0
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ret i32 %retval
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}
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; Compare if not positive and select the same variable as being compared: smin(a, 0).
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define i32 @not_pos_sel_same_variable(i32 %a) {
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; CHECK-NOBMI-LABEL: not_pos_sel_same_variable:
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; CHECK-NOBMI: # %bb.0:
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; CHECK-NOBMI-NEXT: movl %edi, %eax
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; CHECK-NOBMI-NEXT: sarl $31, %eax
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; CHECK-NOBMI-NEXT: andl %edi, %eax
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; CHECK-NOBMI-NEXT: retq
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;
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; CHECK-BMI-LABEL: not_pos_sel_same_variable:
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; CHECK-BMI: # %bb.0:
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; CHECK-BMI-NEXT: movl %edi, %eax
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; CHECK-BMI-NEXT: sarl $31, %eax
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; CHECK-BMI-NEXT: andl %edi, %eax
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; CHECK-BMI-NEXT: retq
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%tmp = icmp slt i32 %a, 1
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%min = select i1 %tmp, i32 %a, i32 0
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ret i32 %min
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}
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; Flipping the comparison condition can be handled by getting the bitwise not of the sign mask.
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; Compare if positive and select of constants where one constant is zero.
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define i32 @pos_sel_constants(i32 %a) {
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; CHECK-NOBMI-LABEL: pos_sel_constants:
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; CHECK-NOBMI: # %bb.0:
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[DAGCombiner] extend(ifpositive(X)) -> shift-right (not X)
This is almost the same as an existing IR canonicalization in instcombine,
so I'm assuming this is a good early generic DAG combine too.
The motivation comes from reduced bit-hacking for select-of-constants in IR
after rL331486. We want to restore that functionality in the DAG as noted in
the commit comments for that change and the llvm-dev discussion here:
http://lists.llvm.org/pipermail/llvm-dev/2018-July/124433.html
The PPC and AArch tests show that those targets are already doing something
similar. x86 will be neutral in the minimal case and generally better when
this pattern is extended with other ops as shown in the signbit-shift.ll tests.
Note the asymmetry: we don't include the (extend (ifneg X)) transform because
it already exists in SimplifySelectCC(), and that is verified in the later
unchanged tests in the signbit-shift.ll files. Without the 'not' op, the
general transform to use a shift is always a win because that's a single
instruction.
Alive proofs:
https://rise4fun.com/Alive/ysli
Name: if pos, get -1
%c = icmp sgt i16 %x, -1
%r = sext i1 %c to i16
=>
%n = xor i16 %x, -1
%r = ashr i16 %n, 15
Name: if pos, get 1
%c = icmp sgt i16 %x, -1
%r = zext i1 %c to i16
=>
%n = xor i16 %x, -1
%r = lshr i16 %n, 15
Differential Revision: https://reviews.llvm.org/D48970
llvm-svn: 337130
2018-07-16 00:27:07 +08:00
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; CHECK-NOBMI-NEXT: # kill: def $edi killed $edi def $rdi
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; CHECK-NOBMI-NEXT: notl %edi
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; CHECK-NOBMI-NEXT: shrl $31, %edi
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; CHECK-NOBMI-NEXT: leal (%rdi,%rdi,4), %eax
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2018-05-03 21:33:07 +08:00
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; CHECK-NOBMI-NEXT: retq
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;
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; CHECK-BMI-LABEL: pos_sel_constants:
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; CHECK-BMI: # %bb.0:
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[DAGCombiner] extend(ifpositive(X)) -> shift-right (not X)
This is almost the same as an existing IR canonicalization in instcombine,
so I'm assuming this is a good early generic DAG combine too.
The motivation comes from reduced bit-hacking for select-of-constants in IR
after rL331486. We want to restore that functionality in the DAG as noted in
the commit comments for that change and the llvm-dev discussion here:
http://lists.llvm.org/pipermail/llvm-dev/2018-July/124433.html
The PPC and AArch tests show that those targets are already doing something
similar. x86 will be neutral in the minimal case and generally better when
this pattern is extended with other ops as shown in the signbit-shift.ll tests.
Note the asymmetry: we don't include the (extend (ifneg X)) transform because
it already exists in SimplifySelectCC(), and that is verified in the later
unchanged tests in the signbit-shift.ll files. Without the 'not' op, the
general transform to use a shift is always a win because that's a single
instruction.
Alive proofs:
https://rise4fun.com/Alive/ysli
Name: if pos, get -1
%c = icmp sgt i16 %x, -1
%r = sext i1 %c to i16
=>
%n = xor i16 %x, -1
%r = ashr i16 %n, 15
Name: if pos, get 1
%c = icmp sgt i16 %x, -1
%r = zext i1 %c to i16
=>
%n = xor i16 %x, -1
%r = lshr i16 %n, 15
Differential Revision: https://reviews.llvm.org/D48970
llvm-svn: 337130
2018-07-16 00:27:07 +08:00
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; CHECK-BMI-NEXT: # kill: def $edi killed $edi def $rdi
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; CHECK-BMI-NEXT: notl %edi
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; CHECK-BMI-NEXT: shrl $31, %edi
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; CHECK-BMI-NEXT: leal (%rdi,%rdi,4), %eax
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2018-05-03 21:33:07 +08:00
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; CHECK-BMI-NEXT: retq
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%tmp.1 = icmp sgt i32 %a, -1
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%retval = select i1 %tmp.1, i32 5, i32 0
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ret i32 %retval
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}
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; Compare if positive and select of constants where one constant is zero and the other is a single bit.
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define i32 @pos_sel_special_constant(i32 %a) {
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|
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; CHECK-NOBMI-LABEL: pos_sel_special_constant:
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|
|
|
|
; CHECK-NOBMI: # %bb.0:
|
[DAGCombiner] extend(ifpositive(X)) -> shift-right (not X)
This is almost the same as an existing IR canonicalization in instcombine,
so I'm assuming this is a good early generic DAG combine too.
The motivation comes from reduced bit-hacking for select-of-constants in IR
after rL331486. We want to restore that functionality in the DAG as noted in
the commit comments for that change and the llvm-dev discussion here:
http://lists.llvm.org/pipermail/llvm-dev/2018-July/124433.html
The PPC and AArch tests show that those targets are already doing something
similar. x86 will be neutral in the minimal case and generally better when
this pattern is extended with other ops as shown in the signbit-shift.ll tests.
Note the asymmetry: we don't include the (extend (ifneg X)) transform because
it already exists in SimplifySelectCC(), and that is verified in the later
unchanged tests in the signbit-shift.ll files. Without the 'not' op, the
general transform to use a shift is always a win because that's a single
instruction.
Alive proofs:
https://rise4fun.com/Alive/ysli
Name: if pos, get -1
%c = icmp sgt i16 %x, -1
%r = sext i1 %c to i16
=>
%n = xor i16 %x, -1
%r = ashr i16 %n, 15
Name: if pos, get 1
%c = icmp sgt i16 %x, -1
%r = zext i1 %c to i16
=>
%n = xor i16 %x, -1
%r = lshr i16 %n, 15
Differential Revision: https://reviews.llvm.org/D48970
llvm-svn: 337130
2018-07-16 00:27:07 +08:00
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; CHECK-NOBMI-NEXT: notl %edi
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; CHECK-NOBMI-NEXT: shrl $22, %edi
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; CHECK-NOBMI-NEXT: andl $512, %edi # imm = 0x200
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; CHECK-NOBMI-NEXT: movl %edi, %eax
|
2018-05-03 21:33:07 +08:00
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; CHECK-NOBMI-NEXT: retq
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;
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; CHECK-BMI-LABEL: pos_sel_special_constant:
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|
|
|
|
; CHECK-BMI: # %bb.0:
|
[DAGCombiner] extend(ifpositive(X)) -> shift-right (not X)
This is almost the same as an existing IR canonicalization in instcombine,
so I'm assuming this is a good early generic DAG combine too.
The motivation comes from reduced bit-hacking for select-of-constants in IR
after rL331486. We want to restore that functionality in the DAG as noted in
the commit comments for that change and the llvm-dev discussion here:
http://lists.llvm.org/pipermail/llvm-dev/2018-July/124433.html
The PPC and AArch tests show that those targets are already doing something
similar. x86 will be neutral in the minimal case and generally better when
this pattern is extended with other ops as shown in the signbit-shift.ll tests.
Note the asymmetry: we don't include the (extend (ifneg X)) transform because
it already exists in SimplifySelectCC(), and that is verified in the later
unchanged tests in the signbit-shift.ll files. Without the 'not' op, the
general transform to use a shift is always a win because that's a single
instruction.
Alive proofs:
https://rise4fun.com/Alive/ysli
Name: if pos, get -1
%c = icmp sgt i16 %x, -1
%r = sext i1 %c to i16
=>
%n = xor i16 %x, -1
%r = ashr i16 %n, 15
Name: if pos, get 1
%c = icmp sgt i16 %x, -1
%r = zext i1 %c to i16
=>
%n = xor i16 %x, -1
%r = lshr i16 %n, 15
Differential Revision: https://reviews.llvm.org/D48970
llvm-svn: 337130
2018-07-16 00:27:07 +08:00
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; CHECK-BMI-NEXT: notl %edi
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; CHECK-BMI-NEXT: shrl $22, %edi
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; CHECK-BMI-NEXT: andl $512, %edi # imm = 0x200
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; CHECK-BMI-NEXT: movl %edi, %eax
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2018-05-03 21:33:07 +08:00
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; CHECK-BMI-NEXT: retq
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%tmp.1 = icmp sgt i32 %a, -1
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%retval = select i1 %tmp.1, i32 512, i32 0
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ret i32 %retval
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}
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; Compare if positive and select variable or zero.
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define i32 @pos_sel_variable_and_zero(i32 %a, i32 %b) {
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; CHECK-NOBMI-LABEL: pos_sel_variable_and_zero:
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; CHECK-NOBMI: # %bb.0:
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; CHECK-NOBMI-NEXT: xorl %eax, %eax
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; CHECK-NOBMI-NEXT: testl %edi, %edi
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; CHECK-NOBMI-NEXT: cmovnsl %esi, %eax
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; CHECK-NOBMI-NEXT: retq
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;
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; CHECK-BMI-LABEL: pos_sel_variable_and_zero:
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; CHECK-BMI: # %bb.0:
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; CHECK-BMI-NEXT: sarl $31, %edi
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; CHECK-BMI-NEXT: andnl %esi, %edi, %eax
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; CHECK-BMI-NEXT: retq
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%tmp.1 = icmp sgt i32 %a, -1
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%retval = select i1 %tmp.1, i32 %b, i32 0
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ret i32 %retval
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}
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; Compare if not negative or zero and select the same variable as being compared: smax(a, 0).
|
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define i32 @not_neg_sel_same_variable(i32 %a) {
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; CHECK-NOBMI-LABEL: not_neg_sel_same_variable:
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; CHECK-NOBMI: # %bb.0:
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; CHECK-NOBMI-NEXT: xorl %eax, %eax
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; CHECK-NOBMI-NEXT: testl %edi, %edi
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; CHECK-NOBMI-NEXT: cmovnsl %edi, %eax
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; CHECK-NOBMI-NEXT: retq
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;
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; CHECK-BMI-LABEL: not_neg_sel_same_variable:
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; CHECK-BMI: # %bb.0:
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|
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; CHECK-BMI-NEXT: movl %edi, %eax
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; CHECK-BMI-NEXT: sarl $31, %eax
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|
|
; CHECK-BMI-NEXT: andnl %edi, %eax, %eax
|
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; CHECK-BMI-NEXT: retq
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%tmp = icmp sgt i32 %a, 0
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|
%min = select i1 %tmp, i32 %a, i32 0
|
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ret i32 %min
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|
}
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|
|
; https://llvm.org/bugs/show_bug.cgi?id=31175
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; ret = (x-y) > 0 ? x-y : 0
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|
|
define i32 @PR31175(i32 %x, i32 %y) {
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; CHECK-NOBMI-LABEL: PR31175:
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; CHECK-NOBMI: # %bb.0:
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|
|
; CHECK-NOBMI-NEXT: xorl %eax, %eax
|
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|
; CHECK-NOBMI-NEXT: subl %esi, %edi
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|
|
; CHECK-NOBMI-NEXT: cmovnsl %edi, %eax
|
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|
|
; CHECK-NOBMI-NEXT: retq
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|
|
;
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|
|
; CHECK-BMI-LABEL: PR31175:
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|
|
; CHECK-BMI: # %bb.0:
|
|
|
|
|
; CHECK-BMI-NEXT: subl %esi, %edi
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|
|
|
|
; CHECK-BMI-NEXT: movl %edi, %eax
|
|
|
|
|
; CHECK-BMI-NEXT: sarl $31, %eax
|
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|
|
; CHECK-BMI-NEXT: andnl %edi, %eax, %eax
|
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|
; CHECK-BMI-NEXT: retq
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|
%sub = sub nsw i32 %x, %y
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|
%cmp = icmp sgt i32 %sub, 0
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|
%sel = select i1 %cmp, i32 %sub, i32 0
|
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|
ret i32 %sel
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|
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|
|
}
|