2018-05-18 09:03:01 +08:00
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; RUN: llc -mcpu=skylake-avx512 -mtriple=x86_64-unknown-linux-gnu %s -o - | FileCheck %s
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2018-05-18 12:36:38 +08:00
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; RUN: llc -mcpu=skylake-avx512 -mtriple=x86_64-unknown-linux-gnu %s -o - | llvm-mc -triple=x86_64-unknown-linux-gnu
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2018-05-18 09:03:01 +08:00
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; Check that the X86 domain reassignment pass doesn't introduce an illegal
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; test instruction. See PR37396
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define void @japi1_foo2_34617() {
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pass2:
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br label %if5
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L174:
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%tmp = icmp sgt <2 x i64> undef, zeroinitializer
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%tmp1 = icmp sle <2 x i64> undef, undef
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%tmp2 = and <2 x i1> %tmp, %tmp1
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%tmp3 = extractelement <2 x i1> %tmp2, i32 0
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%tmp4 = extractelement <2 x i1> %tmp2, i32 1
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%tmp106 = and i1 %tmp4, %tmp3
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%tmp107 = zext i1 %tmp106 to i8
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%tmp108 = and i8 %tmp122, %tmp107
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%tmp109 = icmp eq i8 %tmp108, 0
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; CHECK-NOT: testb {{%k[0-7]}}
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br i1 %tmp109, label %L188, label %L190
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if5:
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%b.055 = phi i8 [ 1, %pass2 ], [ %tmp122, %if5 ]
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%tmp118 = icmp sgt i64 undef, 0
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%tmp119 = icmp sle i64 undef, undef
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%tmp120 = and i1 %tmp118, %tmp119
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%tmp121 = zext i1 %tmp120 to i8
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%tmp122 = and i8 %b.055, %tmp121
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br i1 undef, label %L174, label %if5
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L188:
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unreachable
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L190:
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ret void
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}
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