2017-10-09 03:18:10 +08:00
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-linux -mattr=+sse4.2 | FileCheck %s --check-prefix=X86 --check-prefix=X86-SSE
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; RUN: llc < %s -mtriple=i686-linux -mattr=+avx | FileCheck %s --check-prefix=X86 --check-prefix=X86-AVX --check-prefix=X86-AVX1
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; RUN: llc < %s -mtriple=i686-linux -mattr=+avx2 | FileCheck %s --check-prefix=X86 --check-prefix=X86-AVX --check-prefix=X86-AVX2
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; RUN: llc < %s -mtriple=x86_64-linux -mattr=+sse4.2 | FileCheck %s --check-prefix=X64 --check-prefix=X64-SSE
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; RUN: llc < %s -mtriple=x86_64-linux -mattr=+avx | FileCheck %s --check-prefix=X64 --check-prefix=X64-AVX --check-prefix=X64-AVX1
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; RUN: llc < %s -mtriple=x86_64-linux -mattr=+avx2 | FileCheck %s --check-prefix=X64 --check-prefix=X64-AVX --check-prefix=X64-AVX2
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; PR27708
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define <7 x i64> @load7_aligned(<7 x i64>* %x) {
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; X86-SSE-LABEL: load7_aligned:
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; X86-SSE: # BB#0:
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; X86-SSE-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-SSE-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-SSE-NEXT: movaps (%ecx), %xmm0
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; X86-SSE-NEXT: movaps 16(%ecx), %xmm1
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; X86-SSE-NEXT: movaps 32(%ecx), %xmm2
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; X86-SSE-NEXT: movl 48(%ecx), %edx
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; X86-SSE-NEXT: movl 52(%ecx), %ecx
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; X86-SSE-NEXT: movl %ecx, 52(%eax)
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; X86-SSE-NEXT: movl %edx, 48(%eax)
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; X86-SSE-NEXT: movaps %xmm2, 32(%eax)
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; X86-SSE-NEXT: movaps %xmm1, 16(%eax)
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; X86-SSE-NEXT: movaps %xmm0, (%eax)
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; X86-SSE-NEXT: retl $4
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;
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2017-10-22 04:19:48 +08:00
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; X86-AVX-LABEL: load7_aligned:
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; X86-AVX: # BB#0:
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; X86-AVX-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-AVX-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-AVX-NEXT: vmovaps (%ecx), %ymm0
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; X86-AVX-NEXT: vmovaps 32(%ecx), %ymm1
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; X86-AVX-NEXT: vmovaps %ymm0, (%eax)
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; X86-AVX-NEXT: vextractf128 $1, %ymm1, %xmm0
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; X86-AVX-NEXT: vextractps $1, %xmm0, 52(%eax)
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; X86-AVX-NEXT: vmovss %xmm0, 48(%eax)
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; X86-AVX-NEXT: vmovaps %xmm1, 32(%eax)
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; X86-AVX-NEXT: vzeroupper
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; X86-AVX-NEXT: retl $4
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2017-10-09 03:18:10 +08:00
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;
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; X64-SSE-LABEL: load7_aligned:
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; X64-SSE: # BB#0:
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; X64-SSE-NEXT: movaps (%rsi), %xmm0
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; X64-SSE-NEXT: movaps 16(%rsi), %xmm1
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; X64-SSE-NEXT: movaps 32(%rsi), %xmm2
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; X64-SSE-NEXT: movq 48(%rsi), %rax
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; X64-SSE-NEXT: movq %rax, 48(%rdi)
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; X64-SSE-NEXT: movaps %xmm2, 32(%rdi)
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; X64-SSE-NEXT: movaps %xmm1, 16(%rdi)
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; X64-SSE-NEXT: movaps %xmm0, (%rdi)
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; X64-SSE-NEXT: movq %rdi, %rax
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; X64-SSE-NEXT: retq
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;
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; X64-AVX-LABEL: load7_aligned:
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; X64-AVX: # BB#0:
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; X64-AVX-NEXT: vmovaps (%rsi), %ymm0
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; X64-AVX-NEXT: vmovaps 32(%rsi), %ymm1
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; X64-AVX-NEXT: vmovaps %ymm0, (%rdi)
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; X64-AVX-NEXT: vextractf128 $1, %ymm1, %xmm0
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; X64-AVX-NEXT: vmovlps %xmm0, 48(%rdi)
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; X64-AVX-NEXT: vmovaps %xmm1, 32(%rdi)
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; X64-AVX-NEXT: movq %rdi, %rax
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; X64-AVX-NEXT: vzeroupper
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; X64-AVX-NEXT: retq
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%x1 = load <7 x i64>, <7 x i64>* %x
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ret <7 x i64> %x1
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}
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define <7 x i64> @load7_unaligned(<7 x i64>* %x) {
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; X86-SSE-LABEL: load7_unaligned:
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; X86-SSE: # BB#0:
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; X86-SSE-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-SSE-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-SSE-NEXT: movups (%ecx), %xmm0
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; X86-SSE-NEXT: movups 16(%ecx), %xmm1
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; X86-SSE-NEXT: movups 32(%ecx), %xmm2
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; X86-SSE-NEXT: movl 48(%ecx), %edx
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; X86-SSE-NEXT: movl 52(%ecx), %ecx
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; X86-SSE-NEXT: movl %ecx, 52(%eax)
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; X86-SSE-NEXT: movl %edx, 48(%eax)
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; X86-SSE-NEXT: movaps %xmm2, 32(%eax)
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; X86-SSE-NEXT: movaps %xmm1, 16(%eax)
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; X86-SSE-NEXT: movaps %xmm0, (%eax)
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; X86-SSE-NEXT: retl $4
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;
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; X86-AVX-LABEL: load7_unaligned:
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; X86-AVX: # BB#0:
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; X86-AVX-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-AVX-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-AVX-NEXT: vmovups (%ecx), %ymm0
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; X86-AVX-NEXT: vmovups 32(%ecx), %xmm1
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; X86-AVX-NEXT: movl 48(%ecx), %edx
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; X86-AVX-NEXT: movl 52(%ecx), %ecx
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; X86-AVX-NEXT: movl %ecx, 52(%eax)
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; X86-AVX-NEXT: movl %edx, 48(%eax)
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; X86-AVX-NEXT: vmovaps %xmm1, 32(%eax)
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; X86-AVX-NEXT: vmovaps %ymm0, (%eax)
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; X86-AVX-NEXT: vzeroupper
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; X86-AVX-NEXT: retl $4
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;
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; X64-SSE-LABEL: load7_unaligned:
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; X64-SSE: # BB#0:
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; X64-SSE-NEXT: movups (%rsi), %xmm0
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; X64-SSE-NEXT: movups 16(%rsi), %xmm1
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; X64-SSE-NEXT: movups 32(%rsi), %xmm2
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; X64-SSE-NEXT: movq 48(%rsi), %rax
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; X64-SSE-NEXT: movq %rax, 48(%rdi)
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; X64-SSE-NEXT: movaps %xmm2, 32(%rdi)
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; X64-SSE-NEXT: movaps %xmm1, 16(%rdi)
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; X64-SSE-NEXT: movaps %xmm0, (%rdi)
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; X64-SSE-NEXT: movq %rdi, %rax
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; X64-SSE-NEXT: retq
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;
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; X64-AVX-LABEL: load7_unaligned:
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; X64-AVX: # BB#0:
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; X64-AVX-NEXT: vmovups (%rsi), %ymm0
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; X64-AVX-NEXT: vmovups 32(%rsi), %xmm1
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; X64-AVX-NEXT: movq 48(%rsi), %rax
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; X64-AVX-NEXT: movq %rax, 48(%rdi)
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; X64-AVX-NEXT: vmovaps %xmm1, 32(%rdi)
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; X64-AVX-NEXT: vmovaps %ymm0, (%rdi)
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; X64-AVX-NEXT: movq %rdi, %rax
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; X64-AVX-NEXT: vzeroupper
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; X64-AVX-NEXT: retq
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%x1 = load <7 x i64>, <7 x i64>* %x, align 1
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ret <7 x i64> %x1
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}
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