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llvm-project/lld/test/ELF/arm-tls-norelax-gd-ie.s

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[ELF] Move `// REQUIRES:` line to the top llvm-svn: 335676
2018-06-27 06:20:04 +08:00
// REQUIRES: arm
[ELF][ARM] Add --no-show-raw-insn and -soname to some ARM tests Delete some insignificant addresses to make it simpler for layout changes. llvm-svn: 370048
2019-08-27 19:50:27 +08:00
// RUN: llvm-mc -filetype=obj -triple=armv7a-none-linux-gnueabi %p/Inputs/arm-tls-get-addr.s -o %t1.o
// RUN: ld.lld %t1.o --shared -soname=t1.so -o %t1.so
[ARM] ARM TLS shouldn't use relaxations The ARM TLS relocations are placed on literal data and not the code-sequence, it is therefore not possible to implement the relaxTls* functions. This change updates handleMipsTlsRelocation() to handleNoRelaxTlsRelocation() and incorporates ARM as well as Mips. The ARM support in handleNoRelaxTlsRelocation() currently needs to ouput the module index dynamic relocation in all cases as it is relying on the dynamic linker to set the module index in the got. Should address PR30218 Differential Revision: https://reviews.llvm.org/D24827 llvm-svn: 282250
2016-09-23 21:54:48 +08:00
// RUN: llvm-mc %s -o %t.o -filetype=obj -triple=armv7a-linux-gnueabi
[ELF][ARM] Allow PT_LOAD to have overlapping p_offset ranges on EM_ARM Port the D64906 technique to ARM. It deletes 3 alignments at PT_LOAD boundaries for the default case: the size of an arm binary decreases by at most 12kb. Reviewed By: grimar Differential Revision: https://reviews.llvm.org/D66749 llvm-svn: 370049
2019-08-27 19:52:36 +08:00
// RUN: ld.lld %t1.so %t.o -o %t
[test] Change llvm-readobj -long-option to --long-option or well-known short options. NFC Also change some options that have different semantics (cause confusion) in llvm-readelf mode: -s => -S -t => --symbols -sd => --section-data llvm-svn: 359651
2019-05-01 13:49:01 +08:00
// RUN: llvm-readobj -S --dyn-relocations %t | FileCheck %s
[ARM] ARM TLS shouldn't use relaxations The ARM TLS relocations are placed on literal data and not the code-sequence, it is therefore not possible to implement the relaxTls* functions. This change updates handleMipsTlsRelocation() to handleNoRelaxTlsRelocation() and incorporates ARM as well as Mips. The ARM support in handleNoRelaxTlsRelocation() currently needs to ouput the module index dynamic relocation in all cases as it is relying on the dynamic linker to set the module index in the got. Should address PR30218 Differential Revision: https://reviews.llvm.org/D24827 llvm-svn: 282250
2016-09-23 21:54:48 +08:00
[ELF][ARM] Increase default max-page-size from 4096 to 6536 See http://lists.llvm.org/pipermail/llvm-dev/2020-April/140549.html For the record, GNU ld changed to 64k max page size in 2014 https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=7572ca8989ead4c3425a1500bc241eaaeffa2c89 "[RFC] ld/ARM: Increase maximum page size to 64kB" Android driver forced 4k page size in AArch64 (D55029) and ARM (D77746). A binary linked with max-page-size=4096 does not run on a system with a higher page size configured. There are some systems out there that do this and it leads to the binary getting `Killed!` by the kernel. In the non-linker-script cases, when linked with -z noseparate-code (default), the max-page-size increase should not cause any size difference. There may be some VMA usage differences, though. Reviewed By: psmith, MaskRay Differential Revision: https://reviews.llvm.org/D77330
2020-04-18 23:06:37 +08:00
/// This tls global-dynamic sequence is with respect to a preemptible symbol but
/// is in an application so a relaxation to Initial Exec would normally be
/// possible. This would result in an assertion failure on ARM as the
/// relaxation functions can't be implemented on ARM. Check that the sequence
/// is handled as global dynamic
[ARM] ARM TLS shouldn't use relaxations The ARM TLS relocations are placed on literal data and not the code-sequence, it is therefore not possible to implement the relaxTls* functions. This change updates handleMipsTlsRelocation() to handleNoRelaxTlsRelocation() and incorporates ARM as well as Mips. The ARM support in handleNoRelaxTlsRelocation() currently needs to ouput the module index dynamic relocation in all cases as it is relying on the dynamic linker to set the module index in the got. Should address PR30218 Differential Revision: https://reviews.llvm.org/D24827 llvm-svn: 282250
2016-09-23 21:54:48 +08:00
.text
.syntax unified
.globl func
.p2align 2
.type func,%function
func:
.L0:
.globl __tls_get_addr
bl __tls_get_addr
bx lr
.p2align 2
.Lt0: .word y(TLSGD) + (. - .L0 - 8)
// CHECK: Dynamic Relocations {
[ELF][ARM] Increase default max-page-size from 4096 to 6536 See http://lists.llvm.org/pipermail/llvm-dev/2020-April/140549.html For the record, GNU ld changed to 64k max page size in 2014 https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=7572ca8989ead4c3425a1500bc241eaaeffa2c89 "[RFC] ld/ARM: Increase maximum page size to 64kB" Android driver forced 4k page size in AArch64 (D55029) and ARM (D77746). A binary linked with max-page-size=4096 does not run on a system with a higher page size configured. There are some systems out there that do this and it leads to the binary getting `Killed!` by the kernel. In the non-linker-script cases, when linked with -z noseparate-code (default), the max-page-size increase should not cause any size difference. There may be some VMA usage differences, though. Reviewed By: psmith, MaskRay Differential Revision: https://reviews.llvm.org/D77330
2020-04-18 23:06:37 +08:00
// CHECK-NEXT: 0x30290 R_ARM_TLS_DTPMOD32 y
// CHECK-NEXT: 0x30294 R_ARM_TLS_DTPOFF32 y
// CHECK-NEXT: 0x402A4 R_ARM_JUMP_SLOT __tls_get_addr