2018-04-19 23:42:30 +08:00
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# RUN: llc -o - %s -march=amdgcn -mcpu=fiji -run-pass=si-insert-waitcnts -verify-machineinstrs | FileCheck -check-prefix=GCN %s
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# GCN-LABEL: waitcnt-back-edge-loop
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# GCN: bb.2
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# GCN: S_WAITCNT 112
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# GCN: $vgpr5 = V_CVT_I32_F32_e32 killed $vgpr5, implicit $exec
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---
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name: waitcnt-back-edge-loop
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body: |
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bb.0:
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successors: %bb.1
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$vgpr1 = V_MOV_B32_e32 0, implicit $exec, implicit-def $vgpr1_vgpr2
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$vgpr2 = V_MOV_B32_e32 0, implicit $exec, implicit-def $vgpr1_vgpr2
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2019-05-01 06:08:23 +08:00
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$vgpr4 = FLAT_LOAD_DWORD $vgpr1_vgpr2, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (volatile load 4 from `float addrspace(1)* null`, addrspace 1)
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$vgpr0 = FLAT_LOAD_DWORD $vgpr1_vgpr2, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (volatile load 4 from `float addrspace(1)* null`, addrspace 1)
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2018-04-19 23:42:30 +08:00
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$sgpr0_sgpr1 = V_CMP_EQ_U32_e64 3, killed $sgpr4, implicit $exec
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2019-03-19 03:25:39 +08:00
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$vgpr3 = V_CNDMASK_B32_e64 0, -1082130432, 0, 1065353216, killed $sgpr0_sgpr1, implicit $exec
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2018-04-19 23:42:30 +08:00
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$vgpr5 = V_MOV_B32_e32 $vgpr0, implicit $exec, implicit $exec
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S_BRANCH %bb.1
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bb.3:
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successors: %bb.1
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2019-05-01 06:08:23 +08:00
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$vgpr5 = FLAT_LOAD_DWORD $vgpr1_vgpr2, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (volatile load 4 from `float addrspace(1)* null`, addrspace 1)
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2018-04-19 23:42:30 +08:00
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bb.1:
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successors: %bb.5, %bb.2
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$vgpr5 = V_CVT_I32_F32_e32 killed $vgpr5, implicit $exec
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V_CMP_NE_U32_e32 0, $vgpr5, implicit-def $vcc, implicit $exec
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$vcc = S_AND_B64 $exec, killed $vcc, implicit-def dead $scc
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S_CBRANCH_VCCZ %bb.5, implicit killed $vcc
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bb.2:
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successors: %bb.4, %bb.3
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V_CMP_EQ_U32_e32 9, killed $vgpr5, implicit-def $vcc, implicit $exec
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$vcc = S_AND_B64 $exec, killed $vcc, implicit-def dead $scc
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S_CBRANCH_VCCZ %bb.3, implicit killed $vcc
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bb.4:
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successors: %bb.3, %bb.1
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2019-05-01 06:08:23 +08:00
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$vgpr5 = FLAT_LOAD_DWORD $vgpr1_vgpr2, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (volatile load 4 from `float addrspace(1)* null`, addrspace 1)
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2018-04-19 23:42:30 +08:00
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$vgpr4 = V_CVT_I32_F32_e32 $vgpr5, implicit $exec
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V_CMP_EQ_U32_e32 2, killed $vgpr4, implicit-def $vcc, implicit $exec
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$vcc = S_AND_B64 $exec, killed $vcc, implicit-def dead $scc
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$vgpr4 = V_MOV_B32_e32 $vgpr5, implicit $exec, implicit $exec
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S_CBRANCH_VCCZ %bb.1, implicit killed $vcc
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S_BRANCH %bb.3
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bb.5:
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$vgpr4 = V_MAC_F32_e32 killed $vgpr0, killed $vgpr3, killed $vgpr4, implicit $exec
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EXP_DONE 12, killed $vgpr4, undef $vgpr0, undef $vgpr0, undef $vgpr0, 0, 0, 15, implicit $exec
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[AMDGPU] Add support for immediate operand for S_ENDPGM
Summary:
Add support for immediate operand in S_ENDPGM
Change-Id: I0c56a076a10980f719fb2a8f16407e9c301013f6
Reviewers: alexshap
Subscribers: qcolombet, arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, tpr, t-tye, eraman, arphaman, Petar.Avramovic, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D59213
llvm-svn: 355902
2019-03-12 17:52:58 +08:00
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S_ENDPGM 0
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2018-04-19 23:42:30 +08:00
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...
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2018-05-30 23:47:45 +08:00
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---
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# GCN-LABEL: name: waitcnt-multiple-back-edges{{$}}
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# GCN: bb.0:
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# GCN: S_WAITCNT 0
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# GCN-NEXT: S_BRANCH %bb.2
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name: waitcnt-multiple-back-edges
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body: |
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bb.0:
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S_BRANCH %bb.2
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bb.1:
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S_BRANCH %bb.2
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bb.2:
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S_CBRANCH_VCCZ %bb.1, implicit $vcc
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bb.3:
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S_CBRANCH_VCCNZ %bb.5, implicit $vcc
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bb.4:
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BUFFER_ATOMIC_ADD_OFFSET renamable $vgpr0, renamable $sgpr12_sgpr13_sgpr14_sgpr15, 0, 4, 0, implicit $exec
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S_CBRANCH_SCC0 %bb.2, implicit $scc
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S_BRANCH %bb.6
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bb.5:
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S_CBRANCH_SCC0 %bb.2, implicit $scc
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S_BRANCH %bb.6
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bb.6:
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S_CBRANCH_SCC1 %bb.0, implicit $scc
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[AMDGPU] Add support for immediate operand for S_ENDPGM
Summary:
Add support for immediate operand in S_ENDPGM
Change-Id: I0c56a076a10980f719fb2a8f16407e9c301013f6
Reviewers: alexshap
Subscribers: qcolombet, arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, tpr, t-tye, eraman, arphaman, Petar.Avramovic, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D59213
llvm-svn: 355902
2019-03-12 17:52:58 +08:00
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S_ENDPGM 0
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2018-05-30 23:47:45 +08:00
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...
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