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llvm-project/llvm/test/CodeGen/AMDGPU/rename-disconnected-bug.ll

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LiveIntervalAnalysis: Fix missing defs in renameDisconnectedComponents(). Fix renameDisconnectedComponents() creating vreg uses that can be reached from function begin withouthaving a definition (or explicit live-in). Fix this by inserting IMPLICIT_DEF instruction before control-flow joins as necessary. Removes an assert from MachineScheduler because we may now get additional IMPLICIT_DEF when preparing the scheduling policy. This fixes the underlying problem of http://llvm.org/PR27705 llvm-svn: 270259
2016-05-21 03:46:13 +08:00
; RUN: llc -verify-machineinstrs -o /dev/null %s
; Check that renameDisconnectedComponents() does not create vregs without a
; definition on every path (there should at least be IMPLICIT_DEF instructions).
target triple = "amdgcn--"
AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel Currently the default C calling convention functions are treated the same as compute kernels. Make this explicit so the default calling convention can be changed to a non-kernel. Converted with perl -pi -e 's/define void/define amdgpu_kernel void/' on the relevant test directories (and undoing in one place that actually wanted a non-kernel). llvm-svn: 298444
2017-03-22 05:39:51 +08:00
define amdgpu_kernel void @func() {
LiveIntervalAnalysis: Fix missing defs in renameDisconnectedComponents(). Fix renameDisconnectedComponents() creating vreg uses that can be reached from function begin withouthaving a definition (or explicit live-in). Fix this by inserting IMPLICIT_DEF instruction before control-flow joins as necessary. Removes an assert from MachineScheduler because we may now get additional IMPLICIT_DEF when preparing the scheduling policy. This fixes the underlying problem of http://llvm.org/PR27705 llvm-svn: 270259
2016-05-21 03:46:13 +08:00
B0:
br i1 undef, label %B1, label %B2
B1:
br label %B2
B2:
%v0 = phi <4 x float> [ zeroinitializer, %B1 ], [ <float 0.0, float 0.0, float 0.0, float undef>, %B0 ]
br i1 undef, label %B20.1, label %B20.2
B20.1:
br label %B20.2
B20.2:
%v2 = phi <4 x float> [ zeroinitializer, %B20.1 ], [ %v0, %B2 ]
br i1 undef, label %B30.1, label %B30.2
B30.1:
%sub = fsub <4 x float> %v2, undef
br label %B30.2
B30.2:
%v3 = phi <4 x float> [ %sub, %B30.1 ], [ %v2, %B20.2 ]
%ve0 = extractelement <4 x float> %v3, i32 0
store float %ve0, float addrspace(3)* undef, align 4
ret void
}