2020-01-28 07:11:45 +08:00
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# RUN: llc -run-pass=aarch64-ldst-opt -mtriple=arm64-apple-iphoneos -aarch64-load-store-renaming=true -verify-machineinstrs -o - %s | FileCheck %s
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2019-12-12 00:24:38 +08:00
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--- |
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2019-12-12 01:17:29 +08:00
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define void @test_dbg_value1() #0 { ret void }
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define void @test_dbg_value2() #0 { ret void }
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2019-12-12 00:24:38 +08:00
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!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "llvm", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: !2)
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!1 = !DIFile(filename: "dbg.ll", directory: "/tmp")
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!2 = !{}
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!5 = distinct !DISubprogram(name: "test_dbg_value", scope: !1, file: !1, line: 1, type: !6, isLocal: false, isDefinition: true, scopeLine: 1, flags: DIFlagPrototyped, isOptimized: false, unit: !0, retainedNodes: !2)
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!6 = !DISubroutineType(types: !2)
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!7 = !DILocalVariable(name: "x", arg: 1, scope: !5, file: !1, line: 1, type: !8)
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!8 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
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!9 = !DILocation(line: 1, column: 1, scope: !5)
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Add -debugify-and-strip-all to add debug info before a pass and remove it after
Summary:
This allows us to test each backend pass under the presence
of debug info using pre-existing tests. The tests should not
fail as a result of this so long as it's true that debug info
does not affect CodeGen.
In practice, a few tests are sensitive to this:
* Tests that check the pass structure (e.g. O0-pipeline.ll)
* Tests that check --debug output. Specifically instruction
dumps containing MMO's (e.g. prelegalizercombiner-extends.ll)
* Tests that contain debugify metadata as mir-strip-debug will
remove it (e.g. fastisel-debugvalue-undef.ll)
* Tests with partial debug info (e.g.
patchable-function-entry-empty.mir had debug info but no
!llvm.dbg.cu)
* Tests that check optimization remarks overly strictly (e.g.
prologue-epilogue-remarks.mir)
* Tests that would inject the pass in an unsafe region (e.g.
seqpairspill.mir would inject between register alloc and
virt reg rewriter)
In all cases, the checks can either be updated or
--debugify-and-strip-all-safe=0 can be used to avoid being
affected by something like llvm-lit -Dllc='llc --debugify-and-strip-all-safe'
I tested this without the lost debug locations verifier to
confirm that AArch64 behaviour is unaffected (with the fixes
in this patch) and with it to confirm it finds the problems
without the additional RUN lines we had before.
Depends on D77886, D77887, D77747
Reviewers: aprantl, vsk, bogner
Subscribers: qcolombet, kristof.beyls, hiraditya, danielkiss, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D77888
2020-04-09 04:48:40 +08:00
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!10 = !{i32 2, !"Debug Info Version", i32 3}
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!llvm.dbg.cu = !{!0}
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!llvm.module.flags = !{!10}
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2019-12-12 00:24:38 +08:00
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---
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# Check we do not crash when checking $noreg debug operands.
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#
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2019-12-12 01:17:29 +08:00
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# CHECK-LABEL: name: test_dbg_value1
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2019-12-12 00:24:38 +08:00
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# CHECK: bb.0:
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# CHECK-NEXT: liveins: $x0, $x1
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# CHECK: $x10, renamable $x8 = LDPXi renamable $x0, 0 :: (load 8)
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# CHECK-NEXT: renamable $x9 = LDRXui renamable $x0, 1 :: (load 8)
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# CHECK-NEXT: STRXui renamable $x9, renamable $x0, 100 :: (store 8, align 4)
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# CHECK-NEXT: DBG_VALUE $x9, $noreg
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# CHECK-NEXT: renamable $x8 = ADDXrr $x8, $x8
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# CHECK-NEXT: STPXi renamable $x8, killed $x10, renamable $x0, 10 :: (store 8, align 4)
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# CHECK-NEXT: RET undef $lr
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2019-12-12 01:17:29 +08:00
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name: test_dbg_value1
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2019-12-12 00:24:38 +08:00
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alignment: 4
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tracksRegLiveness: true
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liveins:
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- { reg: '$x0' }
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- { reg: '$x1' }
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- { reg: '$x8' }
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frameInfo:
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maxAlignment: 1
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maxCallFrameSize: 0
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $x0, $x1
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renamable $x9, renamable $x8 = LDPXi renamable $x0, 0 :: (load 8)
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STRXui renamable killed $x9, renamable $x0, 11 :: (store 8, align 4)
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renamable $x9 = LDRXui renamable $x0, 1 :: (load 8)
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STRXui renamable $x9, renamable $x0, 100 :: (store 8, align 4)
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DBG_VALUE $x9, $noreg, !7, !DIExpression(DW_OP_plus_uconst, 32), debug-location !9
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renamable $x8 = ADDXrr $x8, $x8
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STRXui renamable $x8, renamable $x0, 10 :: (store 8, align 4)
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RET undef $lr
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...
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2019-12-12 01:17:29 +08:00
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# CHECK-LABEL: name: test_dbg_value2
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# CHECK: bb.0:
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# CHECK-NEXT: liveins: $x19, $x20, $x0
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# CHECK: $x8 = ORRXrs $xzr, $x0, 0
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# CHECK-NEXT: renamable $x0 = nuw ADDXri $x0, 8, 0
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# CHECK-NEXT: DBG_VALUE $x0, $noreg,
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# CHECK-NEXT: STRXui killed renamable $x8, renamable $x19, 2 :: (store 8)
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# CHECK-NEXT: $x8 = ADDXrs renamable $x0, killed renamable $x20, 0
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# CHECK-NEXT: STPXi $xzr, renamable $x8, renamable $x19, 0 :: (store 8)
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# CHECK-NEXT: RET undef $lr, implicit $x0
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name: test_dbg_value2
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alignment: 4
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tracksRegLiveness: true
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liveins:
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- { reg: '$x0' }
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- { reg: '$x1' }
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frameInfo:
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maxAlignment: 1
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maxCallFrameSize: 0
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $x19, $x20, $x0
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$x8 = ORRXrs $xzr, $x0, 0
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renamable $x0 = nuw ADDXri $x0, 8, 0
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DBG_VALUE $x0, $noreg, !7, !DIExpression(), debug-location !9
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STRXui killed renamable $x8, renamable $x19, 2 :: (store 8)
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$x8 = ADDXrs renamable $x0, killed renamable $x20, 0
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STRXui $xzr, renamable $x19, 0 :: (store 8)
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STRXui killed renamable $x8, killed renamable $x19, 1 :: (store 8)
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RET undef $lr, implicit $x0
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...
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