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llvm-project/llvm/test/CodeGen/AMDGPU/rel32.ll

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[amdgpu] Fix REL32 relocations with negative offsets. Summary: - The offset should be treated as a signed one. Reviewers: rampitec, arsenm Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, kerbowa, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D82234
2020-06-19 12:09:20 +08:00
; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck %s
@g = protected local_unnamed_addr addrspace(4) externally_initialized global i32 0, align 4
; CHECK-LABEL: rel32_neg_offset:
; CHECK: s_getpc_b64 s{{\[}}[[LO:[0-9]+]]:[[HI:[0-9]+]]{{]}}
; CHECK: s_add_u32 s[[LO]], s[[LO]], g@rel32@lo-4
[AMDGPU] Fix offset for REL32_HI relocs The addend in a REL32 reloc needs to be adjusted to account for the offset from the PC value returned by the s_getpc instruction to the point where the reloc is applied. This was being done correctly for (GOTPC)REL32_LO but not for (GOTPC)REL32_HI. This will only make a difference if the target symbol happens to get loaded almost exactly a multiple of 4G away from the relocated instructions. Differential Revision: https://reviews.llvm.org/D86938
2020-09-01 21:52:01 +08:00
; CHECK: s_addc_u32 s[[HI]], s[[HI]], g@rel32@hi+4
[amdgpu] Fix REL32 relocations with negative offsets. Summary: - The offset should be treated as a signed one. Reviewers: rampitec, arsenm Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, kerbowa, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D82234
2020-06-19 12:09:20 +08:00
define i32 addrspace(4)* @rel32_neg_offset() {
%r = getelementptr i32, i32 addrspace(4)* @g, i64 -2
ret i32 addrspace(4)* %r
}