2018-06-27 06:20:04 +08:00
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// REQUIRES: x86
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2015-09-17 05:57:07 +08:00
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// RUN: llvm-mc -filetype=obj -triple=i686-pc-linux %s -o %t
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2015-09-29 21:36:32 +08:00
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// RUN: llvm-mc -filetype=obj -triple=i686-unknown-linux %p/Inputs/shared.s -o %t2.o
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2015-11-18 14:11:01 +08:00
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// RUN: ld.lld -shared %t2.o -o %t2.so
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2017-10-06 17:37:44 +08:00
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// RUN: ld.lld --hash-style=sysv %t %t2.so -o %t2
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2015-09-29 21:36:32 +08:00
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// RUN: llvm-readobj -s %t2 | FileCheck --check-prefix=ADDR %s
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2015-09-17 05:57:07 +08:00
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// RUN: llvm-objdump -d %t2 | FileCheck %s
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.global _start
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_start:
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.section .R_386_32,"ax",@progbits
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.global R_386_32
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R_386_32:
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2015-09-22 21:35:00 +08:00
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movl $R_386_32 + 1, %edx
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2015-09-17 05:57:07 +08:00
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2015-09-22 21:47:45 +08:00
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.section .R_386_PC32,"ax",@progbits,unique,1
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.global R_386_PC32
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R_386_PC32:
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call R_386_PC32_2
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.section .R_386_PC32,"ax",@progbits,unique,2
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.zero 4
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R_386_PC32_2:
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nop
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2015-09-17 05:57:07 +08:00
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// CHECK: Disassembly of section .R_386_32:
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// CHECK-NEXT: R_386_32:
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Align AArch64 and i386 image base to superpage
Summary:
As for x86_64, the default image base for AArch64 and i386 should be
aligned to a superpage appropriate for the architecture.
On AArch64, this is 2 MiB, on i386 it is 4 MiB.
Reviewers: emaste, grimar, javed.absar, espindola, ruiu, peter.smith, srhines, rprichard
Reviewed By: ruiu, peter.smith
Subscribers: jfb, markj, arichardson, krytarowski, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D50297
llvm-svn: 342746
2018-09-22 00:58:13 +08:00
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// CHECK-NEXT: 401000: {{.*}} movl $4198401, %edx
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2015-09-22 21:47:45 +08:00
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// CHECK: Disassembly of section .R_386_PC32:
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// CHECK-NEXT: R_386_PC32:
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Align AArch64 and i386 image base to superpage
Summary:
As for x86_64, the default image base for AArch64 and i386 should be
aligned to a superpage appropriate for the architecture.
On AArch64, this is 2 MiB, on i386 it is 4 MiB.
Reviewers: emaste, grimar, javed.absar, espindola, ruiu, peter.smith, srhines, rprichard
Reviewed By: ruiu, peter.smith
Subscribers: jfb, markj, arichardson, krytarowski, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D50297
llvm-svn: 342746
2018-09-22 00:58:13 +08:00
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// CHECK-NEXT: 401005: e8 04 00 00 00 calll 4
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2015-09-22 21:47:45 +08:00
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// CHECK: R_386_PC32_2:
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Align AArch64 and i386 image base to superpage
Summary:
As for x86_64, the default image base for AArch64 and i386 should be
aligned to a superpage appropriate for the architecture.
On AArch64, this is 2 MiB, on i386 it is 4 MiB.
Reviewers: emaste, grimar, javed.absar, espindola, ruiu, peter.smith, srhines, rprichard
Reviewed By: ruiu, peter.smith
Subscribers: jfb, markj, arichardson, krytarowski, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D50297
llvm-svn: 342746
2018-09-22 00:58:13 +08:00
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// CHECK-NEXT: 40100e: 90 nop
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2015-09-29 21:36:32 +08:00
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// Create a .got
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movl bar@GOT, %eax
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2015-10-09 02:58:10 +08:00
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// ADDR: Name: .plt
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// ADDR-NEXT: Type: SHT_PROGBITS
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// ADDR-NEXT: Flags [
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// ADDR-NEXT: SHF_ALLOC
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// ADDR-NEXT: SHF_EXECINSTR
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// ADDR-NEXT: ]
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Align AArch64 and i386 image base to superpage
Summary:
As for x86_64, the default image base for AArch64 and i386 should be
aligned to a superpage appropriate for the architecture.
On AArch64, this is 2 MiB, on i386 it is 4 MiB.
Reviewers: emaste, grimar, javed.absar, espindola, ruiu, peter.smith, srhines, rprichard
Reviewed By: ruiu, peter.smith
Subscribers: jfb, markj, arichardson, krytarowski, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D50297
llvm-svn: 342746
2018-09-22 00:58:13 +08:00
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// ADDR-NEXT: Address: 0x401040
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2016-01-19 19:00:48 +08:00
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// ADDR-NEXT: Offset: 0x1040
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2015-11-26 06:15:01 +08:00
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// ADDR-NEXT: Size: 32
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2015-09-29 21:36:32 +08:00
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2017-01-10 09:21:30 +08:00
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// ADDR: Name: .got (
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2015-09-29 21:36:32 +08:00
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// ADDR-NEXT: Type: SHT_PROGBITS
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// ADDR-NEXT: Flags [
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// ADDR-NEXT: SHF_ALLOC
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// ADDR-NEXT: SHF_WRITE
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// ADDR-NEXT: ]
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[ELF] Simplify RelRo, TLS, NOBITS section ranks and make RW PT_LOAD start with RelRo
Old: PT_LOAD(.data | PT_GNU_RELRO(.data.rel.ro .bss.rel.ro) | .bss)
New: PT_LOAD(PT_GNU_RELRO(.data.rel.ro .bss.rel.ro) | .data .bss)
The placement of | indicates page alignment caused by PT_GNU_RELRO. The
new layout has simpler rules and saves space for many cases.
Old size: roundup(.data) + roundup(.data.rel.ro)
New size: roundup(.data.rel.ro + .bss.rel.ro) + .data
Other advantages:
* At runtime the 3 memory mappings decrease to 2.
* start(PT_TLS) = start(PT_GNU_RELRO) = start(RW PT_LOAD). This
simplifies binary manipulation tools.
GNU strip before 2.31 discards PT_GNU_RELRO if its
address is not equal to the start of its associated PT_LOAD.
This has been fixed by https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=f2731e0c374e5323ce4cdae2bcc7b7fe22da1a6f
But with this change, we will be compatible with GNU strip before 2.31
* Before, .got.plt (non-relro by default) was placed before .got (relro
by default), which made it impossible to have _GLOBAL_OFFSET_TABLE_
(start of .got.plt on x86-64) equal to the end of .got (R_GOT*_FROM_END)
(https://bugs.llvm.org/show_bug.cgi?id=36555). With the new ordering, we
can improve on this regard if we'd like to.
Reviewers: ruiu, espindola, pcc
Subscribers: emaste, arichardson, llvm-commits, joerg, jdoerfert
Differential Revision: https://reviews.llvm.org/D56828
llvm-svn: 356117
2019-03-14 11:47:45 +08:00
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// ADDR-NEXT: Address: 0x402078
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2016-09-01 07:24:11 +08:00
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// ADDR-NEXT: Offset:
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// ADDR-NEXT: Size: 8
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2015-09-29 21:36:32 +08:00
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.section .R_386_GOTPC,"ax",@progbits
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R_386_GOTPC:
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movl $_GLOBAL_OFFSET_TABLE_, %eax
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[ELF] Simplify RelRo, TLS, NOBITS section ranks and make RW PT_LOAD start with RelRo
Old: PT_LOAD(.data | PT_GNU_RELRO(.data.rel.ro .bss.rel.ro) | .bss)
New: PT_LOAD(PT_GNU_RELRO(.data.rel.ro .bss.rel.ro) | .data .bss)
The placement of | indicates page alignment caused by PT_GNU_RELRO. The
new layout has simpler rules and saves space for many cases.
Old size: roundup(.data) + roundup(.data.rel.ro)
New size: roundup(.data.rel.ro + .bss.rel.ro) + .data
Other advantages:
* At runtime the 3 memory mappings decrease to 2.
* start(PT_TLS) = start(PT_GNU_RELRO) = start(RW PT_LOAD). This
simplifies binary manipulation tools.
GNU strip before 2.31 discards PT_GNU_RELRO if its
address is not equal to the start of its associated PT_LOAD.
This has been fixed by https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=f2731e0c374e5323ce4cdae2bcc7b7fe22da1a6f
But with this change, we will be compatible with GNU strip before 2.31
* Before, .got.plt (non-relro by default) was placed before .got (relro
by default), which made it impossible to have _GLOBAL_OFFSET_TABLE_
(start of .got.plt on x86-64) equal to the end of .got (R_GOT*_FROM_END)
(https://bugs.llvm.org/show_bug.cgi?id=36555). With the new ordering, we
can improve on this regard if we'd like to.
Reviewers: ruiu, espindola, pcc
Subscribers: emaste, arichardson, llvm-commits, joerg, jdoerfert
Differential Revision: https://reviews.llvm.org/D56828
llvm-svn: 356117
2019-03-14 11:47:45 +08:00
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// 0x402078 + 8 - 0x401014 = 8300
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2015-09-29 21:36:32 +08:00
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// CHECK: Disassembly of section .R_386_GOTPC:
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// CHECK-NEXT: R_386_GOTPC:
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[ELF] Simplify RelRo, TLS, NOBITS section ranks and make RW PT_LOAD start with RelRo
Old: PT_LOAD(.data | PT_GNU_RELRO(.data.rel.ro .bss.rel.ro) | .bss)
New: PT_LOAD(PT_GNU_RELRO(.data.rel.ro .bss.rel.ro) | .data .bss)
The placement of | indicates page alignment caused by PT_GNU_RELRO. The
new layout has simpler rules and saves space for many cases.
Old size: roundup(.data) + roundup(.data.rel.ro)
New size: roundup(.data.rel.ro + .bss.rel.ro) + .data
Other advantages:
* At runtime the 3 memory mappings decrease to 2.
* start(PT_TLS) = start(PT_GNU_RELRO) = start(RW PT_LOAD). This
simplifies binary manipulation tools.
GNU strip before 2.31 discards PT_GNU_RELRO if its
address is not equal to the start of its associated PT_LOAD.
This has been fixed by https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=f2731e0c374e5323ce4cdae2bcc7b7fe22da1a6f
But with this change, we will be compatible with GNU strip before 2.31
* Before, .got.plt (non-relro by default) was placed before .got (relro
by default), which made it impossible to have _GLOBAL_OFFSET_TABLE_
(start of .got.plt on x86-64) equal to the end of .got (R_GOT*_FROM_END)
(https://bugs.llvm.org/show_bug.cgi?id=36555). With the new ordering, we
can improve on this regard if we'd like to.
Reviewers: ruiu, espindola, pcc
Subscribers: emaste, arichardson, llvm-commits, joerg, jdoerfert
Differential Revision: https://reviews.llvm.org/D56828
llvm-svn: 356117
2019-03-14 11:47:45 +08:00
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// CHECK-NEXT: 401014: {{.*}} movl $4204, %eax
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2015-09-29 21:51:43 +08:00
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.section .dynamic_reloc, "ax",@progbits
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2015-10-09 02:58:10 +08:00
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call bar
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Align AArch64 and i386 image base to superpage
Summary:
As for x86_64, the default image base for AArch64 and i386 should be
aligned to a superpage appropriate for the architecture.
On AArch64, this is 2 MiB, on i386 it is 4 MiB.
Reviewers: emaste, grimar, javed.absar, espindola, ruiu, peter.smith, srhines, rprichard
Reviewed By: ruiu, peter.smith
Subscribers: jfb, markj, arichardson, krytarowski, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D50297
llvm-svn: 342746
2018-09-22 00:58:13 +08:00
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// addr(.plt) + 16 - (0x401019 + 5) = 50
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2015-09-29 21:51:43 +08:00
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// CHECK: Disassembly of section .dynamic_reloc:
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// CHECK-NEXT: .dynamic_reloc:
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Align AArch64 and i386 image base to superpage
Summary:
As for x86_64, the default image base for AArch64 and i386 should be
aligned to a superpage appropriate for the architecture.
On AArch64, this is 2 MiB, on i386 it is 4 MiB.
Reviewers: emaste, grimar, javed.absar, espindola, ruiu, peter.smith, srhines, rprichard
Reviewed By: ruiu, peter.smith
Subscribers: jfb, markj, arichardson, krytarowski, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D50297
llvm-svn: 342746
2018-09-22 00:58:13 +08:00
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// CHECK-NEXT: 401019: e8 32 00 00 00 calll 50
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2015-09-29 22:42:37 +08:00
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.section .R_386_GOT32,"ax",@progbits
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.global R_386_GOT32
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R_386_GOT32:
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2016-01-19 19:00:48 +08:00
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movl bar@GOT, %eax
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movl zed@GOT, %eax
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movl bar+8@GOT, %eax
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movl zed+4@GOT, %eax
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Align AArch64 and i386 image base to superpage
Summary:
As for x86_64, the default image base for AArch64 and i386 should be
aligned to a superpage appropriate for the architecture.
On AArch64, this is 2 MiB, on i386 it is 4 MiB.
Reviewers: emaste, grimar, javed.absar, espindola, ruiu, peter.smith, srhines, rprichard
Reviewed By: ruiu, peter.smith
Subscribers: jfb, markj, arichardson, krytarowski, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D50297
llvm-svn: 342746
2018-09-22 00:58:13 +08:00
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// 4294967288 = 0xFFFFFFF8 = got[0](0x402070) - .got(0x402070) - sizeof(.got)(8)
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// 4294967292 = 0xFFFFFFFC = got[1](0x402074) - .got(0x402070) - sizeof(.got)(8)
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2016-01-19 19:00:48 +08:00
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// 0xFFFFFFF8 + 8 = 0
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// 0xFFFFFFFC + 4 = 0
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2015-09-29 22:42:37 +08:00
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// CHECK: Disassembly of section .R_386_GOT32:
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// CHECK-NEXT: R_386_GOT32:
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Align AArch64 and i386 image base to superpage
Summary:
As for x86_64, the default image base for AArch64 and i386 should be
aligned to a superpage appropriate for the architecture.
On AArch64, this is 2 MiB, on i386 it is 4 MiB.
Reviewers: emaste, grimar, javed.absar, espindola, ruiu, peter.smith, srhines, rprichard
Reviewed By: ruiu, peter.smith
Subscribers: jfb, markj, arichardson, krytarowski, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D50297
llvm-svn: 342746
2018-09-22 00:58:13 +08:00
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// CHECK-NEXT: 40101e: a1 f8 ff ff ff movl 4294967288, %eax
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// CHECK-NEXT: 401023: a1 fc ff ff ff movl 4294967292, %eax
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// CHECK-NEXT: 401028: a1 00 00 00 00 movl 0, %eax
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// CHECK-NEXT: 40102d: a1 00 00 00 00 movl 0, %eax
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