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# 'std' Dialect
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This dialect provides documentation for operations within the Standard dialect.
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Note: This dialect is a collection of operations for several different concepts,
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and should be split into multiple more-focused dialects accordingly.
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2020-08-13 20:54:26 +08:00
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**Please post an RFC on the [forum](https://llvm.discourse.group/c/mlir/31)
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before adding or changing any operation in this dialect.**
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2019-08-21 09:41:38 +08:00
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[TOC]
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2020-03-30 12:49:44 +08:00
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## Operations
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2020-03-30 12:49:44 +08:00
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[include "Dialects/StandardOps.md"]
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### 'dma_start' operation
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Syntax:
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2019-12-10 19:00:29 +08:00
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```
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operation ::= `dma_start` ssa-use`[`ssa-use-list`]` `,`
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ssa-use`[`ssa-use-list`]` `,` ssa-use `,`
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ssa-use`[`ssa-use-list`]` (`,` ssa-use `,` ssa-use)?
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`:` memref-type `,` memref-type `,` memref-type
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```
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Starts a non-blocking DMA operation that transfers data from a source memref to
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a destination memref. The operands include the source and destination memref's
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each followed by its indices, size of the data transfer in terms of the number
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of elements (of the elemental type of the memref), a tag memref with its
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indices, and optionally two additional arguments corresponding to the stride (in
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terms of number of elements) and the number of elements to transfer per stride.
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The tag location is used by a dma_wait operation to check for completion. The
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indices of the source memref, destination memref, and the tag memref have the
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same restrictions as any load/store operation in an affine context (whenever DMA
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operations appear in an affine context). See
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[restrictions on dimensions and symbols](Affine.md#restrictions-on-dimensions-and-symbols)
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in affine contexts. This allows powerful static analysis and transformations in
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the presence of such DMAs including rescheduling, pipelining / overlap with
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computation, and checking for matching start/end operations. The source and
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destination memref need not be of the same dimensionality, but need to have the
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same elemental type.
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For example, a `dma_start` operation that transfers 32 vector elements from a
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memref `%src` at location `[%i, %j]` to memref `%dst` at `[%k, %l]` would be
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specified as shown below.
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Example:
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```mlir
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%size = constant 32 : index
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%tag = alloc() : memref<1 x i32, affine_map<(d0) -> (d0)>, 4>
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%idx = constant 0 : index
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dma_start %src[%i, %j], %dst[%k, %l], %size, %tag[%idx] :
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memref<40 x 8 x vector<16xf32>, affine_map<(d0, d1) -> (d0, d1)>, 0>,
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memref<2 x 4 x vector<16xf32>, affine_map<(d0, d1) -> (d0, d1)>, 2>,
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memref<1 x i32>, affine_map<(d0) -> (d0)>, 4>
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```
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### 'dma_wait' operation
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Syntax:
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```
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operation ::= `dma_wait` ssa-use`[`ssa-use-list`]` `,` ssa-use `:` memref-type
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```
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Blocks until the completion of a DMA operation associated with the tag element
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specified with a tag memref and its indices. The operands include the tag memref
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followed by its indices and the number of elements associated with the DMA being
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waited on. The indices of the tag memref have the same restrictions as
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load/store indices.
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Example:
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```mlir
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dma_wait %tag[%idx], %size : memref<1 x i32, affine_map<(d0) -> (d0)>, 4>
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```
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