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llvm-project/llvm/test/CodeGen/ARM/debug-frame-large-stack.ll

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ARM: simplify test. The test's DWARF stubs were there just to trigger the emission of .cfi directives. Fortunately, the NetBSD ABI already demands proper DWARF unwind info, so it's easier to just use that triple. llvm-svn: 222055
2014-11-15 06:45:23 +08:00
; RUN: llc -filetype=asm -o - < %s -mtriple arm-arm-netbsd-eabi -disable-fp-elim| FileCheck %s --check-prefix=CHECK-ARM
; RUN: llc -filetype=asm -o - < %s -mtriple arm-arm-netbsd-eabi | FileCheck %s --check-prefix=CHECK-ARM-FP-ELIM
Generate the DWARF stack frame decode operations in the function prologue for ARM/Thumb functions. Patch by Keith Walker! llvm-svn: 201423
2014-02-15 01:19:07 +08:00
define void @test1() {
%tmp = alloca [ 64 x i32 ] , align 4
ret void
}
; CHECK-ARM-LABEL: test1:
; CHECK-ARM: .cfi_startproc
; CHECK-ARM: sub sp, sp, #256
; CHECK-ARM: .cfi_endproc
Fix broken CHECK lines llvm-svn: 201479
2014-02-16 15:31:05 +08:00
; CHECK-ARM-FP-ELIM-LABEL: test1:
; CHECK-ARM-FP-ELIM: .cfi_startproc
; CHECK-ARM-FP-ELIM: sub sp, sp, #256
; CHECK-ARM-FP-ELIM: .cfi_endproc
Generate the DWARF stack frame decode operations in the function prologue for ARM/Thumb functions. Patch by Keith Walker! llvm-svn: 201423
2014-02-15 01:19:07 +08:00
define void @test2() {
%tmp = alloca [ 4168 x i8 ] , align 4
ret void
}
; CHECK-ARM-LABEL: test2:
; CHECK-ARM: .cfi_startproc
[ARM] Generate consistent frame records for Thumb2 There is not an official documented ABI for frame pointers in Thumb2, but we should try to emit something which is useful. We use r7 as the frame pointer for Thumb code, which currently means that if a function needs to save a high register (r8-r11), it will get pushed to the stack between the frame pointer (r7) and link register (r14). This means that while a stack unwinder can follow the chain of frame pointers up the stack, it cannot know the offset to lr, so does not know which functions correspond to the stack frames. To fix this, we need to push the callee-saved registers in two batches, with the first push saving the low registers, fp and lr, and the second push saving the high registers. This is already implemented, but previously only used for iOS. This patch turns it on for all Thumb2 targets when frame pointers are required by the ABI, and the frame pointer is r7 (Windows uses r11, so this isn't a problem there). If frame pointer elimination is enabled we still emit a single push/pop even if we need a frame pointer for other reasons, to avoid increasing code size. We must also ensure that lr is pushed to the stack when using a frame pointer, so that we end up with a complete frame record. Situations that could cause this were rare, because we already push lr in most situations so that we can return using the pop instruction. Differential Revision: https://reviews.llvm.org/D23516 llvm-svn: 279506
2016-08-23 17:19:22 +08:00
; CHECK-ARM: push {r4, r5, r11, lr}
; CHECK-ARM: .cfi_def_cfa_offset 16
; CHECK-ARM: .cfi_offset lr, -4
; CHECK-ARM: .cfi_offset r11, -8
; CHECK-ARM: .cfi_offset r5, -12
; CHECK-ARM: .cfi_offset r4, -16
; CHECK-ARM: add r11, sp, #8
; CHECK-ARM: .cfi_def_cfa r11, 8
Generate the DWARF stack frame decode operations in the function prologue for ARM/Thumb functions. Patch by Keith Walker! llvm-svn: 201423
2014-02-15 01:19:07 +08:00
; CHECK-ARM: sub sp, sp, #72
; CHECK-ARM: sub sp, sp, #4096
; CHECK-ARM: .cfi_endproc
; CHECK-ARM-FP_ELIM-LABEL: test2:
; CHECK-ARM-FP_ELIM: .cfi_startproc
; CHECK-ARM-FP_ELIM: push {r4, r5}
; CHECK-ARM-FP_ELIM: .cfi_def_cfa_offset 8
; CHECK-ARM-FP_ELIM: .cfi_offset 54, -4
[ARM] Use symbolic register names in .cfi directives only with IAS (PR19110) This is a follow-up to r203635. Saleem pointed out that since symbolic register names are much easier to read, it would be good if we could turn them off only when we really need to because we're using an external assembler. Differential Revision: http://llvm-reviews.chandlerc.com/D3056 llvm-svn: 203806
2014-03-13 23:56:41 +08:00
; CHECK-ARM-FP_ELIM: .cfi_offset r4, -8
Generate the DWARF stack frame decode operations in the function prologue for ARM/Thumb functions. Patch by Keith Walker! llvm-svn: 201423
2014-02-15 01:19:07 +08:00
; CHECK-ARM-FP_ELIM: sub sp, sp, #72
; CHECK-ARM-FP_ELIM: sub sp, sp, #4096
; CHECK-ARM-FP_ELIM: .cfi_def_cfa_offset 4176
; CHECK-ARM-FP_ELIM: .cfi_endproc
define i32 @test3() {
%retval = alloca i32, align 4
%tmp = alloca i32, align 4
%a = alloca [805306369 x i8], align 16
store i32 0, i32* %tmp
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%tmp1 = load i32, i32* %tmp
Generate the DWARF stack frame decode operations in the function prologue for ARM/Thumb functions. Patch by Keith Walker! llvm-svn: 201423
2014-02-15 01:19:07 +08:00
ret i32 %tmp1
}
; CHECK-ARM-LABEL: test3:
; CHECK-ARM: .cfi_startproc
[ARM] Generate consistent frame records for Thumb2 There is not an official documented ABI for frame pointers in Thumb2, but we should try to emit something which is useful. We use r7 as the frame pointer for Thumb code, which currently means that if a function needs to save a high register (r8-r11), it will get pushed to the stack between the frame pointer (r7) and link register (r14). This means that while a stack unwinder can follow the chain of frame pointers up the stack, it cannot know the offset to lr, so does not know which functions correspond to the stack frames. To fix this, we need to push the callee-saved registers in two batches, with the first push saving the low registers, fp and lr, and the second push saving the high registers. This is already implemented, but previously only used for iOS. This patch turns it on for all Thumb2 targets when frame pointers are required by the ABI, and the frame pointer is r7 (Windows uses r11, so this isn't a problem there). If frame pointer elimination is enabled we still emit a single push/pop even if we need a frame pointer for other reasons, to avoid increasing code size. We must also ensure that lr is pushed to the stack when using a frame pointer, so that we end up with a complete frame record. Situations that could cause this were rare, because we already push lr in most situations so that we can return using the pop instruction. Differential Revision: https://reviews.llvm.org/D23516 llvm-svn: 279506
2016-08-23 17:19:22 +08:00
; CHECK-ARM: push {r4, r5, r11, lr}
; CHECK-ARM: .cfi_def_cfa_offset 16
; CHECK-ARM: .cfi_offset lr, -4
; CHECK-ARM: .cfi_offset r11, -8
; CHECK-ARM: .cfi_offset r5, -12
; CHECK-ARM: .cfi_offset r4, -16
Generate the DWARF stack frame decode operations in the function prologue for ARM/Thumb functions. Patch by Keith Walker! llvm-svn: 201423
2014-02-15 01:19:07 +08:00
; CHECK-ARM: add r11, sp, #8
[ARM] Generate consistent frame records for Thumb2 There is not an official documented ABI for frame pointers in Thumb2, but we should try to emit something which is useful. We use r7 as the frame pointer for Thumb code, which currently means that if a function needs to save a high register (r8-r11), it will get pushed to the stack between the frame pointer (r7) and link register (r14). This means that while a stack unwinder can follow the chain of frame pointers up the stack, it cannot know the offset to lr, so does not know which functions correspond to the stack frames. To fix this, we need to push the callee-saved registers in two batches, with the first push saving the low registers, fp and lr, and the second push saving the high registers. This is already implemented, but previously only used for iOS. This patch turns it on for all Thumb2 targets when frame pointers are required by the ABI, and the frame pointer is r7 (Windows uses r11, so this isn't a problem there). If frame pointer elimination is enabled we still emit a single push/pop even if we need a frame pointer for other reasons, to avoid increasing code size. We must also ensure that lr is pushed to the stack when using a frame pointer, so that we end up with a complete frame record. Situations that could cause this were rare, because we already push lr in most situations so that we can return using the pop instruction. Differential Revision: https://reviews.llvm.org/D23516 llvm-svn: 279506
2016-08-23 17:19:22 +08:00
; CHECK-ARM: .cfi_def_cfa r11, 8
; CHECK-ARM: sub sp, sp, #16
Generate the DWARF stack frame decode operations in the function prologue for ARM/Thumb functions. Patch by Keith Walker! llvm-svn: 201423
2014-02-15 01:19:07 +08:00
; CHECK-ARM: sub sp, sp, #805306368
; CHECK-ARM: bic sp, sp, #15
; CHECK-ARM: .cfi_endproc
; CHECK-ARM-FP-ELIM-LABEL: test3:
; CHECK-ARM-FP-ELIM: .cfi_startproc
; CHECK-ARM-FP-ELIM: push {r4, r5, r11}
; CHECK-ARM-FP-ELIM: .cfi_def_cfa_offset 12
[ARM] Use symbolic register names in .cfi directives only with IAS (PR19110) This is a follow-up to r203635. Saleem pointed out that since symbolic register names are much easier to read, it would be good if we could turn them off only when we really need to because we're using an external assembler. Differential Revision: http://llvm-reviews.chandlerc.com/D3056 llvm-svn: 203806
2014-03-13 23:56:41 +08:00
; CHECK-ARM-FP-ELIM: .cfi_offset r11, -4
; CHECK-ARM-FP-ELIM: .cfi_offset r5, -8
; CHECK-ARM-FP-ELIM: .cfi_offset r4, -12
Generate the DWARF stack frame decode operations in the function prologue for ARM/Thumb functions. Patch by Keith Walker! llvm-svn: 201423
2014-02-15 01:19:07 +08:00
; CHECK-ARM-FP-ELIM: add r11, sp, #8
[ARM] Use symbolic register names in .cfi directives only with IAS (PR19110) This is a follow-up to r203635. Saleem pointed out that since symbolic register names are much easier to read, it would be good if we could turn them off only when we really need to because we're using an external assembler. Differential Revision: http://llvm-reviews.chandlerc.com/D3056 llvm-svn: 203806
2014-03-13 23:56:41 +08:00
; CHECK-ARM-FP-ELIM: .cfi_def_cfa r11, 4
Generate the DWARF stack frame decode operations in the function prologue for ARM/Thumb functions. Patch by Keith Walker! llvm-svn: 201423
2014-02-15 01:19:07 +08:00
; CHECK-ARM-FP-ELIM: sub sp, sp, #20
; CHECK-ARM-FP-ELIM: sub sp, sp, #805306368
; CHECK-ARM-FP-ELIM: bic sp, sp, #15
; CHECK-ARM-FP-ELIM: .cfi_endproc