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llvm-project/llvm/lib/Target/Mips/MicroMipsInstrInfo.td

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[mips] First patch which adds support for micromips. This patch adds support for recoded (meaning assembly-language compatible to standard mips32) arithmetic 32-bit instructions. Patch by Zoran Jovanovic. llvm-svn: 179873
2013-04-20 03:03:11 +08:00
let isCodeGenOnly = 1 in {
/// Arithmetic Instructions (ALU Immediate)
[mips] Rename register classes CPURegs and CPU64Regs. llvm-svn: 187832
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def ADDiu_MM : MMRel, ArithLogicI<"addiu", simm16, GPR32Opnd>,
[mips] First patch which adds support for micromips. This patch adds support for recoded (meaning assembly-language compatible to standard mips32) arithmetic 32-bit instructions. Patch by Zoran Jovanovic. llvm-svn: 179873
2013-04-20 03:03:11 +08:00
ADDI_FM_MM<0xc>;
[mips] Rename register classes CPURegs and CPU64Regs. llvm-svn: 187832
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def ADDi_MM : MMRel, ArithLogicI<"addi", simm16, GPR32Opnd>,
[mips] First patch which adds support for micromips. This patch adds support for recoded (meaning assembly-language compatible to standard mips32) arithmetic 32-bit instructions. Patch by Zoran Jovanovic. llvm-svn: 179873
2013-04-20 03:03:11 +08:00
ADDI_FM_MM<0x4>;
[mips] Rename register classes CPURegs and CPU64Regs. llvm-svn: 187832
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def SLTi_MM : MMRel, SetCC_I<"slti", setlt, simm16, immSExt16, GPR32Opnd>,
[mips] First patch which adds support for micromips. This patch adds support for recoded (meaning assembly-language compatible to standard mips32) arithmetic 32-bit instructions. Patch by Zoran Jovanovic. llvm-svn: 179873
2013-04-20 03:03:11 +08:00
SLTI_FM_MM<0x24>;
[mips] Rename register classes CPURegs and CPU64Regs. llvm-svn: 187832
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def SLTiu_MM : MMRel, SetCC_I<"sltiu", setult, simm16, immSExt16, GPR32Opnd>,
[mips] First patch which adds support for micromips. This patch adds support for recoded (meaning assembly-language compatible to standard mips32) arithmetic 32-bit instructions. Patch by Zoran Jovanovic. llvm-svn: 179873
2013-04-20 03:03:11 +08:00
SLTI_FM_MM<0x2c>;
[mips] Rename register classes CPURegs and CPU64Regs. llvm-svn: 187832
2013-08-07 07:08:38 +08:00
def ANDi_MM : MMRel, ArithLogicI<"andi", uimm16, GPR32Opnd>,
[mips] First patch which adds support for micromips. This patch adds support for recoded (meaning assembly-language compatible to standard mips32) arithmetic 32-bit instructions. Patch by Zoran Jovanovic. llvm-svn: 179873
2013-04-20 03:03:11 +08:00
ADDI_FM_MM<0x34>;
[mips] Rename register classes CPURegs and CPU64Regs. llvm-svn: 187832
2013-08-07 07:08:38 +08:00
def ORi_MM : MMRel, ArithLogicI<"ori", uimm16, GPR32Opnd>,
[mips] First patch which adds support for micromips. This patch adds support for recoded (meaning assembly-language compatible to standard mips32) arithmetic 32-bit instructions. Patch by Zoran Jovanovic. llvm-svn: 179873
2013-04-20 03:03:11 +08:00
ADDI_FM_MM<0x14>;
[mips] Rename register classes CPURegs and CPU64Regs. llvm-svn: 187832
2013-08-07 07:08:38 +08:00
def XORi_MM : MMRel, ArithLogicI<"xori", uimm16, GPR32Opnd>,
[mips] First patch which adds support for micromips. This patch adds support for recoded (meaning assembly-language compatible to standard mips32) arithmetic 32-bit instructions. Patch by Zoran Jovanovic. llvm-svn: 179873
2013-04-20 03:03:11 +08:00
ADDI_FM_MM<0x1c>;
[mips] Rename register classes CPURegs and CPU64Regs. llvm-svn: 187832
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def LUi_MM : MMRel, LoadUpper<"lui", GPR32Opnd, uimm16>, LUI_FM_MM;
[mips] First patch which adds support for micromips. This patch adds support for recoded (meaning assembly-language compatible to standard mips32) arithmetic 32-bit instructions. Patch by Zoran Jovanovic. llvm-svn: 179873
2013-04-20 03:03:11 +08:00
/// Arithmetic Instructions (3-Operand, R-Type)
[mips] Rename register classes CPURegs and CPU64Regs. llvm-svn: 187832
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def ADDu_MM : MMRel, ArithLogicR<"addu", GPR32Opnd>, ADD_FM_MM<0, 0x150>;
def SUBu_MM : MMRel, ArithLogicR<"subu", GPR32Opnd>, ADD_FM_MM<0, 0x1d0>;
def MUL_MM : MMRel, ArithLogicR<"mul", GPR32Opnd>, ADD_FM_MM<0, 0x210>;
def ADD_MM : MMRel, ArithLogicR<"add", GPR32Opnd>, ADD_FM_MM<0, 0x110>;
def SUB_MM : MMRel, ArithLogicR<"sub", GPR32Opnd>, ADD_FM_MM<0, 0x190>;
def SLT_MM : MMRel, SetCC_R<"slt", setlt, GPR32Opnd>, ADD_FM_MM<0, 0x350>;
def SLTu_MM : MMRel, SetCC_R<"sltu", setult, GPR32Opnd>,
[mips] First patch which adds support for micromips. This patch adds support for recoded (meaning assembly-language compatible to standard mips32) arithmetic 32-bit instructions. Patch by Zoran Jovanovic. llvm-svn: 179873
2013-04-20 03:03:11 +08:00
ADD_FM_MM<0, 0x390>;
[mips] Rename register classes CPURegs and CPU64Regs. llvm-svn: 187832
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def AND_MM : MMRel, ArithLogicR<"and", GPR32Opnd, 1, IIAlu, and>,
[mips] First patch which adds support for micromips. This patch adds support for recoded (meaning assembly-language compatible to standard mips32) arithmetic 32-bit instructions. Patch by Zoran Jovanovic. llvm-svn: 179873
2013-04-20 03:03:11 +08:00
ADD_FM_MM<0, 0x250>;
[mips] Rename register classes CPURegs and CPU64Regs. llvm-svn: 187832
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def OR_MM : MMRel, ArithLogicR<"or", GPR32Opnd, 1, IIAlu, or>,
[mips] First patch which adds support for micromips. This patch adds support for recoded (meaning assembly-language compatible to standard mips32) arithmetic 32-bit instructions. Patch by Zoran Jovanovic. llvm-svn: 179873
2013-04-20 03:03:11 +08:00
ADD_FM_MM<0, 0x290>;
[mips] Rename register classes CPURegs and CPU64Regs. llvm-svn: 187832
2013-08-07 07:08:38 +08:00
def XOR_MM : MMRel, ArithLogicR<"xor", GPR32Opnd, 1, IIAlu, xor>,
[mips] First patch which adds support for micromips. This patch adds support for recoded (meaning assembly-language compatible to standard mips32) arithmetic 32-bit instructions. Patch by Zoran Jovanovic. llvm-svn: 179873
2013-04-20 03:03:11 +08:00
ADD_FM_MM<0, 0x310>;
[mips] Rename register classes CPURegs and CPU64Regs. llvm-svn: 187832
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def NOR_MM : MMRel, LogicNOR<"nor", GPR32Opnd>, ADD_FM_MM<0, 0x2d0>;
def MULT_MM : MMRel, Mult<"mult", IIImul, GPR32Opnd, [HI, LO]>,
[mips] First patch which adds support for micromips. This patch adds support for recoded (meaning assembly-language compatible to standard mips32) arithmetic 32-bit instructions. Patch by Zoran Jovanovic. llvm-svn: 179873
2013-04-20 03:03:11 +08:00
MULT_FM_MM<0x22c>;
[mips] Rename register classes CPURegs and CPU64Regs. llvm-svn: 187832
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def MULTu_MM : MMRel, Mult<"multu", IIImul, GPR32Opnd, [HI, LO]>,
[mips] First patch which adds support for micromips. This patch adds support for recoded (meaning assembly-language compatible to standard mips32) arithmetic 32-bit instructions. Patch by Zoran Jovanovic. llvm-svn: 179873
2013-04-20 03:03:11 +08:00
MULT_FM_MM<0x26c>;
[mips] Add definitions of micromips shift instructions. Patch by Zoran Jovanovic. llvm-svn: 180238
2013-04-25 09:11:15 +08:00
/// Shift Instructions
[mips] Rename register classes CPURegs and CPU64Regs. llvm-svn: 187832
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def SLL_MM : MMRel, shift_rotate_imm<"sll", shamt, GPR32Opnd>,
[mips] Add definitions of micromips shift instructions. Patch by Zoran Jovanovic. llvm-svn: 180238
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SRA_FM_MM<0, 0>;
[mips] Rename register classes CPURegs and CPU64Regs. llvm-svn: 187832
2013-08-07 07:08:38 +08:00
def SRL_MM : MMRel, shift_rotate_imm<"srl", shamt, GPR32Opnd>,
[mips] Add definitions of micromips shift instructions. Patch by Zoran Jovanovic. llvm-svn: 180238
2013-04-25 09:11:15 +08:00
SRA_FM_MM<0x40, 0>;
[mips] Rename register classes CPURegs and CPU64Regs. llvm-svn: 187832
2013-08-07 07:08:38 +08:00
def SRA_MM : MMRel, shift_rotate_imm<"sra", shamt, GPR32Opnd>,
[mips] Add definitions of micromips shift instructions. Patch by Zoran Jovanovic. llvm-svn: 180238
2013-04-25 09:11:15 +08:00
SRA_FM_MM<0x80, 0>;
[mips] Rename register classes CPURegs and CPU64Regs. llvm-svn: 187832
2013-08-07 07:08:38 +08:00
def SLLV_MM : MMRel, shift_rotate_reg<"sllv", GPR32Opnd>,
[mips] Add definitions of micromips shift instructions. Patch by Zoran Jovanovic. llvm-svn: 180238
2013-04-25 09:11:15 +08:00
SRLV_FM_MM<0x10, 0>;
[mips] Rename register classes CPURegs and CPU64Regs. llvm-svn: 187832
2013-08-07 07:08:38 +08:00
def SRLV_MM : MMRel, shift_rotate_reg<"srlv", GPR32Opnd>,
[mips] Add definitions of micromips shift instructions. Patch by Zoran Jovanovic. llvm-svn: 180238
2013-04-25 09:11:15 +08:00
SRLV_FM_MM<0x50, 0>;
[mips] Rename register classes CPURegs and CPU64Regs. llvm-svn: 187832
2013-08-07 07:08:38 +08:00
def SRAV_MM : MMRel, shift_rotate_reg<"srav", GPR32Opnd>,
[mips] Add definitions of micromips shift instructions. Patch by Zoran Jovanovic. llvm-svn: 180238
2013-04-25 09:11:15 +08:00
SRLV_FM_MM<0x90, 0>;
[mips] Rename register classes CPURegs and CPU64Regs. llvm-svn: 187832
2013-08-07 07:08:38 +08:00
def ROTR_MM : MMRel, shift_rotate_imm<"rotr", shamt, GPR32Opnd>,
[mips] Add definitions of micromips shift instructions. Patch by Zoran Jovanovic. llvm-svn: 180238
2013-04-25 09:11:15 +08:00
SRA_FM_MM<0xc0, 0>;
[mips] Rename register classes CPURegs and CPU64Regs. llvm-svn: 187832
2013-08-07 07:08:38 +08:00
def ROTRV_MM : MMRel, shift_rotate_reg<"rotrv", GPR32Opnd>,
[mips] Add definitions of micromips shift instructions. Patch by Zoran Jovanovic. llvm-svn: 180238
2013-04-25 09:11:15 +08:00
SRLV_FM_MM<0xd0, 0>;
[mips] Add definitions of micromips load and store instructions. Patch by Zoran Jovanovic. llvm-svn: 180241
2013-04-25 09:21:25 +08:00
/// Load and Store Instructions - aligned
[mips] Rename register classes CPURegs and CPU64Regs. llvm-svn: 187832
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defm LB_MM : LoadM<"lb", GPR32Opnd, sextloadi8>, MMRel, LW_FM_MM<0x7>;
defm LBu_MM : LoadM<"lbu", GPR32Opnd, zextloadi8>, MMRel, LW_FM_MM<0x5>;
defm LH_MM : LoadM<"lh", GPR32Opnd, sextloadi16>, MMRel, LW_FM_MM<0xf>;
defm LHu_MM : LoadM<"lhu", GPR32Opnd, zextloadi16>, MMRel, LW_FM_MM<0xd>;
defm LW_MM : LoadM<"lw", GPR32Opnd>, MMRel, LW_FM_MM<0x3f>;
defm SB_MM : StoreM<"sb", GPR32Opnd, truncstorei8>, MMRel, LW_FM_MM<0x6>;
defm SH_MM : StoreM<"sh", GPR32Opnd, truncstorei16>, MMRel, LW_FM_MM<0xe>;
defm SW_MM : StoreM<"sw", GPR32Opnd>, MMRel, LW_FM_MM<0x3e>;
[mips] First patch which adds support for micromips. This patch adds support for recoded (meaning assembly-language compatible to standard mips32) arithmetic 32-bit instructions. Patch by Zoran Jovanovic. llvm-svn: 179873
2013-04-20 03:03:11 +08:00
}