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llvm-project/llvm/test/CodeGen/Mips/hf16call32_body.ll

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[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE. Summary: The -mcpu=mips16 option caused the Integrated Assembler to crash because it couldn't figure out the architecture revision number to write to the .MIPS.abiflags section. This CPU definition has been removed because, like microMIPS, MIPS16 is an ASE to a base architecture. Reviewers: vkalintiris Subscribers: rkotler, llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D13656 llvm-svn: 250407
2015-10-15 22:34:23 +08:00
; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mattr=mips16 -relocation-model=static < %s | FileCheck %s -check-prefix=stel
Patch number 2 for mips16/32 floating point interoperability stubs. This creates stubs that help Mips32 functions call Mips16 functions which have floating point parameters that are normally passed in floating point registers. llvm-svn: 181972
2013-05-16 10:17:42 +08:00
@x = external global float
@xd = external global double
@y = external global float
@yd = external global double
@ret_sf = external global float
@ret_df = external global double
@ret_sc = external global { float, float }
@ret_dc = external global { double, double }
; Function Attrs: nounwind
define void @v_sf(float %p) #0 {
entry:
%p.addr = alloca float, align 4
store float %p, float* %p.addr, align 4
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%0 = load float, float* %p.addr, align 4
Patch number 2 for mips16/32 floating point interoperability stubs. This creates stubs that help Mips32 functions call Mips16 functions which have floating point parameters that are normally passed in floating point registers. llvm-svn: 181972
2013-05-16 10:17:42 +08:00
store float %0, float* @x, align 4
ret void
}
[mips] Whitespace cleanup in MIPS16 tests to reduce noise in following changes. NFC. Mostly tabs -> spaces and double spacing. llvm-svn: 250041
2015-10-12 22:16:52 +08:00
; stel: .section .mips16.fn.v_sf,"ax",@progbits
; stel: .ent __fn_stub_v_sf
[mips] Enable IAS by default for 32-bit MIPS targets (O32). Summary: The MIPS IAS can now pass 'ninja check-all', recurse, build a bootable linux kernel, and pass a variety of LNT testing. Unfortunately we can't enable it by default for 64-bit targets yet since the N32 ABI is still very buggy and this also means we can't enable it for N64 either because we can't distinguish between N32 and N64 in the relevant code. Reviewers: vkalintiris Subscribers: cfe-commits Differential Revision: http://reviews.llvm.org/D18759 Differential Revision: http://reviews.llvm.org/D18761 llvm-svn: 269560
2016-05-14 20:43:08 +08:00
; stel: lui $25, %hi(v_sf)
; stel: addiu $25, $25, %lo(v_sf)
[mips][mips16] Re-work the inline assembly stubs to work with IAS. NFC. Summary: Previously, we were inserting an InlineAsm statement for each line of the inline assembly. This works for GAS but it triggers prologue/epilogue emission when IAS is in use. This caused: .set noreorder .cpload $25 to be emitted as: .set push .set reorder .set noreorder .set pop .set push .set reorder .cpload $25 .set pop which led to assembler errors and caused the test to fail. The whitespace-after-comma changes included in this patch are necessary to match the output when IAS is in use. Reviewers: vkalintiris Subscribers: rkotler, llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D13653 llvm-svn: 250895
2015-10-21 20:44:14 +08:00
; stel: mfc1 $4, $f12
[mips] Whitespace cleanup in MIPS16 tests to reduce noise in following changes. NFC. Mostly tabs -> spaces and double spacing. llvm-svn: 250041
2015-10-12 22:16:52 +08:00
; stel: jr $25
Use .set instead of = when printing assignment in assembly output On Hexagon "x = y" is a syntax used in most instructions, and is not treated as a directive. Differential Revision: https://reviews.llvm.org/D44256 llvm-svn: 328635
2018-03-28 00:44:41 +08:00
; stel: .set $__fn_local_v_sf, v_sf
[mips] Whitespace cleanup in MIPS16 tests to reduce noise in following changes. NFC. Mostly tabs -> spaces and double spacing. llvm-svn: 250041
2015-10-12 22:16:52 +08:00
; stel: .end __fn_stub_v_sf
Patch number 2 for mips16/32 floating point interoperability stubs. This creates stubs that help Mips32 functions call Mips16 functions which have floating point parameters that are normally passed in floating point registers. llvm-svn: 181972
2013-05-16 10:17:42 +08:00
declare i32 @printf(i8*, ...) #1
; Function Attrs: nounwind
define void @v_df(double %p) #0 {
entry:
%p.addr = alloca double, align 8
store double %p, double* %p.addr, align 8
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%0 = load double, double* %p.addr, align 8
Patch number 2 for mips16/32 floating point interoperability stubs. This creates stubs that help Mips32 functions call Mips16 functions which have floating point parameters that are normally passed in floating point registers. llvm-svn: 181972
2013-05-16 10:17:42 +08:00
store double %0, double* @xd, align 8
ret void
}
[mips] Whitespace cleanup in MIPS16 tests to reduce noise in following changes. NFC. Mostly tabs -> spaces and double spacing. llvm-svn: 250041
2015-10-12 22:16:52 +08:00
; stel: .section .mips16.fn.v_df,"ax",@progbits
; stel: .ent __fn_stub_v_df
[mips] Enable IAS by default for 32-bit MIPS targets (O32). Summary: The MIPS IAS can now pass 'ninja check-all', recurse, build a bootable linux kernel, and pass a variety of LNT testing. Unfortunately we can't enable it by default for 64-bit targets yet since the N32 ABI is still very buggy and this also means we can't enable it for N64 either because we can't distinguish between N32 and N64 in the relevant code. Reviewers: vkalintiris Subscribers: cfe-commits Differential Revision: http://reviews.llvm.org/D18759 Differential Revision: http://reviews.llvm.org/D18761 llvm-svn: 269560
2016-05-14 20:43:08 +08:00
; stel: lui $25, %hi(v_df)
; stel: addiu $25, $25, %lo(v_df)
[mips][mips16] Re-work the inline assembly stubs to work with IAS. NFC. Summary: Previously, we were inserting an InlineAsm statement for each line of the inline assembly. This works for GAS but it triggers prologue/epilogue emission when IAS is in use. This caused: .set noreorder .cpload $25 to be emitted as: .set push .set reorder .set noreorder .set pop .set push .set reorder .cpload $25 .set pop which led to assembler errors and caused the test to fail. The whitespace-after-comma changes included in this patch are necessary to match the output when IAS is in use. Reviewers: vkalintiris Subscribers: rkotler, llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D13653 llvm-svn: 250895
2015-10-21 20:44:14 +08:00
; stel: mfc1 $4, $f12
; stel: mfc1 $5, $f13
[mips] Whitespace cleanup in MIPS16 tests to reduce noise in following changes. NFC. Mostly tabs -> spaces and double spacing. llvm-svn: 250041
2015-10-12 22:16:52 +08:00
; stel: jr $25
Use .set instead of = when printing assignment in assembly output On Hexagon "x = y" is a syntax used in most instructions, and is not treated as a directive. Differential Revision: https://reviews.llvm.org/D44256 llvm-svn: 328635
2018-03-28 00:44:41 +08:00
; stel: .set $__fn_local_v_df, v_df
[mips] Whitespace cleanup in MIPS16 tests to reduce noise in following changes. NFC. Mostly tabs -> spaces and double spacing. llvm-svn: 250041
2015-10-12 22:16:52 +08:00
; stel: .end __fn_stub_v_df
Patch number 2 for mips16/32 floating point interoperability stubs. This creates stubs that help Mips32 functions call Mips16 functions which have floating point parameters that are normally passed in floating point registers. llvm-svn: 181972
2013-05-16 10:17:42 +08:00
; Function Attrs: nounwind
define void @v_sf_sf(float %p1, float %p2) #0 {
entry:
%p1.addr = alloca float, align 4
%p2.addr = alloca float, align 4
store float %p1, float* %p1.addr, align 4
store float %p2, float* %p2.addr, align 4
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%0 = load float, float* %p1.addr, align 4
Patch number 2 for mips16/32 floating point interoperability stubs. This creates stubs that help Mips32 functions call Mips16 functions which have floating point parameters that are normally passed in floating point registers. llvm-svn: 181972
2013-05-16 10:17:42 +08:00
store float %0, float* @x, align 4
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%1 = load float, float* %p2.addr, align 4
Patch number 2 for mips16/32 floating point interoperability stubs. This creates stubs that help Mips32 functions call Mips16 functions which have floating point parameters that are normally passed in floating point registers. llvm-svn: 181972
2013-05-16 10:17:42 +08:00
store float %1, float* @y, align 4
ret void
}
[mips] Whitespace cleanup in MIPS16 tests to reduce noise in following changes. NFC. Mostly tabs -> spaces and double spacing. llvm-svn: 250041
2015-10-12 22:16:52 +08:00
; stel: .section .mips16.fn.v_sf_sf,"ax",@progbits
; stel: .ent __fn_stub_v_sf_sf
[mips] Enable IAS by default for 32-bit MIPS targets (O32). Summary: The MIPS IAS can now pass 'ninja check-all', recurse, build a bootable linux kernel, and pass a variety of LNT testing. Unfortunately we can't enable it by default for 64-bit targets yet since the N32 ABI is still very buggy and this also means we can't enable it for N64 either because we can't distinguish between N32 and N64 in the relevant code. Reviewers: vkalintiris Subscribers: cfe-commits Differential Revision: http://reviews.llvm.org/D18759 Differential Revision: http://reviews.llvm.org/D18761 llvm-svn: 269560
2016-05-14 20:43:08 +08:00
; stel: lui $25, %hi(v_sf_sf)
; stel: addiu $25, $25, %lo(v_sf_sf)
[mips][mips16] Re-work the inline assembly stubs to work with IAS. NFC. Summary: Previously, we were inserting an InlineAsm statement for each line of the inline assembly. This works for GAS but it triggers prologue/epilogue emission when IAS is in use. This caused: .set noreorder .cpload $25 to be emitted as: .set push .set reorder .set noreorder .set pop .set push .set reorder .cpload $25 .set pop which led to assembler errors and caused the test to fail. The whitespace-after-comma changes included in this patch are necessary to match the output when IAS is in use. Reviewers: vkalintiris Subscribers: rkotler, llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D13653 llvm-svn: 250895
2015-10-21 20:44:14 +08:00
; stel: mfc1 $4, $f12
; stel: mfc1 $5, $f14
[mips] Whitespace cleanup in MIPS16 tests to reduce noise in following changes. NFC. Mostly tabs -> spaces and double spacing. llvm-svn: 250041
2015-10-12 22:16:52 +08:00
; stel: jr $25
Use .set instead of = when printing assignment in assembly output On Hexagon "x = y" is a syntax used in most instructions, and is not treated as a directive. Differential Revision: https://reviews.llvm.org/D44256 llvm-svn: 328635
2018-03-28 00:44:41 +08:00
; stel: .set $__fn_local_v_sf_sf, v_sf_sf
[mips] Whitespace cleanup in MIPS16 tests to reduce noise in following changes. NFC. Mostly tabs -> spaces and double spacing. llvm-svn: 250041
2015-10-12 22:16:52 +08:00
; stel: .end __fn_stub_v_sf_sf
Patch number 2 for mips16/32 floating point interoperability stubs. This creates stubs that help Mips32 functions call Mips16 functions which have floating point parameters that are normally passed in floating point registers. llvm-svn: 181972
2013-05-16 10:17:42 +08:00
; Function Attrs: nounwind
define void @v_sf_df(float %p1, double %p2) #0 {
entry:
%p1.addr = alloca float, align 4
%p2.addr = alloca double, align 8
store float %p1, float* %p1.addr, align 4
store double %p2, double* %p2.addr, align 8
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%0 = load float, float* %p1.addr, align 4
Patch number 2 for mips16/32 floating point interoperability stubs. This creates stubs that help Mips32 functions call Mips16 functions which have floating point parameters that are normally passed in floating point registers. llvm-svn: 181972
2013-05-16 10:17:42 +08:00
store float %0, float* @x, align 4
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%1 = load double, double* %p2.addr, align 8
Patch number 2 for mips16/32 floating point interoperability stubs. This creates stubs that help Mips32 functions call Mips16 functions which have floating point parameters that are normally passed in floating point registers. llvm-svn: 181972
2013-05-16 10:17:42 +08:00
store double %1, double* @yd, align 8
ret void
}
[mips] Whitespace cleanup in MIPS16 tests to reduce noise in following changes. NFC. Mostly tabs -> spaces and double spacing. llvm-svn: 250041
2015-10-12 22:16:52 +08:00
; stel: .section .mips16.fn.v_sf_df,"ax",@progbits
; stel: .ent __fn_stub_v_sf_df
[mips] Enable IAS by default for 32-bit MIPS targets (O32). Summary: The MIPS IAS can now pass 'ninja check-all', recurse, build a bootable linux kernel, and pass a variety of LNT testing. Unfortunately we can't enable it by default for 64-bit targets yet since the N32 ABI is still very buggy and this also means we can't enable it for N64 either because we can't distinguish between N32 and N64 in the relevant code. Reviewers: vkalintiris Subscribers: cfe-commits Differential Revision: http://reviews.llvm.org/D18759 Differential Revision: http://reviews.llvm.org/D18761 llvm-svn: 269560
2016-05-14 20:43:08 +08:00
; stel: lui $25, %hi(v_sf_df)
; stel: addiu $25, $25, %lo(v_sf_df)
[mips][mips16] Re-work the inline assembly stubs to work with IAS. NFC. Summary: Previously, we were inserting an InlineAsm statement for each line of the inline assembly. This works for GAS but it triggers prologue/epilogue emission when IAS is in use. This caused: .set noreorder .cpload $25 to be emitted as: .set push .set reorder .set noreorder .set pop .set push .set reorder .cpload $25 .set pop which led to assembler errors and caused the test to fail. The whitespace-after-comma changes included in this patch are necessary to match the output when IAS is in use. Reviewers: vkalintiris Subscribers: rkotler, llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D13653 llvm-svn: 250895
2015-10-21 20:44:14 +08:00
; stel: mfc1 $4, $f12
; stel: mfc1 $6, $f14
; stel: mfc1 $7, $f15
[mips] Whitespace cleanup in MIPS16 tests to reduce noise in following changes. NFC. Mostly tabs -> spaces and double spacing. llvm-svn: 250041
2015-10-12 22:16:52 +08:00
; stel: jr $25
Use .set instead of = when printing assignment in assembly output On Hexagon "x = y" is a syntax used in most instructions, and is not treated as a directive. Differential Revision: https://reviews.llvm.org/D44256 llvm-svn: 328635
2018-03-28 00:44:41 +08:00
; stel: .set $__fn_local_v_sf_df, v_sf_df
[mips] Whitespace cleanup in MIPS16 tests to reduce noise in following changes. NFC. Mostly tabs -> spaces and double spacing. llvm-svn: 250041
2015-10-12 22:16:52 +08:00
; stel: .end __fn_stub_v_sf_df
Patch number 2 for mips16/32 floating point interoperability stubs. This creates stubs that help Mips32 functions call Mips16 functions which have floating point parameters that are normally passed in floating point registers. llvm-svn: 181972
2013-05-16 10:17:42 +08:00
; Function Attrs: nounwind
define void @v_df_sf(double %p1, float %p2) #0 {
entry:
%p1.addr = alloca double, align 8
%p2.addr = alloca float, align 4
store double %p1, double* %p1.addr, align 8
store float %p2, float* %p2.addr, align 4
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%0 = load double, double* %p1.addr, align 8
Patch number 2 for mips16/32 floating point interoperability stubs. This creates stubs that help Mips32 functions call Mips16 functions which have floating point parameters that are normally passed in floating point registers. llvm-svn: 181972
2013-05-16 10:17:42 +08:00
store double %0, double* @xd, align 8
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%1 = load float, float* %p2.addr, align 4
Patch number 2 for mips16/32 floating point interoperability stubs. This creates stubs that help Mips32 functions call Mips16 functions which have floating point parameters that are normally passed in floating point registers. llvm-svn: 181972
2013-05-16 10:17:42 +08:00
store float %1, float* @y, align 4
ret void
}
[mips] Whitespace cleanup in MIPS16 tests to reduce noise in following changes. NFC. Mostly tabs -> spaces and double spacing. llvm-svn: 250041
2015-10-12 22:16:52 +08:00
; stel: .section .mips16.fn.v_df_sf,"ax",@progbits
; stel: .ent __fn_stub_v_df_sf
[mips] Enable IAS by default for 32-bit MIPS targets (O32). Summary: The MIPS IAS can now pass 'ninja check-all', recurse, build a bootable linux kernel, and pass a variety of LNT testing. Unfortunately we can't enable it by default for 64-bit targets yet since the N32 ABI is still very buggy and this also means we can't enable it for N64 either because we can't distinguish between N32 and N64 in the relevant code. Reviewers: vkalintiris Subscribers: cfe-commits Differential Revision: http://reviews.llvm.org/D18759 Differential Revision: http://reviews.llvm.org/D18761 llvm-svn: 269560
2016-05-14 20:43:08 +08:00
; stel: lui $25, %hi(v_df_sf)
; stel: addiu $25, $25, %lo(v_df_sf)
[mips][mips16] Re-work the inline assembly stubs to work with IAS. NFC. Summary: Previously, we were inserting an InlineAsm statement for each line of the inline assembly. This works for GAS but it triggers prologue/epilogue emission when IAS is in use. This caused: .set noreorder .cpload $25 to be emitted as: .set push .set reorder .set noreorder .set pop .set push .set reorder .cpload $25 .set pop which led to assembler errors and caused the test to fail. The whitespace-after-comma changes included in this patch are necessary to match the output when IAS is in use. Reviewers: vkalintiris Subscribers: rkotler, llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D13653 llvm-svn: 250895
2015-10-21 20:44:14 +08:00
; stel: mfc1 $4, $f12
; stel: mfc1 $5, $f13
; stel: mfc1 $6, $f14
[mips] Whitespace cleanup in MIPS16 tests to reduce noise in following changes. NFC. Mostly tabs -> spaces and double spacing. llvm-svn: 250041
2015-10-12 22:16:52 +08:00
; stel: jr $25
Use .set instead of = when printing assignment in assembly output On Hexagon "x = y" is a syntax used in most instructions, and is not treated as a directive. Differential Revision: https://reviews.llvm.org/D44256 llvm-svn: 328635
2018-03-28 00:44:41 +08:00
; stel: .set $__fn_local_v_df_sf, v_df_sf
[mips] Whitespace cleanup in MIPS16 tests to reduce noise in following changes. NFC. Mostly tabs -> spaces and double spacing. llvm-svn: 250041
2015-10-12 22:16:52 +08:00
; stel: .end __fn_stub_v_df_sf
Patch number 2 for mips16/32 floating point interoperability stubs. This creates stubs that help Mips32 functions call Mips16 functions which have floating point parameters that are normally passed in floating point registers. llvm-svn: 181972
2013-05-16 10:17:42 +08:00
; Function Attrs: nounwind
define void @v_df_df(double %p1, double %p2) #0 {
entry:
%p1.addr = alloca double, align 8
%p2.addr = alloca double, align 8
store double %p1, double* %p1.addr, align 8
store double %p2, double* %p2.addr, align 8
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%0 = load double, double* %p1.addr, align 8
Patch number 2 for mips16/32 floating point interoperability stubs. This creates stubs that help Mips32 functions call Mips16 functions which have floating point parameters that are normally passed in floating point registers. llvm-svn: 181972
2013-05-16 10:17:42 +08:00
store double %0, double* @xd, align 8
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%1 = load double, double* %p2.addr, align 8
Patch number 2 for mips16/32 floating point interoperability stubs. This creates stubs that help Mips32 functions call Mips16 functions which have floating point parameters that are normally passed in floating point registers. llvm-svn: 181972
2013-05-16 10:17:42 +08:00
store double %1, double* @yd, align 8
ret void
}
[mips] Whitespace cleanup in MIPS16 tests to reduce noise in following changes. NFC. Mostly tabs -> spaces and double spacing. llvm-svn: 250041
2015-10-12 22:16:52 +08:00
; stel: .section .mips16.fn.v_df_df,"ax",@progbits
; stel: .ent __fn_stub_v_df_df
[mips] Enable IAS by default for 32-bit MIPS targets (O32). Summary: The MIPS IAS can now pass 'ninja check-all', recurse, build a bootable linux kernel, and pass a variety of LNT testing. Unfortunately we can't enable it by default for 64-bit targets yet since the N32 ABI is still very buggy and this also means we can't enable it for N64 either because we can't distinguish between N32 and N64 in the relevant code. Reviewers: vkalintiris Subscribers: cfe-commits Differential Revision: http://reviews.llvm.org/D18759 Differential Revision: http://reviews.llvm.org/D18761 llvm-svn: 269560
2016-05-14 20:43:08 +08:00
; stel: lui $25, %hi(v_df_df)
; stel: addiu $25, $25, %lo(v_df_df)
[mips][mips16] Re-work the inline assembly stubs to work with IAS. NFC. Summary: Previously, we were inserting an InlineAsm statement for each line of the inline assembly. This works for GAS but it triggers prologue/epilogue emission when IAS is in use. This caused: .set noreorder .cpload $25 to be emitted as: .set push .set reorder .set noreorder .set pop .set push .set reorder .cpload $25 .set pop which led to assembler errors and caused the test to fail. The whitespace-after-comma changes included in this patch are necessary to match the output when IAS is in use. Reviewers: vkalintiris Subscribers: rkotler, llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D13653 llvm-svn: 250895
2015-10-21 20:44:14 +08:00
; stel: mfc1 $4, $f12
; stel: mfc1 $5, $f13
; stel: mfc1 $6, $f14
; stel: mfc1 $7, $f15
[mips] Whitespace cleanup in MIPS16 tests to reduce noise in following changes. NFC. Mostly tabs -> spaces and double spacing. llvm-svn: 250041
2015-10-12 22:16:52 +08:00
; stel: jr $25
Use .set instead of = when printing assignment in assembly output On Hexagon "x = y" is a syntax used in most instructions, and is not treated as a directive. Differential Revision: https://reviews.llvm.org/D44256 llvm-svn: 328635
2018-03-28 00:44:41 +08:00
; stel: .set $__fn_local_v_df_df, v_df_df
[mips] Whitespace cleanup in MIPS16 tests to reduce noise in following changes. NFC. Mostly tabs -> spaces and double spacing. llvm-svn: 250041
2015-10-12 22:16:52 +08:00
; stel: .end __fn_stub_v_df_df
Patch number 2 for mips16/32 floating point interoperability stubs. This creates stubs that help Mips32 functions call Mips16 functions which have floating point parameters that are normally passed in floating point registers. llvm-svn: 181972
2013-05-16 10:17:42 +08:00
; Function Attrs: nounwind
define float @sf_v() #0 {
entry:
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%0 = load float, float* @ret_sf, align 4
Patch number 2 for mips16/32 floating point interoperability stubs. This creates stubs that help Mips32 functions call Mips16 functions which have floating point parameters that are normally passed in floating point registers. llvm-svn: 181972
2013-05-16 10:17:42 +08:00
ret float %0
}
; Function Attrs: nounwind
define float @sf_sf(float %p) #0 {
entry:
%p.addr = alloca float, align 4
store float %p, float* %p.addr, align 4
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%0 = load float, float* %p.addr, align 4
Patch number 2 for mips16/32 floating point interoperability stubs. This creates stubs that help Mips32 functions call Mips16 functions which have floating point parameters that are normally passed in floating point registers. llvm-svn: 181972
2013-05-16 10:17:42 +08:00
store float %0, float* @x, align 4
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%1 = load float, float* @ret_sf, align 4
Patch number 2 for mips16/32 floating point interoperability stubs. This creates stubs that help Mips32 functions call Mips16 functions which have floating point parameters that are normally passed in floating point registers. llvm-svn: 181972
2013-05-16 10:17:42 +08:00
ret float %1
}
[mips] Whitespace cleanup in MIPS16 tests to reduce noise in following changes. NFC. Mostly tabs -> spaces and double spacing. llvm-svn: 250041
2015-10-12 22:16:52 +08:00
; stel: .section .mips16.fn.sf_sf,"ax",@progbits
; stel: .ent __fn_stub_sf_sf
[mips] Enable IAS by default for 32-bit MIPS targets (O32). Summary: The MIPS IAS can now pass 'ninja check-all', recurse, build a bootable linux kernel, and pass a variety of LNT testing. Unfortunately we can't enable it by default for 64-bit targets yet since the N32 ABI is still very buggy and this also means we can't enable it for N64 either because we can't distinguish between N32 and N64 in the relevant code. Reviewers: vkalintiris Subscribers: cfe-commits Differential Revision: http://reviews.llvm.org/D18759 Differential Revision: http://reviews.llvm.org/D18761 llvm-svn: 269560
2016-05-14 20:43:08 +08:00
; stel: lui $25, %hi(sf_sf)
; stel: addiu $25, $25, %lo(sf_sf)
[mips][mips16] Re-work the inline assembly stubs to work with IAS. NFC. Summary: Previously, we were inserting an InlineAsm statement for each line of the inline assembly. This works for GAS but it triggers prologue/epilogue emission when IAS is in use. This caused: .set noreorder .cpload $25 to be emitted as: .set push .set reorder .set noreorder .set pop .set push .set reorder .cpload $25 .set pop which led to assembler errors and caused the test to fail. The whitespace-after-comma changes included in this patch are necessary to match the output when IAS is in use. Reviewers: vkalintiris Subscribers: rkotler, llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D13653 llvm-svn: 250895
2015-10-21 20:44:14 +08:00
; stel: mfc1 $4, $f12
[mips] Whitespace cleanup in MIPS16 tests to reduce noise in following changes. NFC. Mostly tabs -> spaces and double spacing. llvm-svn: 250041
2015-10-12 22:16:52 +08:00
; stel: jr $25
Use .set instead of = when printing assignment in assembly output On Hexagon "x = y" is a syntax used in most instructions, and is not treated as a directive. Differential Revision: https://reviews.llvm.org/D44256 llvm-svn: 328635
2018-03-28 00:44:41 +08:00
; stel: .set $__fn_local_sf_sf, sf_sf
[mips] Whitespace cleanup in MIPS16 tests to reduce noise in following changes. NFC. Mostly tabs -> spaces and double spacing. llvm-svn: 250041
2015-10-12 22:16:52 +08:00
; stel: .end __fn_stub_sf_sf
Patch number 2 for mips16/32 floating point interoperability stubs. This creates stubs that help Mips32 functions call Mips16 functions which have floating point parameters that are normally passed in floating point registers. llvm-svn: 181972
2013-05-16 10:17:42 +08:00
; Function Attrs: nounwind
define float @sf_df(double %p) #0 {
entry:
%p.addr = alloca double, align 8
store double %p, double* %p.addr, align 8
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%0 = load double, double* %p.addr, align 8
Patch number 2 for mips16/32 floating point interoperability stubs. This creates stubs that help Mips32 functions call Mips16 functions which have floating point parameters that are normally passed in floating point registers. llvm-svn: 181972
2013-05-16 10:17:42 +08:00
store double %0, double* @xd, align 8
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%1 = load float, float* @ret_sf, align 4
Patch number 2 for mips16/32 floating point interoperability stubs. This creates stubs that help Mips32 functions call Mips16 functions which have floating point parameters that are normally passed in floating point registers. llvm-svn: 181972
2013-05-16 10:17:42 +08:00
ret float %1
}
[mips] Whitespace cleanup in MIPS16 tests to reduce noise in following changes. NFC. Mostly tabs -> spaces and double spacing. llvm-svn: 250041
2015-10-12 22:16:52 +08:00
; stel: .section .mips16.fn.sf_df,"ax",@progbits
; stel: .ent __fn_stub_sf_df
[mips] Enable IAS by default for 32-bit MIPS targets (O32). Summary: The MIPS IAS can now pass 'ninja check-all', recurse, build a bootable linux kernel, and pass a variety of LNT testing. Unfortunately we can't enable it by default for 64-bit targets yet since the N32 ABI is still very buggy and this also means we can't enable it for N64 either because we can't distinguish between N32 and N64 in the relevant code. Reviewers: vkalintiris Subscribers: cfe-commits Differential Revision: http://reviews.llvm.org/D18759 Differential Revision: http://reviews.llvm.org/D18761 llvm-svn: 269560
2016-05-14 20:43:08 +08:00
; stel: lui $25, %hi(sf_df)
; stel: addiu $25, $25, %lo(sf_df)
[mips][mips16] Re-work the inline assembly stubs to work with IAS. NFC. Summary: Previously, we were inserting an InlineAsm statement for each line of the inline assembly. This works for GAS but it triggers prologue/epilogue emission when IAS is in use. This caused: .set noreorder .cpload $25 to be emitted as: .set push .set reorder .set noreorder .set pop .set push .set reorder .cpload $25 .set pop which led to assembler errors and caused the test to fail. The whitespace-after-comma changes included in this patch are necessary to match the output when IAS is in use. Reviewers: vkalintiris Subscribers: rkotler, llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D13653 llvm-svn: 250895
2015-10-21 20:44:14 +08:00
; stel: mfc1 $4, $f12
; stel: mfc1 $5, $f13
[mips] Whitespace cleanup in MIPS16 tests to reduce noise in following changes. NFC. Mostly tabs -> spaces and double spacing. llvm-svn: 250041
2015-10-12 22:16:52 +08:00
; stel: jr $25
Use .set instead of = when printing assignment in assembly output On Hexagon "x = y" is a syntax used in most instructions, and is not treated as a directive. Differential Revision: https://reviews.llvm.org/D44256 llvm-svn: 328635
2018-03-28 00:44:41 +08:00
; stel: .set $__fn_local_sf_df, sf_df
[mips] Whitespace cleanup in MIPS16 tests to reduce noise in following changes. NFC. Mostly tabs -> spaces and double spacing. llvm-svn: 250041
2015-10-12 22:16:52 +08:00
; stel: .end __fn_stub_sf_df
Patch number 2 for mips16/32 floating point interoperability stubs. This creates stubs that help Mips32 functions call Mips16 functions which have floating point parameters that are normally passed in floating point registers. llvm-svn: 181972
2013-05-16 10:17:42 +08:00
; Function Attrs: nounwind
define float @sf_sf_sf(float %p1, float %p2) #0 {
entry:
%p1.addr = alloca float, align 4
%p2.addr = alloca float, align 4
store float %p1, float* %p1.addr, align 4
store float %p2, float* %p2.addr, align 4
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%0 = load float, float* %p1.addr, align 4
Patch number 2 for mips16/32 floating point interoperability stubs. This creates stubs that help Mips32 functions call Mips16 functions which have floating point parameters that are normally passed in floating point registers. llvm-svn: 181972
2013-05-16 10:17:42 +08:00
store float %0, float* @x, align 4
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%1 = load float, float* %p2.addr, align 4
Patch number 2 for mips16/32 floating point interoperability stubs. This creates stubs that help Mips32 functions call Mips16 functions which have floating point parameters that are normally passed in floating point registers. llvm-svn: 181972
2013-05-16 10:17:42 +08:00
store float %1, float* @y, align 4
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%2 = load float, float* @ret_sf, align 4
Patch number 2 for mips16/32 floating point interoperability stubs. This creates stubs that help Mips32 functions call Mips16 functions which have floating point parameters that are normally passed in floating point registers. llvm-svn: 181972
2013-05-16 10:17:42 +08:00
ret float %2
}
[mips] Whitespace cleanup in MIPS16 tests to reduce noise in following changes. NFC. Mostly tabs -> spaces and double spacing. llvm-svn: 250041
2015-10-12 22:16:52 +08:00
; stel: .section .mips16.fn.sf_sf_sf,"ax",@progbits
; stel: .ent __fn_stub_sf_sf_sf
[mips] Enable IAS by default for 32-bit MIPS targets (O32). Summary: The MIPS IAS can now pass 'ninja check-all', recurse, build a bootable linux kernel, and pass a variety of LNT testing. Unfortunately we can't enable it by default for 64-bit targets yet since the N32 ABI is still very buggy and this also means we can't enable it for N64 either because we can't distinguish between N32 and N64 in the relevant code. Reviewers: vkalintiris Subscribers: cfe-commits Differential Revision: http://reviews.llvm.org/D18759 Differential Revision: http://reviews.llvm.org/D18761 llvm-svn: 269560
2016-05-14 20:43:08 +08:00
; stel: lui $25, %hi(sf_sf_sf)
; stel: addiu $25, $25, %lo(sf_sf_sf)
[mips][mips16] Re-work the inline assembly stubs to work with IAS. NFC. Summary: Previously, we were inserting an InlineAsm statement for each line of the inline assembly. This works for GAS but it triggers prologue/epilogue emission when IAS is in use. This caused: .set noreorder .cpload $25 to be emitted as: .set push .set reorder .set noreorder .set pop .set push .set reorder .cpload $25 .set pop which led to assembler errors and caused the test to fail. The whitespace-after-comma changes included in this patch are necessary to match the output when IAS is in use. Reviewers: vkalintiris Subscribers: rkotler, llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D13653 llvm-svn: 250895
2015-10-21 20:44:14 +08:00
; stel: mfc1 $4, $f12
; stel: mfc1 $5, $f14
[mips] Whitespace cleanup in MIPS16 tests to reduce noise in following changes. NFC. Mostly tabs -> spaces and double spacing. llvm-svn: 250041
2015-10-12 22:16:52 +08:00
; stel: jr $25
Use .set instead of = when printing assignment in assembly output On Hexagon "x = y" is a syntax used in most instructions, and is not treated as a directive. Differential Revision: https://reviews.llvm.org/D44256 llvm-svn: 328635
2018-03-28 00:44:41 +08:00
; stel: .set $__fn_local_sf_sf_sf, sf_sf_sf
[mips] Whitespace cleanup in MIPS16 tests to reduce noise in following changes. NFC. Mostly tabs -> spaces and double spacing. llvm-svn: 250041
2015-10-12 22:16:52 +08:00
; stel: .end __fn_stub_sf_sf_sf
Patch number 2 for mips16/32 floating point interoperability stubs. This creates stubs that help Mips32 functions call Mips16 functions which have floating point parameters that are normally passed in floating point registers. llvm-svn: 181972
2013-05-16 10:17:42 +08:00
; Function Attrs: nounwind
define float @sf_sf_df(float %p1, double %p2) #0 {
entry:
%p1.addr = alloca float, align 4
%p2.addr = alloca double, align 8
store float %p1, float* %p1.addr, align 4
store double %p2, double* %p2.addr, align 8
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%0 = load float, float* %p1.addr, align 4
Patch number 2 for mips16/32 floating point interoperability stubs. This creates stubs that help Mips32 functions call Mips16 functions which have floating point parameters that are normally passed in floating point registers. llvm-svn: 181972
2013-05-16 10:17:42 +08:00
store float %0, float* @x, align 4
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%1 = load double, double* %p2.addr, align 8
Patch number 2 for mips16/32 floating point interoperability stubs. This creates stubs that help Mips32 functions call Mips16 functions which have floating point parameters that are normally passed in floating point registers. llvm-svn: 181972
2013-05-16 10:17:42 +08:00
store double %1, double* @yd, align 8
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%2 = load float, float* @ret_sf, align 4
Patch number 2 for mips16/32 floating point interoperability stubs. This creates stubs that help Mips32 functions call Mips16 functions which have floating point parameters that are normally passed in floating point registers. llvm-svn: 181972
2013-05-16 10:17:42 +08:00
ret float %2
}
[mips] Whitespace cleanup in MIPS16 tests to reduce noise in following changes. NFC. Mostly tabs -> spaces and double spacing. llvm-svn: 250041
2015-10-12 22:16:52 +08:00
; stel: .section .mips16.fn.sf_sf_df,"ax",@progbits
; stel: .ent __fn_stub_sf_sf_df
[mips] Enable IAS by default for 32-bit MIPS targets (O32). Summary: The MIPS IAS can now pass 'ninja check-all', recurse, build a bootable linux kernel, and pass a variety of LNT testing. Unfortunately we can't enable it by default for 64-bit targets yet since the N32 ABI is still very buggy and this also means we can't enable it for N64 either because we can't distinguish between N32 and N64 in the relevant code. Reviewers: vkalintiris Subscribers: cfe-commits Differential Revision: http://reviews.llvm.org/D18759 Differential Revision: http://reviews.llvm.org/D18761 llvm-svn: 269560
2016-05-14 20:43:08 +08:00
; stel: lui $25, %hi(sf_sf_df)
; stel: addiu $25, $25, %lo(sf_sf_df)
[mips][mips16] Re-work the inline assembly stubs to work with IAS. NFC. Summary: Previously, we were inserting an InlineAsm statement for each line of the inline assembly. This works for GAS but it triggers prologue/epilogue emission when IAS is in use. This caused: .set noreorder .cpload $25 to be emitted as: .set push .set reorder .set noreorder .set pop .set push .set reorder .cpload $25 .set pop which led to assembler errors and caused the test to fail. The whitespace-after-comma changes included in this patch are necessary to match the output when IAS is in use. Reviewers: vkalintiris Subscribers: rkotler, llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D13653 llvm-svn: 250895
2015-10-21 20:44:14 +08:00
; stel: mfc1 $4, $f12
; stel: mfc1 $6, $f14
; stel: mfc1 $7, $f15
[mips] Whitespace cleanup in MIPS16 tests to reduce noise in following changes. NFC. Mostly tabs -> spaces and double spacing. llvm-svn: 250041
2015-10-12 22:16:52 +08:00
; stel: jr $25
Use .set instead of = when printing assignment in assembly output On Hexagon "x = y" is a syntax used in most instructions, and is not treated as a directive. Differential Revision: https://reviews.llvm.org/D44256 llvm-svn: 328635
2018-03-28 00:44:41 +08:00
; stel: .set $__fn_local_sf_sf_df, sf_sf_df
[mips] Whitespace cleanup in MIPS16 tests to reduce noise in following changes. NFC. Mostly tabs -> spaces and double spacing. llvm-svn: 250041
2015-10-12 22:16:52 +08:00
; stel: .end __fn_stub_sf_sf_df
Patch number 2 for mips16/32 floating point interoperability stubs. This creates stubs that help Mips32 functions call Mips16 functions which have floating point parameters that are normally passed in floating point registers. llvm-svn: 181972
2013-05-16 10:17:42 +08:00
; Function Attrs: nounwind
define float @sf_df_sf(double %p1, float %p2) #0 {
entry:
%p1.addr = alloca double, align 8
%p2.addr = alloca float, align 4
store double %p1, double* %p1.addr, align 8
store float %p2, float* %p2.addr, align 4
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%0 = load double, double* %p1.addr, align 8
Patch number 2 for mips16/32 floating point interoperability stubs. This creates stubs that help Mips32 functions call Mips16 functions which have floating point parameters that are normally passed in floating point registers. llvm-svn: 181972
2013-05-16 10:17:42 +08:00
store double %0, double* @xd, align 8
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%1 = load float, float* %p2.addr, align 4
Patch number 2 for mips16/32 floating point interoperability stubs. This creates stubs that help Mips32 functions call Mips16 functions which have floating point parameters that are normally passed in floating point registers. llvm-svn: 181972
2013-05-16 10:17:42 +08:00
store float %1, float* @y, align 4
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%2 = load float, float* @ret_sf, align 4
Patch number 2 for mips16/32 floating point interoperability stubs. This creates stubs that help Mips32 functions call Mips16 functions which have floating point parameters that are normally passed in floating point registers. llvm-svn: 181972
2013-05-16 10:17:42 +08:00
ret float %2
}
[mips] Whitespace cleanup in MIPS16 tests to reduce noise in following changes. NFC. Mostly tabs -> spaces and double spacing. llvm-svn: 250041
2015-10-12 22:16:52 +08:00
; stel: .section .mips16.fn.sf_df_sf,"ax",@progbits
; stel: .ent __fn_stub_sf_df_sf
[mips] Enable IAS by default for 32-bit MIPS targets (O32). Summary: The MIPS IAS can now pass 'ninja check-all', recurse, build a bootable linux kernel, and pass a variety of LNT testing. Unfortunately we can't enable it by default for 64-bit targets yet since the N32 ABI is still very buggy and this also means we can't enable it for N64 either because we can't distinguish between N32 and N64 in the relevant code. Reviewers: vkalintiris Subscribers: cfe-commits Differential Revision: http://reviews.llvm.org/D18759 Differential Revision: http://reviews.llvm.org/D18761 llvm-svn: 269560
2016-05-14 20:43:08 +08:00
; stel: lui $25, %hi(sf_df_sf)
; stel: addiu $25, $25, %lo(sf_df_sf)
[mips][mips16] Re-work the inline assembly stubs to work with IAS. NFC. Summary: Previously, we were inserting an InlineAsm statement for each line of the inline assembly. This works for GAS but it triggers prologue/epilogue emission when IAS is in use. This caused: .set noreorder .cpload $25 to be emitted as: .set push .set reorder .set noreorder .set pop .set push .set reorder .cpload $25 .set pop which led to assembler errors and caused the test to fail. The whitespace-after-comma changes included in this patch are necessary to match the output when IAS is in use. Reviewers: vkalintiris Subscribers: rkotler, llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D13653 llvm-svn: 250895
2015-10-21 20:44:14 +08:00
; stel: mfc1 $4, $f12
; stel: mfc1 $5, $f13
; stel: mfc1 $6, $f14
[mips] Whitespace cleanup in MIPS16 tests to reduce noise in following changes. NFC. Mostly tabs -> spaces and double spacing. llvm-svn: 250041
2015-10-12 22:16:52 +08:00
; stel: jr $25
Use .set instead of = when printing assignment in assembly output On Hexagon "x = y" is a syntax used in most instructions, and is not treated as a directive. Differential Revision: https://reviews.llvm.org/D44256 llvm-svn: 328635
2018-03-28 00:44:41 +08:00
; stel: .set $__fn_local_sf_df_sf, sf_df_sf
[mips] Whitespace cleanup in MIPS16 tests to reduce noise in following changes. NFC. Mostly tabs -> spaces and double spacing. llvm-svn: 250041
2015-10-12 22:16:52 +08:00
; stel: .end __fn_stub_sf_df_sf
Patch number 2 for mips16/32 floating point interoperability stubs. This creates stubs that help Mips32 functions call Mips16 functions which have floating point parameters that are normally passed in floating point registers. llvm-svn: 181972
2013-05-16 10:17:42 +08:00
; Function Attrs: nounwind
define float @sf_df_df(double %p1, double %p2) #0 {
entry:
%p1.addr = alloca double, align 8
%p2.addr = alloca double, align 8
store double %p1, double* %p1.addr, align 8
store double %p2, double* %p2.addr, align 8
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%0 = load double, double* %p1.addr, align 8
Patch number 2 for mips16/32 floating point interoperability stubs. This creates stubs that help Mips32 functions call Mips16 functions which have floating point parameters that are normally passed in floating point registers. llvm-svn: 181972
2013-05-16 10:17:42 +08:00
store double %0, double* @xd, align 8
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%1 = load double, double* %p2.addr, align 8
Patch number 2 for mips16/32 floating point interoperability stubs. This creates stubs that help Mips32 functions call Mips16 functions which have floating point parameters that are normally passed in floating point registers. llvm-svn: 181972
2013-05-16 10:17:42 +08:00
store double %1, double* @yd, align 8
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%2 = load float, float* @ret_sf, align 4
Patch number 2 for mips16/32 floating point interoperability stubs. This creates stubs that help Mips32 functions call Mips16 functions which have floating point parameters that are normally passed in floating point registers. llvm-svn: 181972
2013-05-16 10:17:42 +08:00
ret float %2
}
[mips] Whitespace cleanup in MIPS16 tests to reduce noise in following changes. NFC. Mostly tabs -> spaces and double spacing. llvm-svn: 250041
2015-10-12 22:16:52 +08:00
; stel: .section .mips16.fn.sf_df_df,"ax",@progbits
; stel: .ent __fn_stub_sf_df_df
[mips] Enable IAS by default for 32-bit MIPS targets (O32). Summary: The MIPS IAS can now pass 'ninja check-all', recurse, build a bootable linux kernel, and pass a variety of LNT testing. Unfortunately we can't enable it by default for 64-bit targets yet since the N32 ABI is still very buggy and this also means we can't enable it for N64 either because we can't distinguish between N32 and N64 in the relevant code. Reviewers: vkalintiris Subscribers: cfe-commits Differential Revision: http://reviews.llvm.org/D18759 Differential Revision: http://reviews.llvm.org/D18761 llvm-svn: 269560
2016-05-14 20:43:08 +08:00
; stel: lui $25, %hi(sf_df_df)
; stel: addiu $25, $25, %lo(sf_df_df)
[mips][mips16] Re-work the inline assembly stubs to work with IAS. NFC. Summary: Previously, we were inserting an InlineAsm statement for each line of the inline assembly. This works for GAS but it triggers prologue/epilogue emission when IAS is in use. This caused: .set noreorder .cpload $25 to be emitted as: .set push .set reorder .set noreorder .set pop .set push .set reorder .cpload $25 .set pop which led to assembler errors and caused the test to fail. The whitespace-after-comma changes included in this patch are necessary to match the output when IAS is in use. Reviewers: vkalintiris Subscribers: rkotler, llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D13653 llvm-svn: 250895
2015-10-21 20:44:14 +08:00
; stel: mfc1 $4, $f12
; stel: mfc1 $5, $f13
; stel: mfc1 $6, $f14
; stel: mfc1 $7, $f15
[mips] Whitespace cleanup in MIPS16 tests to reduce noise in following changes. NFC. Mostly tabs -> spaces and double spacing. llvm-svn: 250041
2015-10-12 22:16:52 +08:00
; stel: jr $25
Use .set instead of = when printing assignment in assembly output On Hexagon "x = y" is a syntax used in most instructions, and is not treated as a directive. Differential Revision: https://reviews.llvm.org/D44256 llvm-svn: 328635
2018-03-28 00:44:41 +08:00
; stel: .set $__fn_local_sf_df_df, sf_df_df
[mips] Whitespace cleanup in MIPS16 tests to reduce noise in following changes. NFC. Mostly tabs -> spaces and double spacing. llvm-svn: 250041
2015-10-12 22:16:52 +08:00
; stel: .end __fn_stub_sf_df_df
Patch number 2 for mips16/32 floating point interoperability stubs. This creates stubs that help Mips32 functions call Mips16 functions which have floating point parameters that are normally passed in floating point registers. llvm-svn: 181972
2013-05-16 10:17:42 +08:00
Update to remove the no-frame-pointer-elim-non-leaf flag if it was set to 'false'. llvm-svn: 189068
2013-08-23 05:28:54 +08:00
attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }