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llvm-project/llvm/test/CodeGen/AMDGPU/elf.ll

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Enable FeatureFlatForGlobal on Volcanic Islands This switches to the workaround that HSA defaults to for the mesa path. This should be applied to the 4.0 branch. Patch by Vedran Miletić <vedran@miletic.net> llvm-svn: 292982
2017-01-25 06:02:15 +08:00
; RUN: llc < %s -march=amdgcn -verify-machineinstrs -filetype=obj | llvm-readobj -s -symbols -file-headers - | FileCheck --check-prefix=ELF %s
; RUN: llc < %s -march=amdgcn -verify-machineinstrs -o - | FileCheck --check-prefix=CONFIG --check-prefix=TYPICAL %s
; RUN: llc < %s -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs -filetype=obj | llvm-readobj -s -symbols -file-headers - | FileCheck --check-prefix=ELF %s
; RUN: llc < %s -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs -o - | FileCheck --check-prefix=CONFIG --check-prefix=TONGA %s
; RUN: llc < %s -march=amdgcn -mcpu=carrizo -mattr=-flat-for-global -verify-machineinstrs -filetype=obj | llvm-readobj -s -symbols -file-headers - | FileCheck --check-prefix=ELF %s
; RUN: llc < %s -march=amdgcn -mcpu=carrizo -mattr=-flat-for-global -verify-machineinstrs -o - | FileCheck --check-prefix=CONFIG --check-prefix=TYPICAL %s
R600: Emit ELF formatted code rather than raw ISA. llvm-svn: 179544
2013-04-16 01:51:21 +08:00
Teach getDefaultFormat that we only support ELF on some architectures. This should bring the windows bots back. It is a bit ugly, but it is better than what we had before: The triple would say that the object format was COFF, but llc/llvm-mc would produce an ELF. llvm-svn: 232683
2015-03-19 06:19:16 +08:00
; Test that we don't try to produce a COFF file on windows
Enable FeatureFlatForGlobal on Volcanic Islands This switches to the workaround that HSA defaults to for the mesa path. This should be applied to the 4.0 branch. Patch by Vedran Miletić <vedran@miletic.net> llvm-svn: 292982
2017-01-25 06:02:15 +08:00
; RUN: llc < %s -mtriple=amdgcn-pc-mingw -verify-machineinstrs -filetype=obj | llvm-readobj -s -symbols -file-headers - | FileCheck --check-prefix=ELF %s
Teach getDefaultFormat that we only support ELF on some architectures. This should bring the windows bots back. It is a bit ugly, but it is better than what we had before: The triple would say that the object format was COFF, but llc/llvm-mc would produce an ELF. llvm-svn: 232683
2015-03-19 06:19:16 +08:00
R600/SI: Use ELF64 format instead of ELF32 Reviewers: arsenm, rafael Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10392 llvm-svn: 240331
2015-06-23 05:03:54 +08:00
; ELF: Format: ELF64
AMDGPU/SI: Set ELF OS/ABI to ELFOSABI_AMDGPU_HSA Reviewers: arsenm, rafael Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10708 llvm-svn: 240832
2015-06-27 05:15:11 +08:00
; ELF: OS/ABI: AMDGPU_HSA (0x40)
R600: Use EM_AMDGPU for the ELF Machine type Reviewers: arsenm, rafael Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10390 llvm-svn: 240330
2015-06-23 05:03:52 +08:00
; ELF: Machine: EM_AMDGPU (0xE0)
R600/SI: Remove the -CHECK suffix from all FileCheck prefixes in LIT tests llvm-svn: 228040
2015-02-04 05:53:27 +08:00
; ELF: Name: .AMDGPU.config
; ELF: Type: SHT_PROGBITS
R600/SI: Emit config values in register value pairs. Instead of emitting config values in a predefined order, the code emitter will now emit a 32-bit register index followed by the 32-bit config value. llvm-svn: 179546
2013-04-16 01:51:35 +08:00
R600/SI: Remove the -CHECK suffix from all FileCheck prefixes in LIT tests llvm-svn: 228040
2015-02-04 05:53:27 +08:00
; ELF: Symbol {
; ELF: Name: test
; ELF: Binding: Global
R600/SI: Restore PrivateGlobalPrefix to the default ELF value of ".L" This was changed in r223323. llvm-svn: 223579
2014-12-06 13:34:34 +08:00
R600/SI: Remove the -CHECK suffix from all FileCheck prefixes in LIT tests llvm-svn: 228040
2015-02-04 05:53:27 +08:00
; CONFIG: .section .AMDGPU.config
; CONFIG-NEXT: .long 45096
R600/SI: Limit SGPRs to 80 on Tonga and Iceland This is a candidate for stable. llvm-svn: 231659
2015-03-09 23:48:09 +08:00
; TYPICAL-NEXT: .long 0
AMDGPU/SI: Increase SGPR limit to 96 on Tonga/Iceland Summary: This is the setting of the Vulkan closed source driver. It decreases the max wave count from 10 to 8. 26010 shaders in 14650 tests Totals: VGPRS: 829593 -> 808440 (-2.55 %) Spilled SGPRs: 81878 -> 42226 (-48.43 %) Spilled VGPRs: 367 -> 358 (-2.45 %) Scratch VGPRs: 1764 -> 1748 (-0.91 %) dwords per thread Code Size: 36677864 -> 35923932 (-2.06 %) bytes There is a massive decrease in SGPR spilling in general and -7.4% spilled VGPRs for DiRT Showdown (= SGPRs spilled to scratch?) Reviewers: arsenm, tstellarAMD, nhaehnle Subscribers: arsenm, llvm-commits, kzhuravl Differential Revision: https://reviews.llvm.org/D23034 llvm-svn: 277867
2016-08-06 05:23:29 +08:00
; TONGA-NEXT: .long 704
[MC] Use .p2align instead of .align For historic reasons, the behavior of .align differs between targets. Fortunately, there are alternatives, .p2align and .balign, which make the interpretation of the parameter explicit, and which behave consistently across targets. This patch teaches MC to use .p2align instead of .align, so that people reading code for multiple architectures don't have to remember which way each platform does its .align directive. Differential Revision: http://reviews.llvm.org/D16549 llvm-svn: 258750
2016-01-26 08:03:25 +08:00
; CONFIG: .p2align 8
Call EmitFunctionHeader just before EmitFunctionBody. This avoids switching to .AMDGPU.config and back and hardcoding the section it switches back to. llvm-svn: 232479
2015-03-17 22:34:42 +08:00
; CONFIG: test:
AMDGPU: Remove some uses of llvm.SI.export in tests Merge some of the old, smaller tests into more complete versions. llvm-svn: 295792
2017-02-22 08:02:21 +08:00
define amdgpu_ps void @test(i32 %p) #0 {
R600: Emit ELF formatted code rather than raw ISA. llvm-svn: 179544
2013-04-16 01:51:21 +08:00
%i = add i32 %p, 2
%r = bitcast i32 %i to float
AMDGPU: Remove some uses of llvm.SI.export in tests Merge some of the old, smaller tests into more complete versions. llvm-svn: 295792
2017-02-22 08:02:21 +08:00
call void @llvm.amdgcn.exp.f32(i32 0, i32 15, float %r, float %r, float %r, float %r, i1 true, i1 false)
R600: Emit ELF formatted code rather than raw ISA. llvm-svn: 179544
2013-04-16 01:51:21 +08:00
ret void
}
AMDGPU: Remove some uses of llvm.SI.export in tests Merge some of the old, smaller tests into more complete versions. llvm-svn: 295792
2017-02-22 08:02:21 +08:00
declare void @llvm.amdgcn.exp.f32(i32, i32, float, float, float, float, i1, i1) #0
attributes #0 = { nounwind }