maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity
llvm-project/clang/test/Driver/x86-march.c

146 lines
5.9 KiB
C
Raw Normal View History

Re-work the Clang system for classifying Intel x86 CPUs to use their basic microarchitecture names, and add support (with tests) for parsing all of the masic microarchitecture names for CPUs documented to be accepted by GCC with -march. I didn't go back through the 32-bit-only old microarchitectures, but this at least brings the recent architecture names up to speed. This is essentially the follow-up to the LLVM commit r223769 which did similar cleanups for the LLVM CPUs. One particular benefit is that you can now use -march=westmere in Clang and get the LLVM westmere processor which is a different ISA variant (!) and so quite significant. Much like with r223769, I would appreciate the Intel folks carefully thinking about the macros defined, names used, etc for the atom chips and newest primary x86 chips. The current patterns seem quite strange to me, especially here in Clang. Note that I haven't replicated the per-microarchitecture macro defines provided by GCC. I'm really opposed to source code using these rather than using ISA feature macros. llvm-svn: 223776
2014-12-09 22:50:25 +08:00
// Ensure we support the various CPU architecture names.
//
// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=nocona 2>&1 \
// RUN: | FileCheck %s -check-prefix=nocona
// nocona: "-target-cpu" "nocona"
//
// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=core2 2>&1 \
// RUN: | FileCheck %s -check-prefix=core2
// core2: "-target-cpu" "core2"
//
// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=penryn 2>&1 \
// RUN: | FileCheck %s -check-prefix=penryn
// penryn: "-target-cpu" "penryn"
//
// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=nehalem 2>&1 \
// RUN: | FileCheck %s -check-prefix=nehalem
// nehalem: "-target-cpu" "nehalem"
//
// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=westmere 2>&1 \
// RUN: | FileCheck %s -check-prefix=westmere
// westmere: "-target-cpu" "westmere"
//
// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=sandybridge 2>&1 \
// RUN: | FileCheck %s -check-prefix=sandybridge
// sandybridge: "-target-cpu" "sandybridge"
//
// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=ivybridge 2>&1 \
// RUN: | FileCheck %s -check-prefix=ivybridge
// ivybridge: "-target-cpu" "ivybridge"
//
// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=haswell 2>&1 \
// RUN: | FileCheck %s -check-prefix=haswell
// haswell: "-target-cpu" "haswell"
//
// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=broadwell 2>&1 \
// RUN: | FileCheck %s -check-prefix=broadwell
// broadwell: "-target-cpu" "broadwell"
//
[X86] Add recent CPU strings to some of the tests that check other cpu names. llvm-svn: 291545
2017-01-10 14:02:16 +08:00
// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=skylake 2>&1 \
// RUN: | FileCheck %s -check-prefix=skylake
// skylake: "-target-cpu" "skylake"
//
// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=skylake-avx512 2>&1 \
// RUN: | FileCheck %s -check-prefix=skylake-avx512
// skylake-avx512: "-target-cpu" "skylake-avx512"
//
// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=skx 2>&1 \
// RUN: | FileCheck %s -check-prefix=skx
// skx: "-target-cpu" "skx"
//
// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=knl 2>&1 \
// RUN: | FileCheck %s -check-prefix=knl
// knl: "-target-cpu" "knl"
//
[X86] Add skeleton support for knm cpu This adds support Knights Mill CPU. Preprocessor defines match gcc's implementation. Differential Revision: https://reviews.llvm.org/D38813 llvm-svn: 315723
2017-10-14 02:14:24 +08:00
// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=knm 2>&1 \
// RUN: | FileCheck %s -check-prefix=knm
// knm: "-target-cpu" "knm"
//
[X86] Add recent CPU strings to some of the tests that check other cpu names. llvm-svn: 291545
2017-01-10 14:02:16 +08:00
// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=cannonlake 2>&1 \
// RUN: | FileCheck %s -check-prefix=cannonlake
// cannonlake: "-target-cpu" "cannonlake"
//
[X86] Add icelake CPU support for -march. llvm-svn: 318617
2017-11-19 10:55:15 +08:00
// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=icelake 2>&1 \
// RUN: | FileCheck %s -check-prefix=icelake
// icelake: "-target-cpu" "icelake"
//
[X86] Add recent CPU strings to some of the tests that check other cpu names. llvm-svn: 291545
2017-01-10 14:02:16 +08:00
// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=lakemont 2>&1 \
// RUN: | FileCheck %s -check-prefix=lakemont
// lakemont: "-target-cpu" "lakemont"
//
Re-work the Clang system for classifying Intel x86 CPUs to use their basic microarchitecture names, and add support (with tests) for parsing all of the masic microarchitecture names for CPUs documented to be accepted by GCC with -march. I didn't go back through the 32-bit-only old microarchitectures, but this at least brings the recent architecture names up to speed. This is essentially the follow-up to the LLVM commit r223769 which did similar cleanups for the LLVM CPUs. One particular benefit is that you can now use -march=westmere in Clang and get the LLVM westmere processor which is a different ISA variant (!) and so quite significant. Much like with r223769, I would appreciate the Intel folks carefully thinking about the macros defined, names used, etc for the atom chips and newest primary x86 chips. The current patterns seem quite strange to me, especially here in Clang. Note that I haven't replicated the per-microarchitecture macro defines provided by GCC. I'm really opposed to source code using these rather than using ISA feature macros. llvm-svn: 223776
2014-12-09 22:50:25 +08:00
// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=bonnell 2>&1 \
// RUN: | FileCheck %s -check-prefix=bonnell
// bonnell: "-target-cpu" "bonnell"
//
// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=silvermont 2>&1 \
// RUN: | FileCheck %s -check-prefix=silvermont
// silvermont: "-target-cpu" "silvermont"
//
[X86] Add goldmont to test/Driver/x86-march.c llvm-svn: 322982
2018-01-20 03:43:36 +08:00
// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=goldmont 2>&1 \
// RUN: | FileCheck %s -check-prefix=goldmont
// goldmont: "-target-cpu" "goldmont"
//
Re-work the Clang system for classifying Intel x86 CPUs to use their basic microarchitecture names, and add support (with tests) for parsing all of the masic microarchitecture names for CPUs documented to be accepted by GCC with -march. I didn't go back through the 32-bit-only old microarchitectures, but this at least brings the recent architecture names up to speed. This is essentially the follow-up to the LLVM commit r223769 which did similar cleanups for the LLVM CPUs. One particular benefit is that you can now use -march=westmere in Clang and get the LLVM westmere processor which is a different ISA variant (!) and so quite significant. Much like with r223769, I would appreciate the Intel folks carefully thinking about the macros defined, names used, etc for the atom chips and newest primary x86 chips. The current patterns seem quite strange to me, especially here in Clang. Note that I haven't replicated the per-microarchitecture macro defines provided by GCC. I'm really opposed to source code using these rather than using ISA feature macros. llvm-svn: 223776
2014-12-09 22:50:25 +08:00
// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=k8 2>&1 \
// RUN: | FileCheck %s -check-prefix=k8
// k8: "-target-cpu" "k8"
//
// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=opteron 2>&1 \
// RUN: | FileCheck %s -check-prefix=opteron
// opteron: "-target-cpu" "opteron"
//
// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=athlon64 2>&1 \
// RUN: | FileCheck %s -check-prefix=athlon64
// athlon64: "-target-cpu" "athlon64"
//
// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=athlon-fx 2>&1 \
// RUN: | FileCheck %s -check-prefix=athlon-fx
// athlon-fx: "-target-cpu" "athlon-fx"
//
// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=k8-sse3 2>&1 \
// RUN: | FileCheck %s -check-prefix=k8-sse3
// k8-sse3: "-target-cpu" "k8-sse3"
//
// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=opteron-sse3 2>&1 \
// RUN: | FileCheck %s -check-prefix=opteron-sse3
// opteron-sse3: "-target-cpu" "opteron-sse3"
//
// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=athlon64-sse3 2>&1 \
// RUN: | FileCheck %s -check-prefix=athlon64-sse3
// athlon64-sse3: "-target-cpu" "athlon64-sse3"
//
// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=amdfam10 2>&1 \
// RUN: | FileCheck %s -check-prefix=amdfam10
// amdfam10: "-target-cpu" "amdfam10"
//
// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=barcelona 2>&1 \
// RUN: | FileCheck %s -check-prefix=barcelona
// barcelona: "-target-cpu" "barcelona"
//
// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=bdver1 2>&1 \
// RUN: | FileCheck %s -check-prefix=bdver1
// bdver1: "-target-cpu" "bdver1"
//
// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=bdver2 2>&1 \
// RUN: | FileCheck %s -check-prefix=bdver2
// bdver2: "-target-cpu" "bdver2"
//
// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=bdver3 2>&1 \
// RUN: | FileCheck %s -check-prefix=bdver3
// bdver3: "-target-cpu" "bdver3"
//
// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=bdver4 2>&1 \
// RUN: | FileCheck %s -check-prefix=bdver4
// bdver4: "-target-cpu" "bdver4"
//
// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=btver1 2>&1 \
// RUN: | FileCheck %s -check-prefix=btver1
// btver1: "-target-cpu" "btver1"
//
// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=btver2 2>&1 \
// RUN: | FileCheck %s -check-prefix=btver2
// btver2: "-target-cpu" "btver2"
AMD family 17h (znver1) enablement Summary: This patch enables the following 1. AMD family 17h architecture using "znver1" tune flag (-march, -mcpu). 2. ISAs that are enabled for "znver1" architecture. 3. Checks ADX isa from cpuid to identify "znver1" flag when -march=native is used. 4. ISAs FMA4, XOP are disabled as they are dropped from amdfam17. 5. For the time being, it uses the btver2 scheduler model. 6. Test file is updated to check this flag. This is linked to llvm review item https://reviews.llvm.org/D28017 Patch by Ganesh Gopalasubramanian. Additional test cases added by Craig Topper. Reviewers: RKSimon, craig.topper Subscribers: cfe-commits, RKSimon, ashutosh.nema, llvm-commits Differential Revision: https://reviews.llvm.org/D28018 llvm-svn: 291544
2017-01-10 14:02:12 +08:00
//
// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=znver1 2>&1 \
// RUN: | FileCheck %s -check-prefix=znver1
// znver1: "-target-cpu" "znver1"