2015-11-17 00:22:47 +08:00
|
|
|
// RUN: not llvm-mc -triple aarch64--none-eabi -filetype obj < %s -o /dev/null 2>&1 | FileCheck %s
|
|
|
|
|
2015-11-17 18:00:43 +08:00
|
|
|
// Note: These errors are not always emitted in the order in which the relevant
|
|
|
|
// source appears, this file is carefully ordered so that that is the case.
|
|
|
|
|
2015-11-17 00:22:47 +08:00
|
|
|
.text
|
|
|
|
// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: symbol 'undef' can not be undefined in a subtraction expression
|
|
|
|
.word (0-undef)
|
2015-11-17 18:00:43 +08:00
|
|
|
|
|
|
|
// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: expected relocatable expression
|
|
|
|
.word -undef
|
|
|
|
|
|
|
|
// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: No relocation available to represent this relative expression
|
|
|
|
adr x0, #a-undef
|
|
|
|
|
|
|
|
// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: Cannot represent a difference across sections
|
|
|
|
.word x_a - y_a
|
|
|
|
|
2016-03-23 21:45:03 +08:00
|
|
|
// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: 1-byte data relocations not supported
|
|
|
|
.byte undef
|
|
|
|
|
|
|
|
// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: 1-byte data relocations not supported
|
|
|
|
.byte undef-.
|
|
|
|
|
|
|
|
// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: Unsupported pc-relative fixup kind
|
|
|
|
ldr x0, [x1, :lo12:undef-.]
|
|
|
|
|
|
|
|
// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: invalid fixup for 8-bit load/store instruction
|
|
|
|
ldrb w0, [x1, :gottprel_lo12:undef]
|
|
|
|
|
|
|
|
// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: invalid fixup for 16-bit load/store instruction
|
|
|
|
ldrh w0, [x1, :gottprel_lo12:undef]
|
|
|
|
|
[AArch64] ILP32 Backend Relocation Support
Remove "_NC" suffix and semantics from TLSDESC_LD{64,32}_LO12 and
TLSDESC_ADD_LO12 relocations
Rearrange ordering in AArch64.def to follow relocation encoding
Fix name:
R_AARCH64_P32_LD64_GOT_LO12_NC => R_AARCH64_P32_LD32_GOT_LO12_NC
Add support for several "TLS", "TLSGD", and "TLSLD" relocations for
ILP32
Fix return values from isNonILP32reloc
Add implementations for
R_AARCH64_ADR_PREL_PG_HI21_NC, R_AARCH64_P32_LD32_GOT_LO12_NC,
R_AARCH64_P32_TLSIE_LD32_GOTTPREL_LO12_NC,
R_AARCH64_P32_TLSDESC_LD32_LO12, R_AARCH64_LD64_GOT_LO12_NC,
*TLSLD_LDST128_DTPREL_LO12, *TLSLD_LDST128_DTPREL_LO12_NC,
*TLSLE_LDST128_TPREL_LO12, *TLSLE_LDST128_TPREL_LO12_NC
Modify error messages to give name of equivalent relocation in the
ABI not being used, along with better checking for non-existent
requested relocations.
Added assembler support for "pg_hi21_nc"
Relocation definitions added without implementations:
R_AARCH64_P32_TLSDESC_ADR_PREL21, R_AARCH64_P32_TLSGD_ADR_PREL21,
R_AARCH64_P32_TLSGD_ADD_LO12_NC, R_AARCH64_P32_TLSLD_ADR_PREL21,
R_AARCH64_P32_TLSLD_ADR_PAGE21, R_AARCH64_P32_TLSLD_ADD_LO12_NC,
R_AARCH64_P32_TLSLD_LD_PREL19, R_AARCH64_P32_TLSDESC_LD_PREL19,
R_AARCH64_P32_TLSGD_ADR_PAGE21, R_AARCH64_P32_TLS_DTPREL,
R_AARCH64_P32_TLS_DTPMOD, R_AARCH64_P32_TLS_TPREL,
R_AARCH64_P32_TLSDESC
Fix encoding:
R_AARCH64_P32_TLSDESC_ADR_PAGE21
Reviewers: Peter Smith
Patch by: Joel Jones (jjones@cavium.com)
Differential Revision: https://reviews.llvm.org/D32072
llvm-svn: 301980
2017-05-03 06:01:48 +08:00
|
|
|
// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: LP64 32-bit load/store relocation not supported (ILP32 eqv: TLSIE_LD32_GOTTPREL_LO12_NC)
|
2016-03-23 21:45:03 +08:00
|
|
|
ldr w0, [x1, :gottprel_lo12:undef]
|
|
|
|
|
2015-11-17 18:00:43 +08:00
|
|
|
|
|
|
|
|
|
|
|
w:
|
|
|
|
.word 0
|
|
|
|
.weak w
|
|
|
|
|
|
|
|
|
|
|
|
.section sec_x
|
|
|
|
x_a:
|
|
|
|
.word 0
|
|
|
|
|
|
|
|
|
|
|
|
.section sec_y
|
|
|
|
y_a:
|
|
|
|
.word 0
|