forked from OSchip/llvm-project
530 lines
29 KiB
Plaintext
530 lines
29 KiB
Plaintext
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This README describes a sample invocation of disasm.py whose purpose is to test
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the low level ARM/Thumb disassembly functionality from llvm using the llvm-mc
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command line. We invoke gdb on an executable, try to disassemble a function,
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and then read the memory contents of the disassembled function.
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The byte contents are written into a file named disasm-input.txt and then we
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invoke llvm-mc -disassemble plus options (set with the -o/--options) on the
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byte contents.
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See the following for a sample session using this command:
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da0603a-dhcp191:9131529 johnny$ /Volumes/data/lldb/svn/trunk/utils/test/disasm.py -m /Volumes/data/lldb/llvm/Debug+Asserts/bin/llvm-mc -e MessageComposer.app/MessageComposer -f main --options='-triple=arm-apple-darwin -debug-only=arm-disassembler'
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executable: MessageComposer.app/MessageComposer
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function: main
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llvm-mc: /Volumes/data/lldb/llvm/Debug+Asserts/bin/llvm-mc
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llvm-mc options: -triple=arm-apple-darwin -debug-only=arm-disassembler
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GNU gdb 6.3.50-20050815 (Apple version gdb-1518) (Sat Feb 12 02:56:02 UTC 2011)
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Copyright 2004 Free Software Foundation, Inc.
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GDB is free software, covered by the GNU General Public License, and you are
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welcome to change it and/or distribute copies of it under certain conditions.
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Type "show copying" to see the conditions.
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There is absolutely no warranty for GDB. Type "show warranty" for details.
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This GDB was configured as "--host=x86_64-apple-darwin --target=arm-apple-darwin"...
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warning: Unable to read symbols from "dyld" (prefix __dyld_) (not yet mapped into memory).
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warning: Unable to read symbols from "Foundation" (not yet mapped into memory).
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warning: Unable to read symbols for /System/Library/Frameworks/UIKit.framework/UIKit (file not found).
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warning: Unable to read symbols from "UIKit" (not yet mapped into memory).
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warning: Unable to read symbols for /System/Library/Frameworks/CoreGraphics.framework/CoreGraphics (file not found).
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warning: Unable to read symbols from "CoreGraphics" (not yet mapped into memory).
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warning: Unable to read symbols from "MessageUI" (not yet mapped into memory).
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warning: Unable to read symbols from "libSystem.B.dylib" (not yet mapped into memory).
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warning: Unable to read symbols from "libobjc.A.dylib" (not yet mapped into memory).
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warning: Unable to read symbols from "CoreFoundation" (not yet mapped into memory).
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warning: Could not find object file "/Volumes/Data/HD2/Data/work/tests/iphone-tests/MessageComposer/build/MessageComposer.build/Debug-iphoneos/MessageComposer.build/Objects-normal/armv6/main.o" - no debug information available for "/Volumes/Data/HD2/Data/work/tests/iphone-tests/MessageComposer/main.m".
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warning: Could not find object file "/Volumes/Data/HD2/Data/work/tests/iphone-tests/MessageComposer/build/MessageComposer.build/Debug-iphoneos/MessageComposer.build/Objects-normal/armv6/MessageComposerAppDelegate.o" - no debug information available for "/Volumes/Data/HD2/Data/work/tests/iphone-tests/MessageComposer/Classes/MessageComposerAppDelegate.m".
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warning: Could not find object file "/Volumes/Data/HD2/Data/work/tests/iphone-tests/MessageComposer/build/MessageComposer.build/Debug-iphoneos/MessageComposer.build/Objects-normal/armv6/MessageComposerViewController.o" - no debug information available for "/Volumes/Data/HD2/Data/work/tests/iphone-tests/MessageComposer/Classes/MessageComposerViewController.m".
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(gdb) disassemble main
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Dump of assembler code for function main:
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0x00002180 <main+0>: push {r7, lr}
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0x00002184 <main+4>: add r7, sp, #0 ; 0x0
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0x00002188 <main+8>: sub sp, sp, #16 ; 0x10
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0x0000218c <main+12>: str r0, [sp, #4]
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0x00002190 <main+16>: str r1, [sp]
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0x00002194 <main+20>: ldr r3, [pc, #144] ; 0x222c <main+172>
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0x00002198 <main+24>: add r3, pc, r3
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0x0000219c <main+28>: ldr r3, [r3]
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0x000021a0 <main+32>: mov r2, r3
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0x000021a4 <main+36>: ldr r3, [pc, #132] ; 0x2230 <main+176>
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0x000021a8 <main+40>: add r3, pc, r3
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0x000021ac <main+44>: ldr r3, [r3]
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0x000021b0 <main+48>: mov r0, r2
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0x000021b4 <main+52>: mov r1, r3
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0x000021b8 <main+56>: bl 0x3ff4 <dyld_stub_objc_msgSend>
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0x000021bc <main+60>: mov r3, r0
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0x000021c0 <main+64>: mov r2, r3
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0x000021c4 <main+68>: ldr r3, [pc, #104] ; 0x2234 <main+180>
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0x000021c8 <main+72>: add r3, pc, r3
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0x000021cc <main+76>: ldr r3, [r3]
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0x000021d0 <main+80>: mov r0, r2
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0x000021d4 <main+84>: mov r1, r3
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0x000021d8 <main+88>: bl 0x3ff4 <dyld_stub_objc_msgSend>
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0x000021dc <main+92>: mov r3, r0
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0x000021e0 <main+96>: str r3, [sp, #8]
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0x000021e4 <main+100>: ldr r0, [sp, #4]
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0x000021e8 <main+104>: ldr r1, [sp]
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0x000021ec <main+108>: mov r2, #0 ; 0x0
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0x000021f0 <main+112>: mov r3, #0 ; 0x0
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0x000021f4 <main+116>: bl 0x3fec <dyld_stub_UIApplicationMain>
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0x000021f8 <main+120>: mov r3, r0
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0x000021fc <main+124>: str r3, [sp, #12]
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0x00002200 <main+128>: ldr r2, [sp, #8]
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0x00002204 <main+132>: ldr r3, [pc, #44] ; 0x2238 <main+184>
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0x00002208 <main+136>: add r3, pc, r3
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0x0000220c <main+140>: ldr r3, [r3]
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0x00002210 <main+144>: mov r0, r2
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0x00002214 <main+148>: mov r1, r3
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0x00002218 <main+152>: bl 0x3ff4 <dyld_stub_objc_msgSend>
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0x0000221c <main+156>: ldr r3, [sp, #12]
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0x00002220 <main+160>: mov r0, r3
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0x00002224 <main+164>: sub sp, r7, #0 ; 0x0
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0x00002228 <main+168>: pop {r7, pc}
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0x0000222c <main+172>: strdeq r2, [r0], -r8
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0x00002230 <main+176>: andeq r2, r0, r12, ror r4
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0x00002234 <main+180>: andeq r2, r0, r8, asr r4
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0x00002238 <main+184>: andeq r2, r0, r4, lsl r4
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End of assembler dump.
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(gdb) x /4b 0x00002180
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0x2180 <main>: 0x80 0x40 0x2d 0xe9
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(gdb) x /4b 0x00002184
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0x2184 <main+4>: 0x00 0x70 0x8d 0xe2
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(gdb) x /4b 0x00002188
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0x2188 <main+8>: 0x10 0xd0 0x4d 0xe2
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(gdb) x /4b 0x0000218c
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0x218c <main+12>: 0x04 0x00 0x8d 0xe5
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(gdb) x /4b 0x00002190
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0x2190 <main+16>: 0x00 0x10 0x8d 0xe5
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(gdb) x /4b 0x00002194
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0x2194 <main+20>: 0x90 0x30 0x9f 0xe5
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(gdb) x /4b 0x00002198
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0x2198 <main+24>: 0x03 0x30 0x8f 0xe0
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(gdb) x /4b 0x0000219c
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0x219c <main+28>: 0x00 0x30 0x93 0xe5
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(gdb) x /4b 0x000021a0
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0x21a0 <main+32>: 0x03 0x20 0xa0 0xe1
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(gdb) x /4b 0x000021a4
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0x21a4 <main+36>: 0x84 0x30 0x9f 0xe5
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(gdb) x /4b 0x000021a8
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0x21a8 <main+40>: 0x03 0x30 0x8f 0xe0
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(gdb) x /4b 0x000021ac
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0x21ac <main+44>: 0x00 0x30 0x93 0xe5
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(gdb) x /4b 0x000021b0
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0x21b0 <main+48>: 0x02 0x00 0xa0 0xe1
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(gdb) x /4b 0x000021b4
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0x21b4 <main+52>: 0x03 0x10 0xa0 0xe1
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(gdb) x /4b 0x000021b8
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0x21b8 <main+56>: 0x8d 0x07 0x00 0xeb
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(gdb) x /4b 0x000021bc
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0x21bc <main+60>: 0x00 0x30 0xa0 0xe1
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(gdb) x /4b 0x000021c0
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0x21c0 <main+64>: 0x03 0x20 0xa0 0xe1
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(gdb) x /4b 0x000021c4
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0x21c4 <main+68>: 0x68 0x30 0x9f 0xe5
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(gdb) x /4b 0x000021c8
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0x21c8 <main+72>: 0x03 0x30 0x8f 0xe0
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(gdb) x /4b 0x000021cc
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0x21cc <main+76>: 0x00 0x30 0x93 0xe5
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(gdb) x /4b 0x000021d0
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0x21d0 <main+80>: 0x02 0x00 0xa0 0xe1
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(gdb) x /4b 0x000021d4
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0x21d4 <main+84>: 0x03 0x10 0xa0 0xe1
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(gdb) x /4b 0x000021d8
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0x21d8 <main+88>: 0x85 0x07 0x00 0xeb
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(gdb) x /4b 0x000021dc
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0x21dc <main+92>: 0x00 0x30 0xa0 0xe1
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(gdb) x /4b 0x000021e0
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0x21e0 <main+96>: 0x08 0x30 0x8d 0xe5
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(gdb) x /4b 0x000021e4
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0x21e4 <main+100>: 0x04 0x00 0x9d 0xe5
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(gdb) x /4b 0x000021e8
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0x21e8 <main+104>: 0x00 0x10 0x9d 0xe5
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(gdb) x /4b 0x000021ec
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0x21ec <main+108>: 0x00 0x20 0xa0 0xe3
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(gdb) x /4b 0x000021f0
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0x21f0 <main+112>: 0x00 0x30 0xa0 0xe3
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(gdb) x /4b 0x000021f4
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0x21f4 <main+116>: 0x7c 0x07 0x00 0xeb
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(gdb) x /4b 0x000021f8
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0x21f8 <main+120>: 0x00 0x30 0xa0 0xe1
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(gdb) x /4b 0x000021fc
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0x21fc <main+124>: 0x0c 0x30 0x8d 0xe5
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(gdb) x /4b 0x00002200
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0x2200 <main+128>: 0x08 0x20 0x9d 0xe5
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(gdb) x /4b 0x00002204
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0x2204 <main+132>: 0x2c 0x30 0x9f 0xe5
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(gdb) x /4b 0x00002208
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0x2208 <main+136>: 0x03 0x30 0x8f 0xe0
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(gdb) x /4b 0x0000220c
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0x220c <main+140>: 0x00 0x30 0x93 0xe5
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(gdb) x /4b 0x00002210
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0x2210 <main+144>: 0x02 0x00 0xa0 0xe1
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(gdb) x /4b 0x00002214
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0x2214 <main+148>: 0x03 0x10 0xa0 0xe1
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(gdb) x /4b 0x00002218
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0x2218 <main+152>: 0x75 0x07 0x00 0xeb
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(gdb) x /4b 0x0000221c
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0x221c <main+156>: 0x0c 0x30 0x9d 0xe5
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(gdb) x /4b 0x00002220
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0x2220 <main+160>: 0x03 0x00 0xa0 0xe1
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(gdb) x /4b 0x00002224
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0x2224 <main+164>: 0x00 0xd0 0x47 0xe2
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(gdb) x /4b 0x00002228
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0x2228 <main+168>: 0x80 0x80 0xbd 0xe8
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(gdb) x /4b 0x0000222c
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0x222c <main+172>: 0xf8 0x24 0x00 0x00
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(gdb) x /4b 0x00002230
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0x2230 <main+176>: 0x7c 0x24 0x00 0x00
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(gdb) x /4b 0x00002234
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0x2234 <main+180>: 0x58 0x24 0x00 0x00
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(gdb) x /4b 0x00002238
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0x2238 <main+184>: 0x14 0x24 0x00 0x00
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(gdb) quit
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Executing command: /Volumes/data/lldb/llvm/Debug+Asserts/bin/llvm-mc -disassemble -triple=arm-apple-darwin -debug-only=arm-disassembler disasm-input.txt
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Opcode=345 Name=STMDB_UPD Format=ARM_FORMAT_LDSTMULFRM(10)
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31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
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-------------------------------------------------------------------------------------------------
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| 1: 1: 1: 0| 1: 0: 0: 1| 0: 0: 1: 0| 1: 1: 0: 1| 0: 1: 0: 0| 0: 0: 0: 0| 1: 0: 0: 0| 0: 0: 0: 0|
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-------------------------------------------------------------------------------------------------
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push {r7, lr}
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Opcode=23 Name=ADDri Format=ARM_FORMAT_DPFRM(4)
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31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
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-------------------------------------------------------------------------------------------------
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| 1: 1: 1: 0| 0: 0: 1: 0| 1: 0: 0: 0| 1: 1: 0: 1| 0: 1: 1: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0|
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-------------------------------------------------------------------------------------------------
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add r7, sp, #0
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Opcode=374 Name=SUBri Format=ARM_FORMAT_DPFRM(4)
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31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
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-------------------------------------------------------------------------------------------------
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| 1: 1: 1: 0| 0: 0: 1: 0| 0: 1: 0: 0| 1: 1: 0: 1| 1: 1: 0: 1| 0: 0: 0: 0| 0: 0: 0: 1| 0: 0: 0: 0|
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-------------------------------------------------------------------------------------------------
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sub sp, sp, #16
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Opcode=369 Name=STRi12 Format=ARM_FORMAT_STFRM(7)
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31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
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-------------------------------------------------------------------------------------------------
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| 1: 1: 1: 0| 0: 1: 0: 1| 1: 0: 0: 0| 1: 1: 0: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 1: 0: 0|
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-------------------------------------------------------------------------------------------------
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str r0, [sp, #4]
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Opcode=369 Name=STRi12 Format=ARM_FORMAT_STFRM(7)
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31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
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-------------------------------------------------------------------------------------------------
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| 1: 1: 1: 0| 0: 1: 0: 1| 1: 0: 0: 0| 1: 1: 0: 1| 0: 0: 0: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0|
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-------------------------------------------------------------------------------------------------
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str r1, [sp]
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Opcode=165 Name=LDRcp Format=ARM_FORMAT_LDFRM(6)
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31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
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-------------------------------------------------------------------------------------------------
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| 1: 1: 1: 0| 0: 1: 0: 1| 1: 0: 0: 1| 1: 1: 1: 1| 0: 0: 1: 1| 0: 0: 0: 0| 1: 0: 0: 1| 0: 0: 0: 0|
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-------------------------------------------------------------------------------------------------
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ldr r3, [pc, #144]
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Opcode=24 Name=ADDrr Format=ARM_FORMAT_DPFRM(4)
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31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
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-------------------------------------------------------------------------------------------------
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| 1: 1: 1: 0| 0: 0: 0: 0| 1: 0: 0: 0| 1: 1: 1: 1| 0: 0: 1: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 1: 1|
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-------------------------------------------------------------------------------------------------
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add r3, pc, r3
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Opcode=166 Name=LDRi12 Format=ARM_FORMAT_LDFRM(6)
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31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
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-------------------------------------------------------------------------------------------------
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| 1: 1: 1: 0| 0: 1: 0: 1| 1: 0: 0: 1| 0: 0: 1: 1| 0: 0: 1: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0|
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-------------------------------------------------------------------------------------------------
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ldr r3, [r3]
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Opcode=193 Name=MOVr Format=ARM_FORMAT_DPFRM(4)
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31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
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-------------------------------------------------------------------------------------------------
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| 1: 1: 1: 0| 0: 0: 0: 1| 1: 0: 1: 0| 0: 0: 0: 0| 0: 0: 1: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 1: 1|
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-------------------------------------------------------------------------------------------------
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mov r2, r3
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Opcode=165 Name=LDRcp Format=ARM_FORMAT_LDFRM(6)
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31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
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-------------------------------------------------------------------------------------------------
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| 1: 1: 1: 0| 0: 1: 0: 1| 1: 0: 0: 1| 1: 1: 1: 1| 0: 0: 1: 1| 0: 0: 0: 0| 1: 0: 0: 0| 0: 1: 0: 0|
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-------------------------------------------------------------------------------------------------
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ldr r3, [pc, #132]
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Opcode=24 Name=ADDrr Format=ARM_FORMAT_DPFRM(4)
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31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
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-------------------------------------------------------------------------------------------------
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| 1: 1: 1: 0| 0: 0: 0: 0| 1: 0: 0: 0| 1: 1: 1: 1| 0: 0: 1: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 1: 1|
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-------------------------------------------------------------------------------------------------
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add r3, pc, r3
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Opcode=166 Name=LDRi12 Format=ARM_FORMAT_LDFRM(6)
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31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
| 1: 1: 1: 0| 0: 1: 0: 1| 1: 0: 0: 1| 0: 0: 1: 1| 0: 0: 1: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0|
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
|
||
|
ldr r3, [r3]
|
||
|
Opcode=193 Name=MOVr Format=ARM_FORMAT_DPFRM(4)
|
||
|
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
| 1: 1: 1: 0| 0: 0: 0: 1| 1: 0: 1: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 1: 0|
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
|
||
|
mov r0, r2
|
||
|
Opcode=193 Name=MOVr Format=ARM_FORMAT_DPFRM(4)
|
||
|
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
| 1: 1: 1: 0| 0: 0: 0: 1| 1: 0: 1: 0| 0: 0: 0: 0| 0: 0: 0: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 1: 1|
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
|
||
|
mov r1, r3
|
||
|
Opcode=66 Name=BL Format=ARM_FORMAT_BRFRM(2)
|
||
|
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
| 1: 1: 1: 0| 1: 0: 1: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 1: 1: 1| 1: 0: 0: 0| 1: 1: 0: 1|
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
|
||
|
bl #7732
|
||
|
Opcode=193 Name=MOVr Format=ARM_FORMAT_DPFRM(4)
|
||
|
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
| 1: 1: 1: 0| 0: 0: 0: 1| 1: 0: 1: 0| 0: 0: 0: 0| 0: 0: 1: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0|
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
|
||
|
mov r3, r0
|
||
|
Opcode=193 Name=MOVr Format=ARM_FORMAT_DPFRM(4)
|
||
|
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
| 1: 1: 1: 0| 0: 0: 0: 1| 1: 0: 1: 0| 0: 0: 0: 0| 0: 0: 1: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 1: 1|
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
|
||
|
mov r2, r3
|
||
|
Opcode=165 Name=LDRcp Format=ARM_FORMAT_LDFRM(6)
|
||
|
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
| 1: 1: 1: 0| 0: 1: 0: 1| 1: 0: 0: 1| 1: 1: 1: 1| 0: 0: 1: 1| 0: 0: 0: 0| 0: 1: 1: 0| 1: 0: 0: 0|
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
|
||
|
ldr r3, [pc, #104]
|
||
|
Opcode=24 Name=ADDrr Format=ARM_FORMAT_DPFRM(4)
|
||
|
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
| 1: 1: 1: 0| 0: 0: 0: 0| 1: 0: 0: 0| 1: 1: 1: 1| 0: 0: 1: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 1: 1|
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
|
||
|
add r3, pc, r3
|
||
|
Opcode=166 Name=LDRi12 Format=ARM_FORMAT_LDFRM(6)
|
||
|
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
| 1: 1: 1: 0| 0: 1: 0: 1| 1: 0: 0: 1| 0: 0: 1: 1| 0: 0: 1: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0|
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
|
||
|
ldr r3, [r3]
|
||
|
Opcode=193 Name=MOVr Format=ARM_FORMAT_DPFRM(4)
|
||
|
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
| 1: 1: 1: 0| 0: 0: 0: 1| 1: 0: 1: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 1: 0|
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
|
||
|
mov r0, r2
|
||
|
Opcode=193 Name=MOVr Format=ARM_FORMAT_DPFRM(4)
|
||
|
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
| 1: 1: 1: 0| 0: 0: 0: 1| 1: 0: 1: 0| 0: 0: 0: 0| 0: 0: 0: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 1: 1|
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
|
||
|
mov r1, r3
|
||
|
Opcode=66 Name=BL Format=ARM_FORMAT_BRFRM(2)
|
||
|
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
| 1: 1: 1: 0| 1: 0: 1: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 1: 1: 1| 1: 0: 0: 0| 0: 1: 0: 1|
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
|
||
|
bl #7700
|
||
|
Opcode=193 Name=MOVr Format=ARM_FORMAT_DPFRM(4)
|
||
|
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
| 1: 1: 1: 0| 0: 0: 0: 1| 1: 0: 1: 0| 0: 0: 0: 0| 0: 0: 1: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0|
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
|
||
|
mov r3, r0
|
||
|
Opcode=369 Name=STRi12 Format=ARM_FORMAT_STFRM(7)
|
||
|
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
| 1: 1: 1: 0| 0: 1: 0: 1| 1: 0: 0: 0| 1: 1: 0: 1| 0: 0: 1: 1| 0: 0: 0: 0| 0: 0: 0: 0| 1: 0: 0: 0|
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
|
||
|
str r3, [sp, #8]
|
||
|
Opcode=166 Name=LDRi12 Format=ARM_FORMAT_LDFRM(6)
|
||
|
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
| 1: 1: 1: 0| 0: 1: 0: 1| 1: 0: 0: 1| 1: 1: 0: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 1: 0: 0|
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
|
||
|
ldr r0, [sp, #4]
|
||
|
Opcode=166 Name=LDRi12 Format=ARM_FORMAT_LDFRM(6)
|
||
|
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
| 1: 1: 1: 0| 0: 1: 0: 1| 1: 0: 0: 1| 1: 1: 0: 1| 0: 0: 0: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0|
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
|
||
|
ldr r1, [sp]
|
||
|
Opcode=189 Name=MOVi Format=ARM_FORMAT_DPFRM(4)
|
||
|
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
| 1: 1: 1: 0| 0: 0: 1: 1| 1: 0: 1: 0| 0: 0: 0: 0| 0: 0: 1: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0|
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
|
||
|
mov r2, #0
|
||
|
Opcode=189 Name=MOVi Format=ARM_FORMAT_DPFRM(4)
|
||
|
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
| 1: 1: 1: 0| 0: 0: 1: 1| 1: 0: 1: 0| 0: 0: 0: 0| 0: 0: 1: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0|
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
|
||
|
mov r3, #0
|
||
|
Opcode=66 Name=BL Format=ARM_FORMAT_BRFRM(2)
|
||
|
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
| 1: 1: 1: 0| 1: 0: 1: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 1: 1: 1| 0: 1: 1: 1| 1: 1: 0: 0|
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
|
||
|
bl #7664
|
||
|
Opcode=193 Name=MOVr Format=ARM_FORMAT_DPFRM(4)
|
||
|
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
| 1: 1: 1: 0| 0: 0: 0: 1| 1: 0: 1: 0| 0: 0: 0: 0| 0: 0: 1: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0|
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
|
||
|
mov r3, r0
|
||
|
Opcode=369 Name=STRi12 Format=ARM_FORMAT_STFRM(7)
|
||
|
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
| 1: 1: 1: 0| 0: 1: 0: 1| 1: 0: 0: 0| 1: 1: 0: 1| 0: 0: 1: 1| 0: 0: 0: 0| 0: 0: 0: 0| 1: 1: 0: 0|
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
|
||
|
str r3, [sp, #12]
|
||
|
Opcode=166 Name=LDRi12 Format=ARM_FORMAT_LDFRM(6)
|
||
|
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
| 1: 1: 1: 0| 0: 1: 0: 1| 1: 0: 0: 1| 1: 1: 0: 1| 0: 0: 1: 0| 0: 0: 0: 0| 0: 0: 0: 0| 1: 0: 0: 0|
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
|
||
|
ldr r2, [sp, #8]
|
||
|
Opcode=165 Name=LDRcp Format=ARM_FORMAT_LDFRM(6)
|
||
|
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
| 1: 1: 1: 0| 0: 1: 0: 1| 1: 0: 0: 1| 1: 1: 1: 1| 0: 0: 1: 1| 0: 0: 0: 0| 0: 0: 1: 0| 1: 1: 0: 0|
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
|
||
|
ldr r3, [pc, #44]
|
||
|
Opcode=24 Name=ADDrr Format=ARM_FORMAT_DPFRM(4)
|
||
|
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
| 1: 1: 1: 0| 0: 0: 0: 0| 1: 0: 0: 0| 1: 1: 1: 1| 0: 0: 1: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 1: 1|
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
|
||
|
add r3, pc, r3
|
||
|
Opcode=166 Name=LDRi12 Format=ARM_FORMAT_LDFRM(6)
|
||
|
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
| 1: 1: 1: 0| 0: 1: 0: 1| 1: 0: 0: 1| 0: 0: 1: 1| 0: 0: 1: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0|
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
|
||
|
ldr r3, [r3]
|
||
|
Opcode=193 Name=MOVr Format=ARM_FORMAT_DPFRM(4)
|
||
|
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
| 1: 1: 1: 0| 0: 0: 0: 1| 1: 0: 1: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 1: 0|
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
|
||
|
mov r0, r2
|
||
|
Opcode=193 Name=MOVr Format=ARM_FORMAT_DPFRM(4)
|
||
|
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
| 1: 1: 1: 0| 0: 0: 0: 1| 1: 0: 1: 0| 0: 0: 0: 0| 0: 0: 0: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 1: 1|
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
|
||
|
mov r1, r3
|
||
|
Opcode=66 Name=BL Format=ARM_FORMAT_BRFRM(2)
|
||
|
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
| 1: 1: 1: 0| 1: 0: 1: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 1: 1: 1| 0: 1: 1: 1| 0: 1: 0: 1|
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
|
||
|
bl #7636
|
||
|
Opcode=166 Name=LDRi12 Format=ARM_FORMAT_LDFRM(6)
|
||
|
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
| 1: 1: 1: 0| 0: 1: 0: 1| 1: 0: 0: 1| 1: 1: 0: 1| 0: 0: 1: 1| 0: 0: 0: 0| 0: 0: 0: 0| 1: 1: 0: 0|
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
|
||
|
ldr r3, [sp, #12]
|
||
|
Opcode=193 Name=MOVr Format=ARM_FORMAT_DPFRM(4)
|
||
|
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
| 1: 1: 1: 0| 0: 0: 0: 1| 1: 0: 1: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 1: 1|
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
|
||
|
mov r0, r3
|
||
|
Opcode=374 Name=SUBri Format=ARM_FORMAT_DPFRM(4)
|
||
|
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
| 1: 1: 1: 0| 0: 0: 1: 0| 0: 1: 0: 0| 0: 1: 1: 1| 1: 1: 0: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0|
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
|
||
|
sub sp, r7, #0
|
||
|
Opcode=135 Name=LDMIA_UPD Format=ARM_FORMAT_LDSTMULFRM(10)
|
||
|
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
| 1: 1: 1: 0| 1: 0: 0: 0| 1: 0: 1: 1| 1: 1: 0: 1| 1: 0: 0: 0| 0: 0: 0: 0| 1: 0: 0: 0| 0: 0: 0: 0|
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
|
||
|
pop {r7, pc}
|
||
|
Opcode=356 Name=STRD_POST Format=ARM_FORMAT_STMISCFRM(9)
|
||
|
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 1: 0| 0: 1: 0: 0| 1: 1: 1: 1| 1: 0: 0: 0|
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
|
||
|
strdeq r2, r3, [r0], -r8
|
||
|
Opcode=31 Name=ANDrs Format=ARM_FORMAT_DPSOREGFRM(5)
|
||
|
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 1: 0| 0: 1: 0: 0| 0: 1: 1: 1| 1: 1: 0: 0|
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
|
||
|
andeq r2, r0, r12, ror r4
|
||
|
Opcode=31 Name=ANDrs Format=ARM_FORMAT_DPSOREGFRM(5)
|
||
|
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 1: 0| 0: 1: 0: 0| 0: 1: 0: 1| 1: 0: 0: 0|
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
|
||
|
andeq r2, r0, r8, asr r4
|
||
|
Opcode=31 Name=ANDrs Format=ARM_FORMAT_DPSOREGFRM(5)
|
||
|
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 1: 0| 0: 1: 0: 0| 0: 0: 0: 1| 0: 1: 0: 0|
|
||
|
-------------------------------------------------------------------------------------------------
|
||
|
|
||
|
andeq r2, r0, r4, lsl r4
|
||
|
da0603a-dhcp191:9131529 johnny$
|