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llvm-project/llvm/test/CodeGen/X86/pr16807.ll

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Fix PR16807 - Lower signed division by constant powers-of-2 to target-independent DAG operators instead of target-dependent ones to support them better on targets where vector types are legal but shift operators on that types are illegal. E.g., on AVX, PSRAW is only available on <8 x i16> though <16 x i16> is a legal type. llvm-svn: 192721
2013-10-16 01:51:02 +08:00
; RUN: llc < %s -mtriple=x86_64-linux-gnu -mcpu=core-avx-i | FileCheck %s
define <16 x i16> @f_fu(<16 x i16> %bf) {
allocas:
%avg.i.i = sdiv <16 x i16> %bf, <i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4>
ret <16 x i16> %avg.i.i
}
; CHECK: f_fu
; CHECK: psraw
; CHECK: psrlw
; CHECK: paddw
; CHECK: psraw
; CHECK: psraw
; CHECK: psrlw
; CHECK: paddw
; CHECK: psraw
; CHECK: ret