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llvm-project/llvm/test/CodeGen/X86/4char-promote.ll

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[X86] Autogenerate complete checks. NFC llvm-svn: 346188
2018-11-06 08:31:27 +08:00
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
This test was failing on X86 machines which do not have SSE4. Fixed the test by specifying that the target CPU is corei7. llvm-svn: 133053
2011-06-15 20:26:53 +08:00
; A test for checking PR 9623
X86: Do not use llc -march in tests. `llc -march` is problematic because it only switches the target architecture, but leaves the operating system unchanged. This occasionally leads to indeterministic tests because the OS from LLVM_DEFAULT_TARGET_TRIPLE is used. However we can simply always use `llc -mtriple` instead. This changes all the tests to do this to avoid people using -march when they copy and paste parts of tests. See also the discussion in https://reviews.llvm.org/D35287 llvm-svn: 309774
2017-08-02 08:28:10 +08:00
; RUN: llc -mcpu=corei7 < %s | FileCheck %s
This test was failing on X86 machines which do not have SSE4. Fixed the test by specifying that the target CPU is corei7. llvm-svn: 133053
2011-06-15 20:26:53 +08:00
target triple = "x86_64-apple-darwin"
define <4 x i8> @foo(<4 x i8> %x, <4 x i8> %y) {
[X86] Autogenerate complete checks. NFC llvm-svn: 346188
2018-11-06 08:31:27 +08:00
; CHECK-LABEL: foo:
; CHECK: ## %bb.0: ## %entry
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." The assert that caused this to be reverted should be fixed now. Original commit message: This patch changes our defualt legalization behavior for 16, 32, and 64 bit vectors with i8/i16/i32/i64 scalar types from promotion to widening. For example, v8i8 will now be widened to v16i8 instead of promoted to v8i16. This keeps the elements widths the same and pads with undef elements. We believe this is a better legalization strategy. But it carries some issues due to the fragmented vector ISA. For example, i8 shifts and multiplies get widened and then later have to be promoted/split into vXi16 vectors. This has the potential to cause regressions so we wanted to get it in early in the 10.0 cycle so we have plenty of time to address them. Next steps will be to merge tests that explicitly test the command line option. And then we can remove the option and its associated code. llvm-svn: 368183
2019-08-08 00:24:26 +08:00
; CHECK-NEXT: pmovzxbw {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero
; CHECK-NEXT: pmovzxbw {{.*#+}} xmm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
; CHECK-NEXT: pmullw %xmm1, %xmm2
; CHECK-NEXT: pshufb {{.*#+}} xmm2 = xmm2[0,2,4,6,u,u,u,u,u,u,u,u,u,u,u,u]
; CHECK-NEXT: paddb %xmm2, %xmm0
[X86] Autogenerate complete checks. NFC llvm-svn: 346188
2018-11-06 08:31:27 +08:00
; CHECK-NEXT: retq
This test was failing on X86 machines which do not have SSE4. Fixed the test by specifying that the target CPU is corei7. llvm-svn: 133053
2011-06-15 20:26:53 +08:00
entry:
%binop = mul <4 x i8> %x, %y
%binop6 = add <4 x i8> %binop, %x
ret <4 x i8> %binop6
}