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llvm-project/llvm/test/CodeGen/Hexagon/no-packets-gather.ll

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[Hexagon] Allow use of gather intrinsics even with no-packets Vgather requires must be in a packet with a store, which contradicts the no-packets feature. As a consequence, gather/scatter could not be used with no-packets. Relax this, and allow gather packets as exceptions to the no-packets requirements. llvm-svn: 339177
2018-08-08 04:33:47 +08:00
; RUN: llc -march=hexagon -mattr=+hvxv60,hvx-length64b,-packets < %s | FileCheck %s
[Hexagon] Subtarget feature to emit one instruction per packet This adds two features: "packets", and "nvj". Enabling "packets" allows the compiler to generate instruction packets, while disabling it will prevent it and disable all optimizations that generate them. This feature is enabled by default on all subtargets. The feature "nvj" allows the compiler to generate new-value jumps and it implies "packets". It is enabled on all subtargets. The exception is made for packets with endloop instructions, since they require a certain minimum number of instructions in the packets to which they apply. Disabling "packets" will not prevent hardware loops from being generated. llvm-svn: 327302
2018-03-13 01:47:46 +08:00
target triple = "hexagon"
[Hexagon] Allow use of gather intrinsics even with no-packets Vgather requires must be in a packet with a store, which contradicts the no-packets feature. As a consequence, gather/scatter could not be used with no-packets. Relax this, and allow gather packets as exceptions to the no-packets requirements. llvm-svn: 339177
2018-08-08 04:33:47 +08:00
; Check that the only (multi-instruction) packet is the one with vgather.
; CHECK-LABEL: fred:
; CHECK: {
; CHECK-NEXT: allocframe(r29,#64):raw
; CHECK-NEXT: }
; CHECK-NEXT: {
; CHECK-NEXT: m0 = r2
; CHECK-NEXT: }
; CHECK-NEXT: {
[Hexagon] Expand vgather pseudos during packetization This will allow packetizing the vgather expansion with other instructions. llvm-svn: 340028
2018-08-17 22:24:24 +08:00
; CHECK-NEXT: r29 = and(r29,#-64)
[Hexagon] Allow use of gather intrinsics even with no-packets Vgather requires must be in a packet with a store, which contradicts the no-packets feature. As a consequence, gather/scatter could not be used with no-packets. Relax this, and allow gather packets as exceptions to the no-packets requirements. llvm-svn: 339177
2018-08-08 04:33:47 +08:00
; CHECK-NEXT: }
; CHECK-NEXT: {
[Hexagon] Expand vgather pseudos during packetization This will allow packetizing the vgather expansion with other instructions. llvm-svn: 340028
2018-08-17 22:24:24 +08:00
; CHECK-NEXT: vtmp.w = vgather(r1,m0,v0.w).w
; CHECK-NEXT: vmem(r0+#0) = vtmp.new
[Hexagon] Allow use of gather intrinsics even with no-packets Vgather requires must be in a packet with a store, which contradicts the no-packets feature. As a consequence, gather/scatter could not be used with no-packets. Relax this, and allow gather packets as exceptions to the no-packets requirements. llvm-svn: 339177
2018-08-08 04:33:47 +08:00
; CHECK-NEXT: }
; CHECK-NEXT: {
; CHECK-NEXT: r0 = add(r29,#0)
; CHECK-NEXT: }
; CHECK-NEXT: {
; CHECK-NEXT: call foo
; CHECK-NEXT: }
; CHECK-NEXT: {
; CHECK-NEXT: r31:30 = dealloc_return(r30):raw
; CHECK-NEXT: }
[Hexagon] Subtarget feature to emit one instruction per packet This adds two features: "packets", and "nvj". Enabling "packets" allows the compiler to generate instruction packets, while disabling it will prevent it and disable all optimizations that generate them. This feature is enabled by default on all subtargets. The feature "nvj" allows the compiler to generate new-value jumps and it implies "packets". It is enabled on all subtargets. The exception is made for packets with endloop instructions, since they require a certain minimum number of instructions in the packets to which they apply. Disabling "packets" will not prevent hardware loops from being generated. llvm-svn: 327302
2018-03-13 01:47:46 +08:00
define void @fred(i8* %p, i32 %x, i32 %y) local_unnamed_addr #0 {
entry:
%v = alloca <16 x i32>, align 64
%0 = bitcast <16 x i32>* %v to i8*
call void @llvm.lifetime.start(i64 64, i8* nonnull %0) #3
tail call void @llvm.hexagon.V6.vgathermw(i8* %p, i32 %x, i32 %y, <16 x i32> undef)
call void @foo(i8* nonnull %0) #0
call void @llvm.lifetime.end(i64 64, i8* nonnull %0) #3
ret void
}
declare void @llvm.lifetime.start(i64, i8* nocapture) #1
declare void @llvm.hexagon.V6.vgathermw(i8*, i32, i32, <16 x i32>) #1
declare void @foo(i8*) local_unnamed_addr #0
declare void @llvm.lifetime.end(i64, i8* nocapture) #1
attributes #0 = { nounwind "target-cpu"="hexagonv65" }
attributes #1 = { argmemonly nounwind }