2018-05-22 07:54:19 +08:00
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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Fix for PR23103. Correctly propagate the 'IsUndef' flag to the register operands of a commuted instruction.
Revision 220239 exposed a latent bug in method
'TargetInstrInfo::commuteInstruction'. When commuting the operands of a machine
instruction, method 'commuteInstruction' didn't correctly propagate the
'IsUndef' flag to the register operands of the new (commuted) instruction.
Before this patch, the following instruction:
%vreg4<def> = VADDSDrr %vreg14, %vreg5<undef>; FR64:%vreg4,%vreg14,%vreg5
was wrongly converted by method 'commuteInstruction' into:
%vreg4<def> = VADDSDrr %vreg5, %vreg14<undef>; FR64:%vreg4,%vreg5,%vreg14
The correct instruction should have been:
%vreg4<def> = VADDSDrr %vreg5<undef>, %vreg14; FR64:%vreg4,%vreg5,%vreg14
This patch fixes the problem in method 'TargetInstrInfo::commuteInstruction'.
When swapping the operands of a machine instruction, we now make sure that
'IsUndef' flags are correctly set.
Added test case 'pr23103.ll'.
Differential Revision: http://reviews.llvm.org/D9406
llvm-svn: 236258
2015-05-01 05:03:29 +08:00
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; RUN: llc -verify-machineinstrs -mtriple=x86_64-unknown-unknown -mcpu=generic -mattr=+avx < %s | FileCheck %s
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; When commuting a VADDSDrr instruction, verify that the 'IsUndef' flag is
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; correctly propagated to the operands of the resulting instruction.
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; Test for PR23103;
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declare zeroext i1 @foo(<1 x double>)
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define <1 x double> @pr23103(<1 x double>* align 8 %Vp) {
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; CHECK-LABEL: pr23103:
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2018-05-22 07:54:19 +08:00
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pushq %rax
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
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Fix for PR23103. Correctly propagate the 'IsUndef' flag to the register operands of a commuted instruction.
Revision 220239 exposed a latent bug in method
'TargetInstrInfo::commuteInstruction'. When commuting the operands of a machine
instruction, method 'commuteInstruction' didn't correctly propagate the
'IsUndef' flag to the register operands of the new (commuted) instruction.
Before this patch, the following instruction:
%vreg4<def> = VADDSDrr %vreg14, %vreg5<undef>; FR64:%vreg4,%vreg14,%vreg5
was wrongly converted by method 'commuteInstruction' into:
%vreg4<def> = VADDSDrr %vreg5, %vreg14<undef>; FR64:%vreg4,%vreg5,%vreg14
The correct instruction should have been:
%vreg4<def> = VADDSDrr %vreg5<undef>, %vreg14; FR64:%vreg4,%vreg5,%vreg14
This patch fixes the problem in method 'TargetInstrInfo::commuteInstruction'.
When swapping the operands of a machine instruction, we now make sure that
'IsUndef' flags are correctly set.
Added test case 'pr23103.ll'.
Differential Revision: http://reviews.llvm.org/D9406
llvm-svn: 236258
2015-05-01 05:03:29 +08:00
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; CHECK-NEXT: callq foo
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2018-06-05 05:49:23 +08:00
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; CHECK-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
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2018-05-22 07:54:19 +08:00
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; CHECK-NEXT: popq %rax
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2018-06-05 05:49:23 +08:00
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; CHECK-NEXT: .cfi_def_cfa_offset 8
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2018-05-22 07:54:19 +08:00
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; CHECK-NEXT: retq
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Fix for PR23103. Correctly propagate the 'IsUndef' flag to the register operands of a commuted instruction.
Revision 220239 exposed a latent bug in method
'TargetInstrInfo::commuteInstruction'. When commuting the operands of a machine
instruction, method 'commuteInstruction' didn't correctly propagate the
'IsUndef' flag to the register operands of the new (commuted) instruction.
Before this patch, the following instruction:
%vreg4<def> = VADDSDrr %vreg14, %vreg5<undef>; FR64:%vreg4,%vreg14,%vreg5
was wrongly converted by method 'commuteInstruction' into:
%vreg4<def> = VADDSDrr %vreg5, %vreg14<undef>; FR64:%vreg4,%vreg5,%vreg14
The correct instruction should have been:
%vreg4<def> = VADDSDrr %vreg5<undef>, %vreg14; FR64:%vreg4,%vreg5,%vreg14
This patch fixes the problem in method 'TargetInstrInfo::commuteInstruction'.
When swapping the operands of a machine instruction, we now make sure that
'IsUndef' flags are correctly set.
Added test case 'pr23103.ll'.
Differential Revision: http://reviews.llvm.org/D9406
llvm-svn: 236258
2015-05-01 05:03:29 +08:00
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entry:
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%V = load <1 x double>, <1 x double>* %Vp, align 8
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%call = call zeroext i1 @foo(<1 x double> %V)
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%fadd = fadd <1 x double> %V, undef
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ret <1 x double> %fadd
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}
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