2016-04-30 05:52:13 +08:00
|
|
|
; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
|
|
|
|
|
|
|
|
; GCN-LABEL: {{^}}lower_control_flow_unreachable_terminator:
|
2016-09-30 09:50:20 +08:00
|
|
|
; GCN: v_cmp_eq_u32
|
2016-04-30 05:52:13 +08:00
|
|
|
; GCN: s_and_saveexec_b64
|
2017-03-25 03:52:05 +08:00
|
|
|
; GCN: ; mask branch [[RET:BB[0-9]+_[0-9]+]]
|
2016-04-30 05:52:13 +08:00
|
|
|
|
2017-03-25 03:52:05 +08:00
|
|
|
; GCN-NEXT: BB{{[0-9]+_[0-9]+}}: ; %unreachable
|
2016-04-30 05:52:13 +08:00
|
|
|
; GCN: ds_write_b32
|
2017-03-25 03:52:05 +08:00
|
|
|
; GCN: ; divergent unreachable
|
|
|
|
|
|
|
|
; GCN-NEXT: [[RET]]: ; %UnifiedReturnBlock
|
|
|
|
; GCN: s_endpgm
|
|
|
|
|
2017-03-22 05:39:51 +08:00
|
|
|
define amdgpu_kernel void @lower_control_flow_unreachable_terminator() #0 {
|
2016-04-30 05:52:13 +08:00
|
|
|
bb:
|
|
|
|
%tmp15 = tail call i32 @llvm.amdgcn.workitem.id.y()
|
|
|
|
%tmp63 = icmp eq i32 %tmp15, 32
|
2016-10-07 00:20:41 +08:00
|
|
|
br i1 %tmp63, label %unreachable, label %ret
|
2016-04-30 05:52:13 +08:00
|
|
|
|
2016-10-07 00:20:41 +08:00
|
|
|
unreachable:
|
2016-04-30 05:52:13 +08:00
|
|
|
store volatile i32 0, i32 addrspace(3)* undef, align 4
|
|
|
|
unreachable
|
|
|
|
|
2016-10-07 00:20:41 +08:00
|
|
|
ret:
|
2016-04-30 05:52:13 +08:00
|
|
|
ret void
|
|
|
|
}
|
|
|
|
|
|
|
|
; GCN-LABEL: {{^}}lower_control_flow_unreachable_terminator_swap_block_order:
|
2017-03-25 03:52:05 +08:00
|
|
|
; GCN: v_cmp_ne_u32
|
2016-04-30 05:52:13 +08:00
|
|
|
; GCN: s_and_saveexec_b64
|
2017-03-25 03:52:05 +08:00
|
|
|
; GCN: ; mask branch [[RETURN:BB[0-9]+_[0-9]+]]
|
2016-04-30 05:52:13 +08:00
|
|
|
|
2017-03-25 03:52:05 +08:00
|
|
|
; GCN-NEXT: {{^BB[0-9]+_[0-9]+}}: ; %unreachable
|
2016-04-30 05:52:13 +08:00
|
|
|
; GCN: ds_write_b32
|
2017-03-25 03:52:05 +08:00
|
|
|
; GCN: ; divergent unreachable
|
|
|
|
|
|
|
|
; GCN: [[RETURN]]:
|
|
|
|
; GCN-NEXT: s_endpgm
|
2017-03-22 05:39:51 +08:00
|
|
|
define amdgpu_kernel void @lower_control_flow_unreachable_terminator_swap_block_order() #0 {
|
2016-04-30 05:52:13 +08:00
|
|
|
bb:
|
|
|
|
%tmp15 = tail call i32 @llvm.amdgcn.workitem.id.y()
|
|
|
|
%tmp63 = icmp eq i32 %tmp15, 32
|
2016-10-07 00:20:41 +08:00
|
|
|
br i1 %tmp63, label %ret, label %unreachable
|
2016-04-30 05:52:13 +08:00
|
|
|
|
2016-10-07 00:20:41 +08:00
|
|
|
ret:
|
2016-04-30 05:52:13 +08:00
|
|
|
ret void
|
|
|
|
|
2016-10-07 00:20:41 +08:00
|
|
|
unreachable:
|
2016-04-30 05:52:13 +08:00
|
|
|
store volatile i32 0, i32 addrspace(3)* undef, align 4
|
|
|
|
unreachable
|
|
|
|
}
|
|
|
|
|
2017-03-25 03:52:05 +08:00
|
|
|
; GCN-LABEL: {{^}}uniform_lower_control_flow_unreachable_terminator:
|
|
|
|
; GCN: s_cmp_lg_u32
|
|
|
|
; GCN: s_cbranch_scc0 [[UNREACHABLE:BB[0-9]+_[0-9]+]]
|
|
|
|
|
2017-12-05 01:18:51 +08:00
|
|
|
; GCN-NEXT: %bb.{{[0-9]+}}: ; %ret
|
2017-03-25 03:52:05 +08:00
|
|
|
; GCN-NEXT: s_endpgm
|
|
|
|
|
|
|
|
; GCN: [[UNREACHABLE]]:
|
|
|
|
; GCN: ds_write_b32
|
|
|
|
define amdgpu_kernel void @uniform_lower_control_flow_unreachable_terminator(i32 %arg0) #0 {
|
|
|
|
bb:
|
|
|
|
%tmp63 = icmp eq i32 %arg0, 32
|
|
|
|
br i1 %tmp63, label %unreachable, label %ret
|
|
|
|
|
|
|
|
unreachable:
|
|
|
|
store volatile i32 0, i32 addrspace(3)* undef, align 4
|
|
|
|
unreachable
|
|
|
|
|
|
|
|
ret:
|
|
|
|
ret void
|
|
|
|
}
|
|
|
|
|
2016-04-30 05:52:13 +08:00
|
|
|
declare i32 @llvm.amdgcn.workitem.id.y() #1
|
|
|
|
|
|
|
|
attributes #0 = { nounwind }
|
|
|
|
attributes #1 = { nounwind readnone }
|
|
|
|
attributes #2 = { nounwind }
|