llvm-project/llvm/test/CodeGen/AArch64/arm64-zext.ll

; RUN: llc < %s -mtriple=arm64-eabi | FileCheck %s

define i64 @foo(i32 %a, i32 %b) nounwind readnone ssp {
entry:
; CHECK-LABEL: foo:
; CHECK: add w0, w1, w0
; CHECK: ret
  %add = add i32 %b, %a
  %conv = zext i32 %add to i64
  ret i64 %conv
}
[AARCH64] Enable AARCH64 lit tests on windows dev machines As discussed on PR27654, this patch fixes the triples of a lot of aarch64 tests and enables lit tests on windows This will hopefully help stop cases where windows developers break the aarch64 target Differential Revision: https://reviews.llvm.org/D22191 llvm-svn: 275973 2016-07-19 21:35:11 +08:00			`; RUN: llc < %s -mtriple=arm64-eabi \| FileCheck %s`
ARM64: initial backend import This adds a second implementation of the AArch64 architecture to LLVM, accessible in parallel via the "arm64" triple. The plan over the coming weeks & months is to merge the two into a single backend, during which time thorough code review should naturally occur. Everything will be easier with the target in-tree though, hence this commit. llvm-svn: 205090 2014-03-29 18:18:08 +08:00
			`define i64 @foo(i32 %a, i32 %b) nounwind readnone ssp {`
			`entry:`
			`; CHECK-LABEL: foo:`
			`; CHECK: add w0, w1, w0`
			`; CHECK: ret`
			`%add = add i32 %b, %a`
			`%conv = zext i32 %add to i64`
			`ret i64 %conv`
			`}`