2020-05-31 07:37:57 +08:00
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 < %s | FileCheck -check-prefix=GCN %s
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;
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; Make sure shaders with uniform, unmodified global address space
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; loads are accessed with scalar loads.
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define amdgpu_ps i32 @ps_load_uniform_global_i32_align4(i32 addrspace(1)* inreg %ptr) {
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; GCN-LABEL: ps_load_uniform_global_i32_align4:
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; GCN: ; %bb.0:
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; GCN-NEXT: s_load_dword s0, s[2:3], 0x0
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2020-09-23 23:16:39 +08:00
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; GCN-NEXT: s_waitcnt lgkmcnt(0)
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2020-05-31 07:37:57 +08:00
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; GCN-NEXT: ; return to shader part epilog
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%load = load i32, i32 addrspace(1)* %ptr, align 4
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ret i32 %load
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}
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define amdgpu_cs i32 @cs_load_uniform_global_i32_align4(i32 addrspace(1)* inreg %ptr) {
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; GCN-LABEL: cs_load_uniform_global_i32_align4:
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; GCN: ; %bb.0:
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; GCN-NEXT: s_load_dword s0, s[2:3], 0x0
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2020-09-23 23:16:39 +08:00
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; GCN-NEXT: s_waitcnt lgkmcnt(0)
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2020-05-31 07:37:57 +08:00
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; GCN-NEXT: ; return to shader part epilog
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%load = load i32, i32 addrspace(1)* %ptr, align 4
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ret i32 %load
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}
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