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llvm-project/llvm/test/CodeGen/AMDGPU/hsa-metadata-deduce-ro-arg.ll

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AMDGPU: Update AMDHSA code object version handling Differential Revision: https://reviews.llvm.org/D89076
2020-10-15 01:03:37 +08:00
; RUN: llc -mtriple=amdgcn-amd-amdhsa --amdhsa-code-object-version=2 -filetype=obj -o - < %s | llvm-readelf --notes - | FileCheck %s
[AMDGPU] set read_only access qualifier for pointers If a kernel's pointer argument is known to be readonly set access qualifier accordingly. This allows RT not to flush caches before dispatches. Differential Revision: https://reviews.llvm.org/D32091 llvm-svn: 300362
2017-04-15 03:11:40 +08:00
; CHECK: - Name: test_ro_arg
AMDGPU: Bring HSA metadata on par with the specification Differential Revision: https://reviews.llvm.org/D38753 llvm-svn: 315821
2017-10-15 03:03:51 +08:00
; CHECK-NEXT: SymbolName: 'test_ro_arg@kd'
; CHECK-NEXT: Args:
AMDGPU: Report Arg's Value name in metadata if kernel_arg_name metadata is not available Differential Revision: https://reviews.llvm.org/D40924 llvm-svn: 320176
2017-12-09 03:22:12 +08:00
; CHECK-NEXT: - Name: in
; CHECK-NEXT: TypeName: 'float*'
AMDGPU: Bring HSA metadata on par with the specification Differential Revision: https://reviews.llvm.org/D38753 llvm-svn: 315821
2017-10-15 03:03:51 +08:00
; CHECK-NEXT: Size: 8
[AMDGPU] set read_only access qualifier for pointers If a kernel's pointer argument is known to be readonly set access qualifier accordingly. This allows RT not to flush caches before dispatches. Differential Revision: https://reviews.llvm.org/D32091 llvm-svn: 300362
2017-04-15 03:11:40 +08:00
; CHECK-NEXT: Align: 8
; CHECK-NEXT: ValueKind: GlobalBuffer
; CHECK-NEXT: AddrSpaceQual: Global
AMDGPU: Bring HSA metadata on par with the specification Differential Revision: https://reviews.llvm.org/D38753 llvm-svn: 315821
2017-10-15 03:03:51 +08:00
; CHECK-NEXT: AccQual: ReadOnly
[AMDGPU] set read_only access qualifier for pointers If a kernel's pointer argument is known to be readonly set access qualifier accordingly. This allows RT not to flush caches before dispatches. Differential Revision: https://reviews.llvm.org/D32091 llvm-svn: 300362
2017-04-15 03:11:40 +08:00
; CHECK-NEXT: IsConst: true
; CHECK-NEXT: IsRestrict: true
AMDGPU: Report Arg's Value name in metadata if kernel_arg_name metadata is not available Differential Revision: https://reviews.llvm.org/D40924 llvm-svn: 320176
2017-12-09 03:22:12 +08:00
; CHECK-NEXT: - Name: out
; CHECK-NEXT: TypeName: 'float*'
AMDGPU: Bring HSA metadata on par with the specification Differential Revision: https://reviews.llvm.org/D38753 llvm-svn: 315821
2017-10-15 03:03:51 +08:00
; CHECK-NEXT: Size: 8
[AMDGPU] set read_only access qualifier for pointers If a kernel's pointer argument is known to be readonly set access qualifier accordingly. This allows RT not to flush caches before dispatches. Differential Revision: https://reviews.llvm.org/D32091 llvm-svn: 300362
2017-04-15 03:11:40 +08:00
; CHECK-NEXT: Align: 8
; CHECK-NEXT: ValueKind: GlobalBuffer
; CHECK-NEXT: AddrSpaceQual: Global
AMDGPU: Bring HSA metadata on par with the specification Differential Revision: https://reviews.llvm.org/D38753 llvm-svn: 315821
2017-10-15 03:03:51 +08:00
; CHECK-NEXT: AccQual: Default
[AMDGPU] set read_only access qualifier for pointers If a kernel's pointer argument is known to be readonly set access qualifier accordingly. This allows RT not to flush caches before dispatches. Differential Revision: https://reviews.llvm.org/D32091 llvm-svn: 300362
2017-04-15 03:11:40 +08:00
define amdgpu_kernel void @test_ro_arg(float addrspace(1)* noalias readonly %in, float addrspace(1)* %out)
!kernel_arg_addr_space !0 !kernel_arg_access_qual !1 !kernel_arg_type !2
!kernel_arg_base_type !2 !kernel_arg_type_qual !3 {
ret void
}
!0 = !{i32 1, i32 1}
!1 = !{!"none", !"none"}
!2 = !{!"float*", !"float*"}
!3 = !{!"const restrict", !""}