forked from OSchip/llvm-project
19 lines
777 B
LLVM
19 lines
777 B
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,X86
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,X64
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; Only bottom 16 bits are set - upper 48 bits are zero.
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define <2 x i64> @combine_psadbw_shift(<16 x i8> %0, <16 x i8> %1) {
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; CHECK-LABEL: combine_psadbw_shift:
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; CHECK: # %bb.0:
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; CHECK-NEXT: psadbw %xmm1, %xmm0
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; CHECK-NEXT: psrlq $48, %xmm0
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; CHECK-NEXT: ret{{[l|q]}}
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%3 = tail call <2 x i64> @llvm.x86.sse2.psad.bw(<16 x i8> %0, <16 x i8> %1)
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%4 = lshr <2 x i64> %3, <i64 48, i64 48>
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ret <2 x i64> %4
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}
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declare <2 x i64> @llvm.x86.sse2.psad.bw(<16 x i8>, <16 x i8>)
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