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llvm-project/llvm/test/CodeGen/X86/verifier-phi.mir

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Add missing triple args to tests llvm-svn: 319686
2017-12-05 04:08:28 +08:00
# RUN: llc -o - %s -mtriple=x86_64-- -verify-machineinstrs -run-pass=none | FileCheck %s
MachineVerifier: undef phi arg doesn't need to be live-out from predecessor Differential Revision: https://reviews.llvm.org/D40756 llvm-svn: 319674
2017-12-05 02:57:48 +08:00
# This should cleanly pass the machine verifier
---
# CHECK-LABEL: name: func0
# CHECK: %0:gr32 = PHI undef %1:gr32, %bb.0, undef %1:gr32, %bb.1
name: func0
tracksRegLiveness: true
body: |
bb.0:
Followup on Proposal to move MIR physical register namespace to '$' sigil. Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
2018-02-01 06:04:26 +08:00
JE_1 %bb.1, implicit undef $eflags
MachineVerifier: undef phi arg doesn't need to be live-out from predecessor Differential Revision: https://reviews.llvm.org/D40756 llvm-svn: 319674
2017-12-05 02:57:48 +08:00
JMP_1 %bb.2
bb.1:
bb.2:
%0 : gr32 = PHI undef %1 : gr32, %bb.0, undef %1 : gr32, %bb.1
...
---
# CHECK-LABEL: name: func1
# CHECK: %2:gr32 = PHI %0, %bb.0, %1, %bb.1
name: func1
tracksRegLiveness: true
body: |
bb.0:
%0 : gr32 = IMPLICIT_DEF
Followup on Proposal to move MIR physical register namespace to '$' sigil. Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
2018-02-01 06:04:26 +08:00
JE_1 %bb.1, implicit undef $eflags
MachineVerifier: undef phi arg doesn't need to be live-out from predecessor Differential Revision: https://reviews.llvm.org/D40756 llvm-svn: 319674
2017-12-05 02:57:48 +08:00
JMP_1 %bb.2
bb.1:
%1 : gr32 = IMPLICIT_DEF
bb.2:
%2 : gr32 = PHI %0, %bb.0, %1, %bb.1
...