forked from OSchip/llvm-project
189 lines
8.3 KiB
LLVM
189 lines
8.3 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX
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declare { <4 x i32>, <4 x i1> } @llvm.umul.with.overflow.v4i32(<4 x i32>, <4 x i32>)
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declare { <4 x i32>, <4 x i1> } @llvm.smul.with.overflow.v4i32(<4 x i32>, <4 x i32>)
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define <4 x i32> @umul_v4i32_0(<4 x i32> %a, <4 x i32> %b) nounwind {
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; AVX-LABEL: umul_v4i32_0:
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; AVX: # %bb.0:
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; AVX-NEXT: vxorps %xmm0, %xmm0, %xmm0
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; AVX-NEXT: retq
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%x = call { <4 x i32>, <4 x i1> } @llvm.umul.with.overflow.v4i32(<4 x i32> %a, <4 x i32> zeroinitializer)
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%y = extractvalue { <4 x i32>, <4 x i1> } %x, 0
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%z = extractvalue { <4 x i32>, <4 x i1> } %x, 1
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%u = select <4 x i1> %z, <4 x i32> %b, <4 x i32> %y
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ret <4 x i32> %u
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}
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define <4 x i32> @umul_v4i32_1(<4 x i32> %a, <4 x i32> %b) nounwind {
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; AVX-LABEL: umul_v4i32_1:
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; AVX: # %bb.0:
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; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
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; AVX-NEXT: vmovdqa {{.*#+}} xmm3 = [1,1,1,1]
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; AVX-NEXT: vpmuludq %xmm3, %xmm2, %xmm2
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; AVX-NEXT: vpmuludq %xmm3, %xmm0, %xmm3
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; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]
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; AVX-NEXT: vpblendw {{.*#+}} xmm2 = xmm3[0,1],xmm2[2,3],xmm3[4,5],xmm2[6,7]
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; AVX-NEXT: vpxor %xmm3, %xmm3, %xmm3
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; AVX-NEXT: vpcmpeqd %xmm3, %xmm2, %xmm2
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; AVX-NEXT: vblendvps %xmm2, %xmm0, %xmm1, %xmm0
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; AVX-NEXT: retq
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%x = call { <4 x i32>, <4 x i1> } @llvm.umul.with.overflow.v4i32(<4 x i32> %a, <4 x i32> <i32 1, i32 1, i32 1, i32 1>)
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%y = extractvalue { <4 x i32>, <4 x i1> } %x, 0
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%z = extractvalue { <4 x i32>, <4 x i1> } %x, 1
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%u = select <4 x i1> %z, <4 x i32> %b, <4 x i32> %y
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ret <4 x i32> %u
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}
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define <4 x i32> @umul_v4i32_2(<4 x i32> %a, <4 x i32> %b) nounwind {
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; AVX-LABEL: umul_v4i32_2:
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; AVX: # %bb.0:
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; AVX-NEXT: vpaddd %xmm0, %xmm0, %xmm2
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; AVX-NEXT: vpmaxud %xmm0, %xmm2, %xmm0
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; AVX-NEXT: vpcmpeqd %xmm0, %xmm2, %xmm0
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; AVX-NEXT: vblendvps %xmm0, %xmm2, %xmm1, %xmm0
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; AVX-NEXT: retq
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%x = call { <4 x i32>, <4 x i1> } @llvm.umul.with.overflow.v4i32(<4 x i32> %a, <4 x i32> <i32 2, i32 2, i32 2, i32 2>)
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%y = extractvalue { <4 x i32>, <4 x i1> } %x, 0
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%z = extractvalue { <4 x i32>, <4 x i1> } %x, 1
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%u = select <4 x i1> %z, <4 x i32> %b, <4 x i32> %y
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ret <4 x i32> %u
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}
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define <4 x i32> @umul_v4i32_8(<4 x i32> %a, <4 x i32> %b) nounwind {
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; AVX-LABEL: umul_v4i32_8:
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; AVX: # %bb.0:
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; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
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; AVX-NEXT: vmovdqa {{.*#+}} xmm3 = [8,8,8,8]
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; AVX-NEXT: vpmuludq %xmm3, %xmm2, %xmm2
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; AVX-NEXT: vpmuludq %xmm3, %xmm0, %xmm3
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; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]
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; AVX-NEXT: vpblendw {{.*#+}} xmm2 = xmm3[0,1],xmm2[2,3],xmm3[4,5],xmm2[6,7]
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; AVX-NEXT: vpxor %xmm3, %xmm3, %xmm3
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; AVX-NEXT: vpcmpeqd %xmm3, %xmm2, %xmm2
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; AVX-NEXT: vpslld $3, %xmm0, %xmm0
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; AVX-NEXT: vblendvps %xmm2, %xmm0, %xmm1, %xmm0
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; AVX-NEXT: retq
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%x = call { <4 x i32>, <4 x i1> } @llvm.umul.with.overflow.v4i32(<4 x i32> %a, <4 x i32> <i32 8, i32 8, i32 8, i32 8>)
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%y = extractvalue { <4 x i32>, <4 x i1> } %x, 0
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%z = extractvalue { <4 x i32>, <4 x i1> } %x, 1
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%u = select <4 x i1> %z, <4 x i32> %b, <4 x i32> %y
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ret <4 x i32> %u
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}
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define <4 x i32> @umul_v4i32_2pow31(<4 x i32> %a, <4 x i32> %b) nounwind {
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; AVX-LABEL: umul_v4i32_2pow31:
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; AVX: # %bb.0:
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; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
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; AVX-NEXT: vmovdqa {{.*#+}} xmm3 = [2147483648,2147483648,2147483648,2147483648]
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; AVX-NEXT: vpmuludq %xmm3, %xmm2, %xmm2
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; AVX-NEXT: vpmuludq %xmm3, %xmm0, %xmm3
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; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]
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; AVX-NEXT: vpblendw {{.*#+}} xmm2 = xmm3[0,1],xmm2[2,3],xmm3[4,5],xmm2[6,7]
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; AVX-NEXT: vpxor %xmm3, %xmm3, %xmm3
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; AVX-NEXT: vpcmpeqd %xmm3, %xmm2, %xmm2
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; AVX-NEXT: vpslld $31, %xmm0, %xmm0
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; AVX-NEXT: vblendvps %xmm2, %xmm0, %xmm1, %xmm0
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; AVX-NEXT: retq
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%x = call { <4 x i32>, <4 x i1> } @llvm.umul.with.overflow.v4i32(<4 x i32> %a, <4 x i32> <i32 2147483648, i32 2147483648, i32 2147483648, i32 2147483648>)
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%y = extractvalue { <4 x i32>, <4 x i1> } %x, 0
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%z = extractvalue { <4 x i32>, <4 x i1> } %x, 1
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%u = select <4 x i1> %z, <4 x i32> %b, <4 x i32> %y
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ret <4 x i32> %u
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}
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define <4 x i32> @smul_v4i32_0(<4 x i32> %a, <4 x i32> %b) nounwind {
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; AVX-LABEL: smul_v4i32_0:
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; AVX: # %bb.0:
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; AVX-NEXT: vxorps %xmm0, %xmm0, %xmm0
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; AVX-NEXT: retq
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%x = call { <4 x i32>, <4 x i1> } @llvm.smul.with.overflow.v4i32(<4 x i32> %a, <4 x i32> zeroinitializer)
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%y = extractvalue { <4 x i32>, <4 x i1> } %x, 0
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%z = extractvalue { <4 x i32>, <4 x i1> } %x, 1
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%u = select <4 x i1> %z, <4 x i32> %b, <4 x i32> %y
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ret <4 x i32> %u
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}
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define <4 x i32> @smul_v4i32_1(<4 x i32> %a, <4 x i32> %b) nounwind {
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; AVX-LABEL: smul_v4i32_1:
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; AVX: # %bb.0:
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; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
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; AVX-NEXT: vmovdqa {{.*#+}} xmm3 = [1,1,1,1]
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; AVX-NEXT: vpmuldq %xmm3, %xmm2, %xmm2
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; AVX-NEXT: vpmuldq %xmm3, %xmm0, %xmm3
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; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]
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; AVX-NEXT: vpblendw {{.*#+}} xmm2 = xmm3[0,1],xmm2[2,3],xmm3[4,5],xmm2[6,7]
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; AVX-NEXT: vpsrad $31, %xmm0, %xmm3
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; AVX-NEXT: vpcmpeqd %xmm3, %xmm2, %xmm2
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; AVX-NEXT: vblendvps %xmm2, %xmm0, %xmm1, %xmm0
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; AVX-NEXT: retq
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%x = call { <4 x i32>, <4 x i1> } @llvm.smul.with.overflow.v4i32(<4 x i32> %a, <4 x i32> <i32 1, i32 1, i32 1, i32 1>)
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%y = extractvalue { <4 x i32>, <4 x i1> } %x, 0
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%z = extractvalue { <4 x i32>, <4 x i1> } %x, 1
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%u = select <4 x i1> %z, <4 x i32> %b, <4 x i32> %y
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ret <4 x i32> %u
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}
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define <4 x i32> @smul_v4i32_2(<4 x i32> %a, <4 x i32> %b) nounwind {
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; AVX-LABEL: smul_v4i32_2:
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; AVX: # %bb.0:
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; AVX-NEXT: vpxor %xmm2, %xmm2, %xmm2
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; AVX-NEXT: vpcmpgtd %xmm0, %xmm2, %xmm3
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; AVX-NEXT: vpcmpeqd %xmm4, %xmm4, %xmm4
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; AVX-NEXT: vpxor %xmm4, %xmm3, %xmm3
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; AVX-NEXT: vpaddd %xmm0, %xmm0, %xmm0
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; AVX-NEXT: vpcmpgtd %xmm0, %xmm2, %xmm2
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; AVX-NEXT: vpxor %xmm4, %xmm2, %xmm2
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; AVX-NEXT: vpcmpeqd %xmm2, %xmm3, %xmm2
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; AVX-NEXT: vblendvps %xmm2, %xmm0, %xmm1, %xmm0
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; AVX-NEXT: retq
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%x = call { <4 x i32>, <4 x i1> } @llvm.smul.with.overflow.v4i32(<4 x i32> %a, <4 x i32> <i32 2, i32 2, i32 2, i32 2>)
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%y = extractvalue { <4 x i32>, <4 x i1> } %x, 0
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%z = extractvalue { <4 x i32>, <4 x i1> } %x, 1
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%u = select <4 x i1> %z, <4 x i32> %b, <4 x i32> %y
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ret <4 x i32> %u
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}
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define <4 x i32> @smul_v4i32_8(<4 x i32> %a, <4 x i32> %b) nounwind {
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; AVX-LABEL: smul_v4i32_8:
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; AVX: # %bb.0:
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; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
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; AVX-NEXT: vmovdqa {{.*#+}} xmm3 = [8,8,8,8]
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; AVX-NEXT: vpmuldq %xmm3, %xmm2, %xmm2
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; AVX-NEXT: vpmuldq %xmm3, %xmm0, %xmm3
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; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]
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; AVX-NEXT: vpblendw {{.*#+}} xmm2 = xmm3[0,1],xmm2[2,3],xmm3[4,5],xmm2[6,7]
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; AVX-NEXT: vpslld $3, %xmm0, %xmm0
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; AVX-NEXT: vpsrad $31, %xmm0, %xmm3
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; AVX-NEXT: vpcmpeqd %xmm3, %xmm2, %xmm2
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; AVX-NEXT: vblendvps %xmm2, %xmm0, %xmm1, %xmm0
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; AVX-NEXT: retq
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%x = call { <4 x i32>, <4 x i1> } @llvm.smul.with.overflow.v4i32(<4 x i32> %a, <4 x i32> <i32 8, i32 8, i32 8, i32 8>)
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%y = extractvalue { <4 x i32>, <4 x i1> } %x, 0
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%z = extractvalue { <4 x i32>, <4 x i1> } %x, 1
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%u = select <4 x i1> %z, <4 x i32> %b, <4 x i32> %y
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ret <4 x i32> %u
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}
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define <4 x i32> @smul_v4i32_2pow31(<4 x i32> %a, <4 x i32> %b) nounwind {
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; AVX-LABEL: smul_v4i32_2pow31:
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; AVX: # %bb.0:
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; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
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; AVX-NEXT: vmovdqa {{.*#+}} xmm3 = [2147483648,2147483648,2147483648,2147483648]
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; AVX-NEXT: vpmuldq %xmm3, %xmm2, %xmm2
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; AVX-NEXT: vpmuldq %xmm3, %xmm0, %xmm3
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; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]
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; AVX-NEXT: vpblendw {{.*#+}} xmm2 = xmm3[0,1],xmm2[2,3],xmm3[4,5],xmm2[6,7]
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; AVX-NEXT: vpslld $31, %xmm0, %xmm0
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; AVX-NEXT: vpsrad $31, %xmm0, %xmm3
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; AVX-NEXT: vpcmpeqd %xmm3, %xmm2, %xmm2
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; AVX-NEXT: vblendvps %xmm2, %xmm0, %xmm1, %xmm0
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; AVX-NEXT: retq
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%x = call { <4 x i32>, <4 x i1> } @llvm.smul.with.overflow.v4i32(<4 x i32> %a, <4 x i32> <i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648>)
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%y = extractvalue { <4 x i32>, <4 x i1> } %x, 0
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%z = extractvalue { <4 x i32>, <4 x i1> } %x, 1
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%u = select <4 x i1> %z, <4 x i32> %b, <4 x i32> %y
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ret <4 x i32> %u
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}
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