2017-06-17 01:32:43 +08:00
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//===- X86.cpp ------------------------------------------------------------===//
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//
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// The LLVM Linker
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "InputFiles.h"
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#include "Symbols.h"
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#include "SyntheticSections.h"
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#include "Target.h"
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[lld] unified COFF and ELF error handling on new Common/ErrorHandler
Summary:
The COFF linker and the ELF linker have long had similar but separate
Error.h and Error.cpp files to implement error handling. This change
introduces new error handling code in Common/ErrorHandler.h, changes the
COFF and ELF linkers to use it, and removes the old, separate
implementations.
Reviewers: ruiu
Reviewed By: ruiu
Subscribers: smeenai, jyknight, emaste, sdardis, nemanjai, nhaehnle, mgorny, javed.absar, kbarton, fedor.sergeev, llvm-commits
Differential Revision: https://reviews.llvm.org/D39259
llvm-svn: 316624
2017-10-26 06:28:38 +08:00
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#include "lld/Common/ErrorHandler.h"
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2017-06-17 01:32:43 +08:00
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#include "llvm/Support/Endian.h"
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using namespace llvm;
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using namespace llvm::support::endian;
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using namespace llvm::ELF;
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using namespace lld;
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using namespace lld::elf;
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namespace {
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class X86 final : public TargetInfo {
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public:
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X86();
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2017-11-04 05:21:47 +08:00
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RelExpr getRelExpr(RelType Type, const Symbol &S,
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2017-06-17 01:32:43 +08:00
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const uint8_t *Loc) const override;
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2017-10-12 06:49:24 +08:00
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int64_t getImplicitAddend(const uint8_t *Buf, RelType Type) const override;
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2017-06-17 01:32:43 +08:00
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void writeGotPltHeader(uint8_t *Buf) const override;
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2017-10-12 06:49:24 +08:00
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RelType getDynRel(RelType Type) const override;
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2017-11-04 05:21:47 +08:00
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void writeGotPlt(uint8_t *Buf, const Symbol &S) const override;
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void writeIgotPlt(uint8_t *Buf, const Symbol &S) const override;
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2017-06-17 01:32:43 +08:00
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void writePltHeader(uint8_t *Buf) const override;
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void writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr, uint64_t PltEntryAddr,
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int32_t Index, unsigned RelOff) const override;
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2017-10-12 06:49:24 +08:00
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void relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const override;
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2017-06-17 01:32:43 +08:00
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2017-10-12 06:49:24 +08:00
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RelExpr adjustRelaxExpr(RelType Type, const uint8_t *Data,
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2017-06-17 01:32:43 +08:00
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RelExpr Expr) const override;
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2017-10-12 06:49:24 +08:00
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void relaxTlsGdToIe(uint8_t *Loc, RelType Type, uint64_t Val) const override;
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void relaxTlsGdToLe(uint8_t *Loc, RelType Type, uint64_t Val) const override;
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void relaxTlsIeToLe(uint8_t *Loc, RelType Type, uint64_t Val) const override;
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void relaxTlsLdToLe(uint8_t *Loc, RelType Type, uint64_t Val) const override;
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2017-06-17 01:32:43 +08:00
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};
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} // namespace
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X86::X86() {
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2017-06-26 18:22:17 +08:00
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GotBaseSymOff = -1;
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2017-06-17 01:32:43 +08:00
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CopyRel = R_386_COPY;
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GotRel = R_386_GLOB_DAT;
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PltRel = R_386_JUMP_SLOT;
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IRelativeRel = R_386_IRELATIVE;
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RelativeRel = R_386_RELATIVE;
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TlsGotRel = R_386_TLS_TPOFF;
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TlsModuleIndexRel = R_386_TLS_DTPMOD32;
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TlsOffsetRel = R_386_TLS_DTPOFF32;
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GotEntrySize = 4;
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GotPltEntrySize = 4;
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PltEntrySize = 16;
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PltHeaderSize = 16;
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TlsGdRelaxSkip = 2;
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2017-06-27 03:45:53 +08:00
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TrapInstr = 0xcccccccc; // 0xcc = INT3
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2017-06-17 01:32:43 +08:00
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}
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2017-10-12 11:14:06 +08:00
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static bool hasBaseReg(uint8_t ModRM) { return (ModRM & 0xc7) != 0x5; }
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2017-11-04 05:21:47 +08:00
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RelExpr X86::getRelExpr(RelType Type, const Symbol &S,
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2017-10-12 11:14:06 +08:00
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const uint8_t *Loc) const {
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2017-06-17 01:32:43 +08:00
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switch (Type) {
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case R_386_8:
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case R_386_16:
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case R_386_32:
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case R_386_TLS_LDO_32:
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return R_ABS;
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case R_386_TLS_GD:
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return R_TLSGD;
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case R_386_TLS_LDM:
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return R_TLSLD;
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case R_386_PLT32:
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return R_PLT_PC;
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case R_386_PC8:
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case R_386_PC16:
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case R_386_PC32:
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return R_PC;
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case R_386_GOTPC:
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return R_GOTONLY_PC_FROM_END;
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case R_386_TLS_IE:
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return R_GOT;
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case R_386_GOT32:
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case R_386_GOT32X:
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2017-10-12 10:09:11 +08:00
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// These relocations are arguably mis-designed because their calculations
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// depend on the instructions they are applied to. This is bad because we
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// usually don't care about whether the target section contains valid
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// machine instructions or not. But this is part of the documented ABI, so
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// we had to implement as the standard requires.
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2017-06-17 01:32:43 +08:00
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//
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2017-10-12 10:09:11 +08:00
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// x86 does not support PC-relative data access. Therefore, in order to
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// access GOT contents, a GOT address needs to be known at link-time
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// (which means non-PIC) or compilers have to emit code to get a GOT
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// address at runtime (which means code is position-independent but
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// compilers need to emit extra code for each GOT access.) This decision
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// is made at compile-time. In the latter case, compilers emit code to
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// load an GOT address to a register, which is usually %ebx.
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//
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// So, there are two ways to refer to symbol foo's GOT entry: foo@GOT or
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// foo@GOT(%reg).
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//
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// foo@GOT is not usable in PIC. If we are creating a PIC output and if we
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// find such relocation, we should report an error. foo@GOT is resolved to
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// an *absolute* address of foo's GOT entry, because both GOT address and
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// foo's offset are known. In other words, it's G + A.
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//
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// foo@GOT(%reg) needs to be resolved to a *relative* offset from a GOT to
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// foo's GOT entry in the table, because GOT address is not known but foo's
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// offset in the table is known. It's G + A - GOT.
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//
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// It's unfortunate that compilers emit the same relocation for these
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// different use cases. In order to distinguish them, we have to read a
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// machine instruction.
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//
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// The following code implements it. We assume that Loc[0] is the first
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// byte of a displacement or an immediate field of a valid machine
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// instruction. That means a ModRM byte is at Loc[-1]. By taking a look at
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// the byte, we can determine whether the instruction is register-relative
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// (i.e. it was generated for foo@GOT(%reg)) or absolute (i.e. foo@GOT).
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2017-10-12 11:14:06 +08:00
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return hasBaseReg(Loc[-1]) ? R_GOT_FROM_END : R_GOT;
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2017-06-17 01:32:43 +08:00
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case R_386_TLS_GOTIE:
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return R_GOT_FROM_END;
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case R_386_GOTOFF:
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return R_GOTREL_FROM_END;
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case R_386_TLS_LE:
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return R_TLS;
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case R_386_TLS_LE_32:
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return R_NEG_TLS;
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case R_386_NONE:
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return R_NONE;
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default:
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2017-10-12 11:14:06 +08:00
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return R_INVALID;
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2017-06-17 01:32:43 +08:00
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}
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}
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2017-10-12 06:49:24 +08:00
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RelExpr X86::adjustRelaxExpr(RelType Type, const uint8_t *Data,
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2017-06-17 01:32:43 +08:00
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RelExpr Expr) const {
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switch (Expr) {
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default:
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return Expr;
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case R_RELAX_TLS_GD_TO_IE:
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return R_RELAX_TLS_GD_TO_IE_END;
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case R_RELAX_TLS_GD_TO_LE:
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return R_RELAX_TLS_GD_TO_LE_NEG;
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}
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}
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void X86::writeGotPltHeader(uint8_t *Buf) const {
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write32le(Buf, InX::Dynamic->getVA());
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}
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2017-11-04 05:21:47 +08:00
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void X86::writeGotPlt(uint8_t *Buf, const Symbol &S) const {
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2017-06-17 01:32:43 +08:00
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// Entries in .got.plt initially points back to the corresponding
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// PLT entries with a fixed offset to skip the first instruction.
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write32le(Buf, S.getPltVA() + 6);
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}
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2017-11-04 05:21:47 +08:00
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void X86::writeIgotPlt(uint8_t *Buf, const Symbol &S) const {
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2017-06-17 01:32:43 +08:00
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// An x86 entry is the address of the ifunc resolver function.
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write32le(Buf, S.getVA());
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}
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2017-10-12 06:49:24 +08:00
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RelType X86::getDynRel(RelType Type) const {
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2017-06-17 01:32:43 +08:00
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if (Type == R_386_TLS_LE)
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return R_386_TLS_TPOFF;
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if (Type == R_386_TLS_LE_32)
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return R_386_TLS_TPOFF32;
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return Type;
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}
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void X86::writePltHeader(uint8_t *Buf) const {
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if (Config->Pic) {
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const uint8_t V[] = {
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0xff, 0xb3, 0x04, 0x00, 0x00, 0x00, // pushl GOTPLT+4(%ebx)
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0xff, 0xa3, 0x08, 0x00, 0x00, 0x00, // jmp *GOTPLT+8(%ebx)
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0x90, 0x90, 0x90, 0x90 // nop
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};
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memcpy(Buf, V, sizeof(V));
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uint32_t Ebx = InX::Got->getVA() + InX::Got->getSize();
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uint32_t GotPlt = InX::GotPlt->getVA() - Ebx;
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write32le(Buf + 2, GotPlt + 4);
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write32le(Buf + 8, GotPlt + 8);
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return;
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}
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const uint8_t PltData[] = {
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0xff, 0x35, 0x00, 0x00, 0x00, 0x00, // pushl (GOTPLT+4)
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0xff, 0x25, 0x00, 0x00, 0x00, 0x00, // jmp *(GOTPLT+8)
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0x90, 0x90, 0x90, 0x90 // nop
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};
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memcpy(Buf, PltData, sizeof(PltData));
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uint32_t GotPlt = InX::GotPlt->getVA();
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write32le(Buf + 2, GotPlt + 4);
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write32le(Buf + 8, GotPlt + 8);
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}
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void X86::writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr,
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uint64_t PltEntryAddr, int32_t Index,
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unsigned RelOff) const {
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const uint8_t Inst[] = {
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0xff, 0x00, 0x00, 0x00, 0x00, 0x00, // jmp *foo_in_GOT|*foo@GOT(%ebx)
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0x68, 0x00, 0x00, 0x00, 0x00, // pushl $reloc_offset
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0xe9, 0x00, 0x00, 0x00, 0x00 // jmp .PLT0@PC
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};
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memcpy(Buf, Inst, sizeof(Inst));
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if (Config->Pic) {
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// jmp *foo@GOT(%ebx)
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uint32_t Ebx = InX::Got->getVA() + InX::Got->getSize();
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Buf[1] = 0xa3;
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write32le(Buf + 2, GotPltEntryAddr - Ebx);
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} else {
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// jmp *foo_in_GOT
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Buf[1] = 0x25;
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write32le(Buf + 2, GotPltEntryAddr);
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}
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write32le(Buf + 7, RelOff);
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write32le(Buf + 12, -Index * PltEntrySize - PltHeaderSize - 16);
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}
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2017-10-12 06:49:24 +08:00
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int64_t X86::getImplicitAddend(const uint8_t *Buf, RelType Type) const {
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2017-06-17 01:32:43 +08:00
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switch (Type) {
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case R_386_8:
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case R_386_PC8:
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return SignExtend64<8>(*Buf);
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case R_386_16:
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case R_386_PC16:
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return SignExtend64<16>(read16le(Buf));
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case R_386_32:
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case R_386_GOT32:
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case R_386_GOT32X:
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case R_386_GOTOFF:
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case R_386_GOTPC:
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case R_386_PC32:
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case R_386_PLT32:
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case R_386_TLS_LDO_32:
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case R_386_TLS_LE:
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return SignExtend64<32>(read32le(Buf));
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2017-10-12 11:14:06 +08:00
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default:
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return 0;
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2017-06-17 01:32:43 +08:00
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}
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}
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2017-10-12 06:49:24 +08:00
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void X86::relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const {
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2017-06-17 01:32:43 +08:00
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switch (Type) {
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case R_386_8:
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2017-10-25 04:11:07 +08:00
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// R_386_{PC,}{8,16} are not part of the i386 psABI, but they are
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// being used for some 16-bit programs such as boot loaders, so
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// we want to support them.
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2017-06-17 01:32:43 +08:00
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checkUInt<8>(Loc, Val, Type);
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*Loc = Val;
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break;
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case R_386_PC8:
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checkInt<8>(Loc, Val, Type);
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*Loc = Val;
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break;
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case R_386_16:
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checkUInt<16>(Loc, Val, Type);
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write16le(Loc, Val);
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break;
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case R_386_PC16:
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// R_386_PC16 is normally used with 16 bit code. In that situation
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// the PC is 16 bits, just like the addend. This means that it can
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// point from any 16 bit address to any other if the possibility
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// of wrapping is included.
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// The only restriction we have to check then is that the destination
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// address fits in 16 bits. That is impossible to do here. The problem is
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// that we are passed the final value, which already had the
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// current location subtracted from it.
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// We just check that Val fits in 17 bits. This misses some cases, but
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// should have no false positives.
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checkInt<17>(Loc, Val, Type);
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write16le(Loc, Val);
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break;
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2017-10-12 11:14:06 +08:00
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case R_386_32:
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case R_386_GLOB_DAT:
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case R_386_GOT32:
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case R_386_GOT32X:
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case R_386_GOTOFF:
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case R_386_GOTPC:
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case R_386_PC32:
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case R_386_PLT32:
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case R_386_RELATIVE:
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2017-10-14 03:30:00 +08:00
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case R_386_TLS_DTPMOD32:
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case R_386_TLS_DTPOFF32:
|
2017-10-12 11:14:06 +08:00
|
|
|
case R_386_TLS_GD:
|
|
|
|
case R_386_TLS_GOTIE:
|
|
|
|
case R_386_TLS_IE:
|
|
|
|
case R_386_TLS_LDM:
|
|
|
|
case R_386_TLS_LDO_32:
|
|
|
|
case R_386_TLS_LE:
|
|
|
|
case R_386_TLS_LE_32:
|
2017-10-14 03:30:00 +08:00
|
|
|
case R_386_TLS_TPOFF:
|
|
|
|
case R_386_TLS_TPOFF32:
|
2017-06-17 01:32:43 +08:00
|
|
|
checkInt<32>(Loc, Val, Type);
|
|
|
|
write32le(Loc, Val);
|
2017-10-12 11:14:06 +08:00
|
|
|
break;
|
|
|
|
default:
|
|
|
|
error(getErrorLocation(Loc) + "unrecognized reloc " + Twine(Type));
|
2017-06-17 01:32:43 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2017-10-12 06:49:24 +08:00
|
|
|
void X86::relaxTlsGdToLe(uint8_t *Loc, RelType Type, uint64_t Val) const {
|
2017-06-17 01:32:43 +08:00
|
|
|
// Convert
|
|
|
|
// leal x@tlsgd(, %ebx, 1),
|
|
|
|
// call __tls_get_addr@plt
|
|
|
|
// to
|
|
|
|
// movl %gs:0,%eax
|
|
|
|
// subl $x@ntpoff,%eax
|
|
|
|
const uint8_t Inst[] = {
|
|
|
|
0x65, 0xa1, 0x00, 0x00, 0x00, 0x00, // movl %gs:0, %eax
|
|
|
|
0x81, 0xe8, 0x00, 0x00, 0x00, 0x00 // subl 0(%ebx), %eax
|
|
|
|
};
|
|
|
|
memcpy(Loc - 3, Inst, sizeof(Inst));
|
|
|
|
write32le(Loc + 5, Val);
|
|
|
|
}
|
|
|
|
|
2017-10-12 06:49:24 +08:00
|
|
|
void X86::relaxTlsGdToIe(uint8_t *Loc, RelType Type, uint64_t Val) const {
|
2017-06-17 01:32:43 +08:00
|
|
|
// Convert
|
|
|
|
// leal x@tlsgd(, %ebx, 1),
|
|
|
|
// call __tls_get_addr@plt
|
|
|
|
// to
|
|
|
|
// movl %gs:0, %eax
|
|
|
|
// addl x@gotntpoff(%ebx), %eax
|
|
|
|
const uint8_t Inst[] = {
|
|
|
|
0x65, 0xa1, 0x00, 0x00, 0x00, 0x00, // movl %gs:0, %eax
|
|
|
|
0x03, 0x83, 0x00, 0x00, 0x00, 0x00 // addl 0(%ebx), %eax
|
|
|
|
};
|
|
|
|
memcpy(Loc - 3, Inst, sizeof(Inst));
|
|
|
|
write32le(Loc + 5, Val);
|
|
|
|
}
|
|
|
|
|
|
|
|
// In some conditions, relocations can be optimized to avoid using GOT.
|
|
|
|
// This function does that for Initial Exec to Local Exec case.
|
2017-10-12 06:49:24 +08:00
|
|
|
void X86::relaxTlsIeToLe(uint8_t *Loc, RelType Type, uint64_t Val) const {
|
2017-06-17 01:32:43 +08:00
|
|
|
// Ulrich's document section 6.2 says that @gotntpoff can
|
|
|
|
// be used with MOVL or ADDL instructions.
|
|
|
|
// @indntpoff is similar to @gotntpoff, but for use in
|
|
|
|
// position dependent code.
|
|
|
|
uint8_t Reg = (Loc[-1] >> 3) & 7;
|
|
|
|
|
|
|
|
if (Type == R_386_TLS_IE) {
|
|
|
|
if (Loc[-1] == 0xa1) {
|
|
|
|
// "movl foo@indntpoff,%eax" -> "movl $foo,%eax"
|
|
|
|
// This case is different from the generic case below because
|
|
|
|
// this is a 5 byte instruction while below is 6 bytes.
|
|
|
|
Loc[-1] = 0xb8;
|
|
|
|
} else if (Loc[-2] == 0x8b) {
|
|
|
|
// "movl foo@indntpoff,%reg" -> "movl $foo,%reg"
|
|
|
|
Loc[-2] = 0xc7;
|
|
|
|
Loc[-1] = 0xc0 | Reg;
|
|
|
|
} else {
|
|
|
|
// "addl foo@indntpoff,%reg" -> "addl $foo,%reg"
|
|
|
|
Loc[-2] = 0x81;
|
|
|
|
Loc[-1] = 0xc0 | Reg;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
assert(Type == R_386_TLS_GOTIE);
|
|
|
|
if (Loc[-2] == 0x8b) {
|
|
|
|
// "movl foo@gottpoff(%rip),%reg" -> "movl $foo,%reg"
|
|
|
|
Loc[-2] = 0xc7;
|
|
|
|
Loc[-1] = 0xc0 | Reg;
|
|
|
|
} else {
|
|
|
|
// "addl foo@gotntpoff(%rip),%reg" -> "leal foo(%reg),%reg"
|
|
|
|
Loc[-2] = 0x8d;
|
|
|
|
Loc[-1] = 0x80 | (Reg << 3) | Reg;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
write32le(Loc, Val);
|
|
|
|
}
|
|
|
|
|
2017-10-12 06:49:24 +08:00
|
|
|
void X86::relaxTlsLdToLe(uint8_t *Loc, RelType Type, uint64_t Val) const {
|
2017-06-17 01:32:43 +08:00
|
|
|
if (Type == R_386_TLS_LDO_32) {
|
|
|
|
write32le(Loc, Val);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
// Convert
|
|
|
|
// leal foo(%reg),%eax
|
|
|
|
// call ___tls_get_addr
|
|
|
|
// to
|
|
|
|
// movl %gs:0,%eax
|
|
|
|
// nop
|
|
|
|
// leal 0(%esi,1),%esi
|
|
|
|
const uint8_t Inst[] = {
|
|
|
|
0x65, 0xa1, 0x00, 0x00, 0x00, 0x00, // movl %gs:0,%eax
|
|
|
|
0x90, // nop
|
|
|
|
0x8d, 0x74, 0x26, 0x00 // leal 0(%esi,1),%esi
|
|
|
|
};
|
|
|
|
memcpy(Loc - 2, Inst, sizeof(Inst));
|
|
|
|
}
|
|
|
|
|
2017-06-17 04:15:03 +08:00
|
|
|
TargetInfo *elf::getX86TargetInfo() {
|
|
|
|
static X86 Target;
|
|
|
|
return &Target;
|
|
|
|
}
|