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llvm-project/llvm/test/MC/ARM/arm-ldrd.s

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ARM: fixup more tests to specify the target more explicitly This changes the tests that were targeting ARM EABI to explicitly specify the environment rather than relying on the default. This breaks with the new Windows on ARM support when running the tests on Windows where the default environment is no longer EABI. Take the opportunity to avoid a pointless redirect (helps when trying to debug with providing a command line invocation which can be copy and pasted) and removing a few greps in favour of FileCheck. llvm-svn: 205541
2014-04-04 00:01:44 +08:00
// RUN: not llvm-mc -triple arm-eabi -mattr=+v5te %s -o /dev/null 2>&1 | FileCheck %s
[ARM] Use FileCheck instead of grep for ARM LDRD negative tests. llvm-svn: 191683
2013-10-01 01:31:26 +08:00
//
ARM: Teach assembler to enforce constraints for ARM LDRD destination register operands. As specified in A8.8.72/A8.8.73/A8.8.74 in the ARM ARM, all variants of the ARM LDRD instruction have the following two constraints: LDRD<c> <Rt>, <Rt2>, ... (a) Rt must be even-numbered and not r14 (b) Rt2 must be R(t+1) If those two constraints are not met the result of executing the instruction will be unpredictable. Constraint (b) was already enforced, this commit adds support for constraint (a). Fixes rdar://14479793. llvm-svn: 191520
2013-09-27 21:28:17 +08:00
// rdar://14479793
ldrd r1, r2, [pc, #0]
ldrd r1, r2, [r3, #4]
ldrd r1, r2, [r3], #4
ldrd r1, r2, [r3, #4]!
ldrd r1, r2, [r3, -r4]!
ldrd r1, r2, [r3, r4]
ldrd r1, r2, [r3], r4
[ARM] Use FileCheck instead of grep for ARM LDRD negative tests. llvm-svn: 191683
2013-10-01 01:31:26 +08:00
// CHECK: error: Rt must be even-numbered
// CHECK: error: Rt must be even-numbered
// CHECK: error: Rt must be even-numbered
// CHECK: error: Rt must be even-numbered
// CHECK: error: Rt must be even-numbered
// CHECK: error: Rt must be even-numbered
// CHECK: error: Rt must be even-numbered
ldrd r0, r3, [pc, #0]
ldrd r0, r3, [r4, #4]
ldrd r0, r3, [r4], #4
ldrd r0, r3, [r4, #4]!
ldrd r0, r3, [r4, -r5]!
ldrd r0, r3, [r4, r5]
[ARM] Assembler: Add more negative tests for ARM LDRD. llvm-svn: 191664
2013-09-30 21:04:22 +08:00
ldrd r0, r3, [r4], r5
[ARM] Use FileCheck instead of grep for ARM LDRD negative tests. llvm-svn: 191683
2013-10-01 01:31:26 +08:00
// CHECK: error: destination operands must be sequential
// CHECK: error: destination operands must be sequential
// CHECK: error: destination operands must be sequential
// CHECK: error: destination operands must be sequential
// CHECK: error: destination operands must be sequential
// CHECK: error: destination operands must be sequential
// CHECK: error: destination operands must be sequential
ldrd lr, pc, [pc, #0]
ldrd lr, pc, [r3, #4]
ldrd lr, pc, [r3], #4
ldrd lr, pc, [r3, #4]!
ldrd lr, pc, [r3, -r4]!
ldrd lr, pc, [r3, r4]
ldrd lr, pc, [r3], r4
// CHECK: error: Rt can't be R14
// CHECK: error: Rt can't be R14
// CHECK: error: Rt can't be R14
// CHECK: error: Rt can't be R14
// CHECK: error: Rt can't be R14
// CHECK: error: Rt can't be R14
// CHECK: error: Rt can't be R14
[ARM] Assembler: ARM LDRD with writeback requires the base register to be different from the destination registers. See ARM ARM A8.8.72. Violating this constraint results in unpredictable behavior. llvm-svn: 191678
2013-10-01 00:11:48 +08:00
ldrd r0, r1, [r0], #4
ldrd r0, r1, [r1], #4
ldrd r0, r1, [r0, #4]!
ldrd r0, r1, [r1, #4]!
[ARM] Use FileCheck instead of grep for ARM LDRD negative tests. llvm-svn: 191683
2013-10-01 01:31:26 +08:00
// CHECK: error: base register needs to be different from destination registers
// CHECK: error: base register needs to be different from destination registers
// CHECK: error: base register needs to be different from destination registers
// CHECK: error: base register needs to be different from destination registers