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llvm-project/llvm/test/CodeGen/X86/atomic-pointer.ll

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Fix PR15355 - Clear 'mayStore' flag when loading from the atomic variable before the spin loop - Clear kill flag from one use to multiple use in registers forming the address to that atomic variable - don't use a physical register as live-in register in BB (neither entry nor landing pad.) by copying it into virtual register (patch by Cameron Zwarich) llvm-svn: 176538
2013-03-06 08:17:04 +08:00
; RUN: llc < %s -mtriple=i686-none-linux -verify-machineinstrs | FileCheck %s
Make atomic load and store of pointers work. Tighten verification of atomic operations so other unexpected operations don't slip through. Based on patch by Logan Chien. PR11786/PR13186. llvm-svn: 162146
2012-08-18 07:24:29 +08:00
define i32* @test_atomic_ptr_load(i32** %a0) {
; CHECK: test_atomic_ptr_load
; CHECK: movl
; CHECK: movl
; CHECK: ret
0:
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%0 = load atomic i32*, i32** %a0 seq_cst, align 4
Make atomic load and store of pointers work. Tighten verification of atomic operations so other unexpected operations don't slip through. Based on patch by Logan Chien. PR11786/PR13186. llvm-svn: 162146
2012-08-18 07:24:29 +08:00
ret i32* %0
}
define void @test_atomic_ptr_store(i32* %a0, i32** %a1) {
; CHECK: test_atomic_ptr_store
; CHECK: movl
; CHECK: movl
; CHECK: xchgl
; CHECK: ret
0:
store atomic i32* %a0, i32** %a1 seq_cst, align 4
ret void
}