forked from OSchip/llvm-project
89 lines
4.0 KiB
LLVM
89 lines
4.0 KiB
LLVM
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; RUN: llc -march=hexagon -mcpu=hexagonv5 < %s
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; REQUIRES: asserts
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define void @test(i8* noalias nocapture readonly %src, i32 %srcStride) local_unnamed_addr #0 {
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entry:
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%add.ptr = getelementptr inbounds i8, i8* %src, i32 %srcStride
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%add.ptr2 = getelementptr inbounds i8, i8* %add.ptr, i32 %srcStride
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%add.ptr3 = getelementptr inbounds i8, i8* %add.ptr2, i32 %srcStride
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br label %for.body9.epil
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for.body9.epil:
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%inc.sink385.epil = phi i32 [ %add17.epil, %for.body9.epil ], [ 2, %entry ]
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%sr.epil = phi i8 [ %0, %for.body9.epil ], [ undef, %entry ]
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%sr431.epil = phi i8 [ %2, %for.body9.epil ], [ 0, %entry ]
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%sr432.epil = phi i8 [ %sr431.epil, %for.body9.epil ], [ 0, %entry ]
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%epil.iter = phi i32 [ %epil.iter.sub, %for.body9.epil ], [ undef, %entry ]
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%sub11.epil = add i32 %inc.sink385.epil, -1
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%add17.epil = add nuw i32 %inc.sink385.epil, 1
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%conv19.epil = zext i8 %sr.epil to i32
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%add21.epil = add i32 %inc.sink385.epil, 2
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%arrayidx22.epil = getelementptr inbounds i8, i8* %src, i32 %add21.epil
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%0 = load i8, i8* %arrayidx22.epil, align 1
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%conv23.epil = zext i8 %0 to i32
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%1 = load i8, i8* undef, align 1
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%conv42.epil = zext i8 %1 to i32
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%conv53.epil = zext i8 %sr432.epil to i32
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%2 = load i8, i8* undef, align 1
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%conv61.epil = zext i8 %2 to i32
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%3 = load i8, i8* undef, align 1
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%conv65.epil = zext i8 %3 to i32
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%4 = load i8, i8* null, align 1
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%conv69.epil = zext i8 %4 to i32
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%5 = load i8, i8* undef, align 1
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%conv72.epil = zext i8 %5 to i32
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%6 = load i8, i8* undef, align 1
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%conv76.epil = zext i8 %6 to i32
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%7 = load i8, i8* undef, align 1
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%conv80.epil = zext i8 %7 to i32
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%8 = load i8, i8* undef, align 1
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%conv84.epil = zext i8 %8 to i32
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%9 = load i8, i8* undef, align 1
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%conv88.epil = zext i8 %9 to i32
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%10 = load i8, i8* undef, align 1
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%conv91.epil = zext i8 %10 to i32
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%11 = load i8, i8* undef, align 1
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%conv95.epil = zext i8 %11 to i32
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%12 = load i8, i8* undef, align 1
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%conv99.epil = zext i8 %12 to i32
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%add.epil = add nuw nsw i32 0, %conv19.epil
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%add16.epil = add nuw nsw i32 %add.epil, 0
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%add20.epil = add nuw nsw i32 %add16.epil, 0
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%add24.epil = add nuw nsw i32 %add20.epil, 0
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%add28.epil = add nuw nsw i32 %add24.epil, 0
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%add32.epil = add nuw nsw i32 %add28.epil, 0
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%add35.epil = add i32 %add32.epil, 0
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%add39.epil = add i32 %add35.epil, 0
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%add43.epil = add i32 %add39.epil, %conv53.epil
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%add47.epil = add i32 %add43.epil, 0
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%add51.epil = add i32 %add47.epil, 0
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%add54.epil = add i32 %add51.epil, %conv23.epil
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%add58.epil = add i32 %add54.epil, %conv42.epil
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%add62.epil = add i32 %add58.epil, %conv61.epil
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%add66.epil = add i32 %add62.epil, %conv65.epil
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%add70.epil = add i32 %add66.epil, %conv69.epil
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%add73.epil = add i32 %add70.epil, %conv72.epil
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%add77.epil = add i32 %add73.epil, %conv76.epil
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%add81.epil = add i32 %add77.epil, %conv80.epil
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%add85.epil = add i32 %add81.epil, %conv84.epil
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%add89.epil = add i32 %add85.epil, %conv88.epil
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%add92.epil = add i32 %add89.epil, %conv91.epil
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%add96.epil = add i32 %add92.epil, %conv95.epil
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%add100.epil = add i32 %add96.epil, %conv99.epil
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%mul.epil = mul nsw i32 %add100.epil, 2621
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%add101.epil = add nsw i32 %mul.epil, 32768
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%shr369.epil = lshr i32 %add101.epil, 16
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%conv102.epil = trunc i32 %shr369.epil to i8
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%arrayidx103.epil = getelementptr inbounds i8, i8* undef, i32 %inc.sink385.epil
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store i8 %conv102.epil, i8* %arrayidx103.epil, align 1
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%epil.iter.sub = add i32 %epil.iter, -1
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%epil.iter.cmp = icmp eq i32 %epil.iter.sub, 0
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br i1 %epil.iter.cmp, label %for.end, label %for.body9.epil
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for.end:
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unreachable
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}
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attributes #0 = { norecurse nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="hexagonv5" "unsafe-fp-math"="false" "use-soft-float"="false" }
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