2019-07-17 02:05:29 +08:00
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -march=amdgcn -mcpu=hawaii -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX7 %s
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# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX8 %s
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# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX9 %s
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# RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX10 %s
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---
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name: load_flat_s32_from_4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; GFX7-LABEL: name: load_flat_s32_from_4
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; GFX7: liveins: $vgpr0_vgpr1
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; GFX7: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; GFX7: [[FLAT_LOAD_DWORD:%[0-9]+]]:vgpr_32 = FLAT_LOAD_DWORD [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 4)
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; GFX7: $vgpr0 = COPY [[FLAT_LOAD_DWORD]]
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; GFX8-LABEL: name: load_flat_s32_from_4
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; GFX8: liveins: $vgpr0_vgpr1
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; GFX8: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; GFX8: [[FLAT_LOAD_DWORD:%[0-9]+]]:vgpr_32 = FLAT_LOAD_DWORD [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 4)
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; GFX8: $vgpr0 = COPY [[FLAT_LOAD_DWORD]]
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; GFX9-LABEL: name: load_flat_s32_from_4
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; GFX9: liveins: $vgpr0_vgpr1
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; GFX9: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; GFX9: [[FLAT_LOAD_DWORD:%[0-9]+]]:vgpr_32 = FLAT_LOAD_DWORD [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 4)
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; GFX9: $vgpr0 = COPY [[FLAT_LOAD_DWORD]]
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; GFX10-LABEL: name: load_flat_s32_from_4
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; GFX10: liveins: $vgpr0_vgpr1
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; GFX10: $vcc_hi = IMPLICIT_DEF
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; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; GFX10: [[FLAT_LOAD_DWORD:%[0-9]+]]:vgpr_32 = FLAT_LOAD_DWORD [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 4)
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; GFX10: $vgpr0 = COPY [[FLAT_LOAD_DWORD]]
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%0:vgpr(p1) = COPY $vgpr0_vgpr1
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%1:vgpr(s32) = G_LOAD %0 :: (load 4, align 4, addrspace 0)
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$vgpr0 = COPY %1
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...
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---
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name: load_flat_s32_from_2
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; GFX7-LABEL: name: load_flat_s32_from_2
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; GFX7: liveins: $vgpr0_vgpr1
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; GFX7: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; GFX7: [[FLAT_LOAD_USHORT:%[0-9]+]]:vgpr_32 = FLAT_LOAD_USHORT [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 2)
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; GFX7: $vgpr0 = COPY [[FLAT_LOAD_USHORT]]
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; GFX8-LABEL: name: load_flat_s32_from_2
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; GFX8: liveins: $vgpr0_vgpr1
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; GFX8: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; GFX8: [[FLAT_LOAD_USHORT:%[0-9]+]]:vgpr_32 = FLAT_LOAD_USHORT [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 2)
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; GFX8: $vgpr0 = COPY [[FLAT_LOAD_USHORT]]
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; GFX9-LABEL: name: load_flat_s32_from_2
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; GFX9: liveins: $vgpr0_vgpr1
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; GFX9: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; GFX9: [[FLAT_LOAD_USHORT:%[0-9]+]]:vgpr_32 = FLAT_LOAD_USHORT [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 2)
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; GFX9: $vgpr0 = COPY [[FLAT_LOAD_USHORT]]
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; GFX10-LABEL: name: load_flat_s32_from_2
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; GFX10: liveins: $vgpr0_vgpr1
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; GFX10: $vcc_hi = IMPLICIT_DEF
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; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; GFX10: [[FLAT_LOAD_USHORT:%[0-9]+]]:vgpr_32 = FLAT_LOAD_USHORT [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 2)
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; GFX10: $vgpr0 = COPY [[FLAT_LOAD_USHORT]]
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%0:vgpr(p1) = COPY $vgpr0_vgpr1
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%1:vgpr(s32) = G_LOAD %0 :: (load 2, align 2, addrspace 0)
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$vgpr0 = COPY %1
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...
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---
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name: load_flat_s32_from_1
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; GFX7-LABEL: name: load_flat_s32_from_1
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; GFX7: liveins: $vgpr0_vgpr1
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; GFX7: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; GFX7: [[FLAT_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = FLAT_LOAD_UBYTE [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 1)
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; GFX7: $vgpr0 = COPY [[FLAT_LOAD_UBYTE]]
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; GFX8-LABEL: name: load_flat_s32_from_1
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; GFX8: liveins: $vgpr0_vgpr1
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; GFX8: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; GFX8: [[FLAT_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = FLAT_LOAD_UBYTE [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 1)
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; GFX8: $vgpr0 = COPY [[FLAT_LOAD_UBYTE]]
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; GFX9-LABEL: name: load_flat_s32_from_1
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; GFX9: liveins: $vgpr0_vgpr1
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; GFX9: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; GFX9: [[FLAT_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = FLAT_LOAD_UBYTE [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 1)
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; GFX9: $vgpr0 = COPY [[FLAT_LOAD_UBYTE]]
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; GFX10-LABEL: name: load_flat_s32_from_1
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; GFX10: liveins: $vgpr0_vgpr1
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; GFX10: $vcc_hi = IMPLICIT_DEF
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; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; GFX10: [[FLAT_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = FLAT_LOAD_UBYTE [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 1)
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; GFX10: $vgpr0 = COPY [[FLAT_LOAD_UBYTE]]
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%0:vgpr(p1) = COPY $vgpr0_vgpr1
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%1:vgpr(s32) = G_LOAD %0 :: (load 1, align 1, addrspace 0)
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$vgpr0 = COPY %1
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...
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---
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name: load_flat_v2s32
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; GFX7-LABEL: name: load_flat_v2s32
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; GFX7: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; GFX7: [[FLAT_LOAD_DWORDX2_:%[0-9]+]]:vreg_64 = FLAT_LOAD_DWORDX2 [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 8)
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; GFX7: $vgpr0_vgpr1 = COPY [[FLAT_LOAD_DWORDX2_]]
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; GFX8-LABEL: name: load_flat_v2s32
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; GFX8: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; GFX8: [[FLAT_LOAD_DWORDX2_:%[0-9]+]]:vreg_64 = FLAT_LOAD_DWORDX2 [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 8)
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; GFX8: $vgpr0_vgpr1 = COPY [[FLAT_LOAD_DWORDX2_]]
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; GFX9-LABEL: name: load_flat_v2s32
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; GFX9: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; GFX9: [[FLAT_LOAD_DWORDX2_:%[0-9]+]]:vreg_64 = FLAT_LOAD_DWORDX2 [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 8)
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; GFX9: $vgpr0_vgpr1 = COPY [[FLAT_LOAD_DWORDX2_]]
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; GFX10-LABEL: name: load_flat_v2s32
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; GFX10: $vcc_hi = IMPLICIT_DEF
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; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; GFX10: [[FLAT_LOAD_DWORDX2_:%[0-9]+]]:vreg_64 = FLAT_LOAD_DWORDX2 [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 8)
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; GFX10: $vgpr0_vgpr1 = COPY [[FLAT_LOAD_DWORDX2_]]
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%0:vgpr(p1) = COPY $vgpr0_vgpr1
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%1:vgpr(<2 x s32>) = G_LOAD %0 :: (load 8, align 8, addrspace 0)
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$vgpr0_vgpr1 = COPY %1
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...
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---
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name: load_flat_v3s32
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; GFX7-LABEL: name: load_flat_v3s32
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; GFX7: liveins: $vgpr0_vgpr1
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; GFX7: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; GFX7: [[FLAT_LOAD_DWORDX3_:%[0-9]+]]:vreg_96 = FLAT_LOAD_DWORDX3 [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 12, align 4)
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; GFX7: $vgpr0_vgpr1_vgpr2 = COPY [[FLAT_LOAD_DWORDX3_]]
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; GFX8-LABEL: name: load_flat_v3s32
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; GFX8: liveins: $vgpr0_vgpr1
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; GFX8: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; GFX8: [[FLAT_LOAD_DWORDX3_:%[0-9]+]]:vreg_96 = FLAT_LOAD_DWORDX3 [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 12, align 4)
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; GFX8: $vgpr0_vgpr1_vgpr2 = COPY [[FLAT_LOAD_DWORDX3_]]
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; GFX9-LABEL: name: load_flat_v3s32
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; GFX9: liveins: $vgpr0_vgpr1
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; GFX9: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; GFX9: [[FLAT_LOAD_DWORDX3_:%[0-9]+]]:vreg_96 = FLAT_LOAD_DWORDX3 [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 12, align 4)
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; GFX9: $vgpr0_vgpr1_vgpr2 = COPY [[FLAT_LOAD_DWORDX3_]]
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; GFX10-LABEL: name: load_flat_v3s32
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; GFX10: liveins: $vgpr0_vgpr1
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; GFX10: $vcc_hi = IMPLICIT_DEF
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; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; GFX10: [[FLAT_LOAD_DWORDX3_:%[0-9]+]]:vreg_96 = FLAT_LOAD_DWORDX3 [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 12, align 4)
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; GFX10: $vgpr0_vgpr1_vgpr2 = COPY [[FLAT_LOAD_DWORDX3_]]
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%0:vgpr(p1) = COPY $vgpr0_vgpr1
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%1:vgpr(<3 x s32>) = G_LOAD %0 :: (load 12, align 4, addrspace 0)
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$vgpr0_vgpr1_vgpr2 = COPY %1
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...
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---
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name: load_flat_v4s32
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; GFX7-LABEL: name: load_flat_v4s32
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; GFX7: liveins: $vgpr0_vgpr1
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; GFX7: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; GFX7: [[FLAT_LOAD_DWORDX4_:%[0-9]+]]:vreg_128 = FLAT_LOAD_DWORDX4 [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 16, align 4)
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; GFX7: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[FLAT_LOAD_DWORDX4_]]
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; GFX8-LABEL: name: load_flat_v4s32
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; GFX8: liveins: $vgpr0_vgpr1
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; GFX8: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; GFX8: [[FLAT_LOAD_DWORDX4_:%[0-9]+]]:vreg_128 = FLAT_LOAD_DWORDX4 [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 16, align 4)
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; GFX8: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[FLAT_LOAD_DWORDX4_]]
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; GFX9-LABEL: name: load_flat_v4s32
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; GFX9: liveins: $vgpr0_vgpr1
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; GFX9: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; GFX9: [[FLAT_LOAD_DWORDX4_:%[0-9]+]]:vreg_128 = FLAT_LOAD_DWORDX4 [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 16, align 4)
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; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[FLAT_LOAD_DWORDX4_]]
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; GFX10-LABEL: name: load_flat_v4s32
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; GFX10: liveins: $vgpr0_vgpr1
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; GFX10: $vcc_hi = IMPLICIT_DEF
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; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; GFX10: [[FLAT_LOAD_DWORDX4_:%[0-9]+]]:vreg_128 = FLAT_LOAD_DWORDX4 [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 16, align 4)
|
|
|
|
|
; GFX10: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[FLAT_LOAD_DWORDX4_]]
|
|
|
|
|
%0:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
%1:vgpr(<4 x s32>) = G_LOAD %0 :: (load 16, align 4, addrspace 0)
|
|
|
|
|
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1
|
|
|
|
|
|
|
|
|
|
...
|
|
|
|
|
|
|
|
|
|
---
|
|
|
|
|
|
|
|
|
|
name: load_flat_s64
|
|
|
|
|
legalized: true
|
|
|
|
|
regBankSelected: true
|
|
|
|
|
tracksRegLiveness: true
|
|
|
|
|
|
|
|
|
|
body: |
|
|
|
|
|
bb.0:
|
|
|
|
|
liveins: $vgpr0_vgpr1
|
|
|
|
|
|
|
|
|
|
; GFX7-LABEL: name: load_flat_s64
|
|
|
|
|
; GFX7: liveins: $vgpr0_vgpr1
|
2019-08-01 11:52:40 +08:00
|
|
|
; GFX7: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX7: [[FLAT_LOAD_DWORDX2_:%[0-9]+]]:vreg_64 = FLAT_LOAD_DWORDX2 [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 8)
|
|
|
|
|
; GFX7: $vgpr0_vgpr1 = COPY [[FLAT_LOAD_DWORDX2_]]
|
2019-07-17 02:05:29 +08:00
|
|
|
; GFX8-LABEL: name: load_flat_s64
|
|
|
|
|
; GFX8: liveins: $vgpr0_vgpr1
|
2019-08-01 11:52:40 +08:00
|
|
|
; GFX8: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX8: [[FLAT_LOAD_DWORDX2_:%[0-9]+]]:vreg_64 = FLAT_LOAD_DWORDX2 [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 8)
|
|
|
|
|
; GFX8: $vgpr0_vgpr1 = COPY [[FLAT_LOAD_DWORDX2_]]
|
2019-07-17 02:05:29 +08:00
|
|
|
; GFX9-LABEL: name: load_flat_s64
|
|
|
|
|
; GFX9: liveins: $vgpr0_vgpr1
|
2019-08-01 11:52:40 +08:00
|
|
|
; GFX9: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX9: [[FLAT_LOAD_DWORDX2_:%[0-9]+]]:vreg_64 = FLAT_LOAD_DWORDX2 [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 8)
|
|
|
|
|
; GFX9: $vgpr0_vgpr1 = COPY [[FLAT_LOAD_DWORDX2_]]
|
2019-07-17 02:05:29 +08:00
|
|
|
; GFX10-LABEL: name: load_flat_s64
|
|
|
|
|
; GFX10: liveins: $vgpr0_vgpr1
|
2019-08-01 11:52:40 +08:00
|
|
|
; GFX10: $vcc_hi = IMPLICIT_DEF
|
|
|
|
|
; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX10: [[FLAT_LOAD_DWORDX2_:%[0-9]+]]:vreg_64 = FLAT_LOAD_DWORDX2 [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 8)
|
|
|
|
|
; GFX10: $vgpr0_vgpr1 = COPY [[FLAT_LOAD_DWORDX2_]]
|
2019-07-17 02:05:29 +08:00
|
|
|
%0:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
%1:vgpr(s64) = G_LOAD %0 :: (load 8, align 8, addrspace 0)
|
|
|
|
|
$vgpr0_vgpr1 = COPY %1
|
|
|
|
|
|
|
|
|
|
...
|
|
|
|
|
|
|
|
|
|
---
|
|
|
|
|
|
|
|
|
|
name: load_flat_v2s64
|
|
|
|
|
legalized: true
|
|
|
|
|
regBankSelected: true
|
|
|
|
|
tracksRegLiveness: true
|
|
|
|
|
|
|
|
|
|
body: |
|
|
|
|
|
bb.0:
|
|
|
|
|
liveins: $vgpr0_vgpr1
|
|
|
|
|
|
|
|
|
|
; GFX7-LABEL: name: load_flat_v2s64
|
|
|
|
|
; GFX7: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX7: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX7: [[LOAD:%[0-9]+]]:vreg_128(<2 x s64>) = G_LOAD [[COPY]](p1) :: (load 16, align 4)
|
|
|
|
|
; GFX7: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](<2 x s64>)
|
|
|
|
|
; GFX8-LABEL: name: load_flat_v2s64
|
|
|
|
|
; GFX8: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX8: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX8: [[LOAD:%[0-9]+]]:vreg_128(<2 x s64>) = G_LOAD [[COPY]](p1) :: (load 16, align 4)
|
|
|
|
|
; GFX8: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](<2 x s64>)
|
|
|
|
|
; GFX9-LABEL: name: load_flat_v2s64
|
|
|
|
|
; GFX9: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX9: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX9: [[LOAD:%[0-9]+]]:vreg_128(<2 x s64>) = G_LOAD [[COPY]](p1) :: (load 16, align 4)
|
|
|
|
|
; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](<2 x s64>)
|
|
|
|
|
; GFX10-LABEL: name: load_flat_v2s64
|
|
|
|
|
; GFX10: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX10: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX10: [[LOAD:%[0-9]+]]:vreg_128(<2 x s64>) = G_LOAD [[COPY]](p1) :: (load 16, align 4)
|
|
|
|
|
; GFX10: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](<2 x s64>)
|
|
|
|
|
%0:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
%1:vgpr(<2 x s64>) = G_LOAD %0 :: (load 16, align 4, addrspace 0)
|
|
|
|
|
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1
|
|
|
|
|
|
|
|
|
|
...
|
|
|
|
|
|
|
|
|
|
---
|
|
|
|
|
|
|
|
|
|
name: load_flat_v2p1
|
|
|
|
|
legalized: true
|
|
|
|
|
regBankSelected: true
|
|
|
|
|
tracksRegLiveness: true
|
|
|
|
|
|
|
|
|
|
body: |
|
|
|
|
|
bb.0:
|
|
|
|
|
liveins: $vgpr0_vgpr1
|
|
|
|
|
|
|
|
|
|
; GFX7-LABEL: name: load_flat_v2p1
|
|
|
|
|
; GFX7: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX7: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX7: [[LOAD:%[0-9]+]]:vreg_128(<2 x p1>) = G_LOAD [[COPY]](p1) :: (load 16, align 4)
|
|
|
|
|
; GFX7: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](<2 x p1>)
|
|
|
|
|
; GFX8-LABEL: name: load_flat_v2p1
|
|
|
|
|
; GFX8: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX8: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX8: [[LOAD:%[0-9]+]]:vreg_128(<2 x p1>) = G_LOAD [[COPY]](p1) :: (load 16, align 4)
|
|
|
|
|
; GFX8: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](<2 x p1>)
|
|
|
|
|
; GFX9-LABEL: name: load_flat_v2p1
|
|
|
|
|
; GFX9: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX9: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX9: [[LOAD:%[0-9]+]]:vreg_128(<2 x p1>) = G_LOAD [[COPY]](p1) :: (load 16, align 4)
|
|
|
|
|
; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](<2 x p1>)
|
|
|
|
|
; GFX10-LABEL: name: load_flat_v2p1
|
|
|
|
|
; GFX10: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX10: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX10: [[LOAD:%[0-9]+]]:vreg_128(<2 x p1>) = G_LOAD [[COPY]](p1) :: (load 16, align 4)
|
|
|
|
|
; GFX10: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](<2 x p1>)
|
|
|
|
|
%0:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
%1:vgpr(<2 x p1>) = G_LOAD %0 :: (load 16, align 4, addrspace 0)
|
|
|
|
|
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1
|
|
|
|
|
|
|
|
|
|
...
|
|
|
|
|
|
|
|
|
|
---
|
|
|
|
|
|
|
|
|
|
name: load_flat_s96
|
|
|
|
|
legalized: true
|
|
|
|
|
regBankSelected: true
|
|
|
|
|
tracksRegLiveness: true
|
|
|
|
|
|
|
|
|
|
body: |
|
|
|
|
|
bb.0:
|
|
|
|
|
liveins: $vgpr0_vgpr1
|
|
|
|
|
|
|
|
|
|
; GFX7-LABEL: name: load_flat_s96
|
|
|
|
|
; GFX7: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX7: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX7: [[LOAD:%[0-9]+]]:vreg_96(s96) = G_LOAD [[COPY]](p1) :: (load 12, align 4)
|
|
|
|
|
; GFX7: $vgpr0_vgpr1_vgpr2 = COPY [[LOAD]](s96)
|
|
|
|
|
; GFX8-LABEL: name: load_flat_s96
|
|
|
|
|
; GFX8: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX8: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX8: [[LOAD:%[0-9]+]]:vreg_96(s96) = G_LOAD [[COPY]](p1) :: (load 12, align 4)
|
|
|
|
|
; GFX8: $vgpr0_vgpr1_vgpr2 = COPY [[LOAD]](s96)
|
|
|
|
|
; GFX9-LABEL: name: load_flat_s96
|
|
|
|
|
; GFX9: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX9: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX9: [[LOAD:%[0-9]+]]:vreg_96(s96) = G_LOAD [[COPY]](p1) :: (load 12, align 4)
|
|
|
|
|
; GFX9: $vgpr0_vgpr1_vgpr2 = COPY [[LOAD]](s96)
|
|
|
|
|
; GFX10-LABEL: name: load_flat_s96
|
|
|
|
|
; GFX10: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX10: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX10: [[LOAD:%[0-9]+]]:vreg_96(s96) = G_LOAD [[COPY]](p1) :: (load 12, align 4)
|
|
|
|
|
; GFX10: $vgpr0_vgpr1_vgpr2 = COPY [[LOAD]](s96)
|
|
|
|
|
%0:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
%1:vgpr(s96) = G_LOAD %0 :: (load 12, align 4, addrspace 0)
|
|
|
|
|
$vgpr0_vgpr1_vgpr2 = COPY %1
|
|
|
|
|
|
|
|
|
|
...
|
|
|
|
|
|
|
|
|
|
---
|
|
|
|
|
|
|
|
|
|
name: load_flat_s128
|
|
|
|
|
legalized: true
|
|
|
|
|
regBankSelected: true
|
|
|
|
|
tracksRegLiveness: true
|
|
|
|
|
|
|
|
|
|
body: |
|
|
|
|
|
bb.0:
|
|
|
|
|
liveins: $vgpr0_vgpr1
|
|
|
|
|
|
|
|
|
|
; GFX7-LABEL: name: load_flat_s128
|
|
|
|
|
; GFX7: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX7: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX7: [[LOAD:%[0-9]+]]:vreg_128(s128) = G_LOAD [[COPY]](p1) :: (load 16, align 4)
|
|
|
|
|
; GFX7: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](s128)
|
|
|
|
|
; GFX8-LABEL: name: load_flat_s128
|
|
|
|
|
; GFX8: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX8: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX8: [[LOAD:%[0-9]+]]:vreg_128(s128) = G_LOAD [[COPY]](p1) :: (load 16, align 4)
|
|
|
|
|
; GFX8: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](s128)
|
|
|
|
|
; GFX9-LABEL: name: load_flat_s128
|
|
|
|
|
; GFX9: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX9: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX9: [[LOAD:%[0-9]+]]:vreg_128(s128) = G_LOAD [[COPY]](p1) :: (load 16, align 4)
|
|
|
|
|
; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](s128)
|
|
|
|
|
; GFX10-LABEL: name: load_flat_s128
|
|
|
|
|
; GFX10: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX10: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX10: [[LOAD:%[0-9]+]]:vreg_128(s128) = G_LOAD [[COPY]](p1) :: (load 16, align 4)
|
|
|
|
|
; GFX10: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](s128)
|
|
|
|
|
%0:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
%1:vgpr(s128) = G_LOAD %0 :: (load 16, align 4, addrspace 0)
|
|
|
|
|
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1
|
|
|
|
|
|
|
|
|
|
...
|
|
|
|
|
|
|
|
|
|
---
|
|
|
|
|
|
|
|
|
|
name: load_flat_p3_from_4
|
|
|
|
|
legalized: true
|
|
|
|
|
regBankSelected: true
|
|
|
|
|
tracksRegLiveness: true
|
|
|
|
|
|
|
|
|
|
body: |
|
|
|
|
|
bb.0:
|
|
|
|
|
liveins: $vgpr0_vgpr1
|
|
|
|
|
|
|
|
|
|
; GFX7-LABEL: name: load_flat_p3_from_4
|
|
|
|
|
; GFX7: liveins: $vgpr0_vgpr1
|
2019-08-01 11:57:42 +08:00
|
|
|
; GFX7: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX7: [[FLAT_LOAD_DWORD:%[0-9]+]]:vgpr_32 = FLAT_LOAD_DWORD [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 4)
|
|
|
|
|
; GFX7: $vgpr0 = COPY [[FLAT_LOAD_DWORD]]
|
2019-07-17 02:05:29 +08:00
|
|
|
; GFX8-LABEL: name: load_flat_p3_from_4
|
|
|
|
|
; GFX8: liveins: $vgpr0_vgpr1
|
2019-08-01 11:57:42 +08:00
|
|
|
; GFX8: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX8: [[FLAT_LOAD_DWORD:%[0-9]+]]:vgpr_32 = FLAT_LOAD_DWORD [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 4)
|
|
|
|
|
; GFX8: $vgpr0 = COPY [[FLAT_LOAD_DWORD]]
|
2019-07-17 02:05:29 +08:00
|
|
|
; GFX9-LABEL: name: load_flat_p3_from_4
|
|
|
|
|
; GFX9: liveins: $vgpr0_vgpr1
|
2019-08-01 11:57:42 +08:00
|
|
|
; GFX9: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX9: [[FLAT_LOAD_DWORD:%[0-9]+]]:vgpr_32 = FLAT_LOAD_DWORD [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 4)
|
|
|
|
|
; GFX9: $vgpr0 = COPY [[FLAT_LOAD_DWORD]]
|
2019-07-17 02:05:29 +08:00
|
|
|
; GFX10-LABEL: name: load_flat_p3_from_4
|
|
|
|
|
; GFX10: liveins: $vgpr0_vgpr1
|
2019-08-01 11:57:42 +08:00
|
|
|
; GFX10: $vcc_hi = IMPLICIT_DEF
|
|
|
|
|
; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX10: [[FLAT_LOAD_DWORD:%[0-9]+]]:vgpr_32 = FLAT_LOAD_DWORD [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 4)
|
|
|
|
|
; GFX10: $vgpr0 = COPY [[FLAT_LOAD_DWORD]]
|
2019-07-17 02:05:29 +08:00
|
|
|
%0:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
%1:vgpr(p3) = G_LOAD %0 :: (load 4, align 4, addrspace 0)
|
|
|
|
|
$vgpr0 = COPY %1
|
|
|
|
|
|
|
|
|
|
...
|
|
|
|
|
|
|
|
|
|
---
|
|
|
|
|
|
|
|
|
|
name: load_flat_p1_from_8
|
|
|
|
|
legalized: true
|
|
|
|
|
regBankSelected: true
|
|
|
|
|
tracksRegLiveness: true
|
|
|
|
|
|
|
|
|
|
body: |
|
|
|
|
|
bb.0:
|
|
|
|
|
liveins: $vgpr0_vgpr1
|
|
|
|
|
|
|
|
|
|
; GFX7-LABEL: name: load_flat_p1_from_8
|
|
|
|
|
; GFX7: liveins: $vgpr0_vgpr1
|
2019-08-01 11:57:42 +08:00
|
|
|
; GFX7: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX7: [[FLAT_LOAD_DWORDX2_:%[0-9]+]]:vreg_64 = FLAT_LOAD_DWORDX2 [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 8)
|
|
|
|
|
; GFX7: $vgpr0_vgpr1 = COPY [[FLAT_LOAD_DWORDX2_]]
|
2019-07-17 02:05:29 +08:00
|
|
|
; GFX8-LABEL: name: load_flat_p1_from_8
|
|
|
|
|
; GFX8: liveins: $vgpr0_vgpr1
|
2019-08-01 11:57:42 +08:00
|
|
|
; GFX8: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX8: [[FLAT_LOAD_DWORDX2_:%[0-9]+]]:vreg_64 = FLAT_LOAD_DWORDX2 [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 8)
|
|
|
|
|
; GFX8: $vgpr0_vgpr1 = COPY [[FLAT_LOAD_DWORDX2_]]
|
2019-07-17 02:05:29 +08:00
|
|
|
; GFX9-LABEL: name: load_flat_p1_from_8
|
|
|
|
|
; GFX9: liveins: $vgpr0_vgpr1
|
2019-08-01 11:57:42 +08:00
|
|
|
; GFX9: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX9: [[FLAT_LOAD_DWORDX2_:%[0-9]+]]:vreg_64 = FLAT_LOAD_DWORDX2 [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 8)
|
|
|
|
|
; GFX9: $vgpr0_vgpr1 = COPY [[FLAT_LOAD_DWORDX2_]]
|
2019-07-17 02:05:29 +08:00
|
|
|
; GFX10-LABEL: name: load_flat_p1_from_8
|
|
|
|
|
; GFX10: liveins: $vgpr0_vgpr1
|
2019-08-01 11:57:42 +08:00
|
|
|
; GFX10: $vcc_hi = IMPLICIT_DEF
|
|
|
|
|
; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX10: [[FLAT_LOAD_DWORDX2_:%[0-9]+]]:vreg_64 = FLAT_LOAD_DWORDX2 [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 8)
|
|
|
|
|
; GFX10: $vgpr0_vgpr1 = COPY [[FLAT_LOAD_DWORDX2_]]
|
2019-07-17 02:05:29 +08:00
|
|
|
%0:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
%1:vgpr(p1) = G_LOAD %0 :: (load 8, align 8, addrspace 0)
|
|
|
|
|
$vgpr0_vgpr1 = COPY %1
|
|
|
|
|
|
|
|
|
|
...
|
|
|
|
|
|
|
|
|
|
---
|
|
|
|
|
|
|
|
|
|
name: load_flat_p999_from_8
|
|
|
|
|
legalized: true
|
|
|
|
|
regBankSelected: true
|
|
|
|
|
tracksRegLiveness: true
|
|
|
|
|
|
|
|
|
|
body: |
|
|
|
|
|
bb.0:
|
|
|
|
|
liveins: $vgpr0_vgpr1
|
|
|
|
|
|
|
|
|
|
; GFX7-LABEL: name: load_flat_p999_from_8
|
|
|
|
|
; GFX7: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX7: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX7: [[LOAD:%[0-9]+]]:vreg_64(p999) = G_LOAD [[COPY]](p1) :: (load 8)
|
|
|
|
|
; GFX7: $vgpr0_vgpr1 = COPY [[LOAD]](p999)
|
|
|
|
|
; GFX8-LABEL: name: load_flat_p999_from_8
|
|
|
|
|
; GFX8: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX8: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX8: [[LOAD:%[0-9]+]]:vreg_64(p999) = G_LOAD [[COPY]](p1) :: (load 8)
|
|
|
|
|
; GFX8: $vgpr0_vgpr1 = COPY [[LOAD]](p999)
|
|
|
|
|
; GFX9-LABEL: name: load_flat_p999_from_8
|
|
|
|
|
; GFX9: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX9: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX9: [[LOAD:%[0-9]+]]:vreg_64(p999) = G_LOAD [[COPY]](p1) :: (load 8)
|
|
|
|
|
; GFX9: $vgpr0_vgpr1 = COPY [[LOAD]](p999)
|
|
|
|
|
; GFX10-LABEL: name: load_flat_p999_from_8
|
|
|
|
|
; GFX10: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX10: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX10: [[LOAD:%[0-9]+]]:vreg_64(p999) = G_LOAD [[COPY]](p1) :: (load 8)
|
|
|
|
|
; GFX10: $vgpr0_vgpr1 = COPY [[LOAD]](p999)
|
|
|
|
|
%0:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
%1:vgpr(p999) = G_LOAD %0 :: (load 8, align 8, addrspace 0)
|
|
|
|
|
$vgpr0_vgpr1 = COPY %1
|
|
|
|
|
|
|
|
|
|
...
|
|
|
|
|
|
|
|
|
|
---
|
|
|
|
|
|
|
|
|
|
name: load_flat_v2p3
|
|
|
|
|
legalized: true
|
|
|
|
|
regBankSelected: true
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
body: |
|
|
|
|
|
bb.0:
|
|
|
|
|
liveins: $vgpr0_vgpr1
|
|
|
|
|
|
|
|
|
|
; GFX7-LABEL: name: load_flat_v2p3
|
|
|
|
|
; GFX7: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX7: [[LOAD:%[0-9]+]]:vreg_64(<2 x p3>) = G_LOAD [[COPY]](p1) :: (load 8)
|
|
|
|
|
; GFX7: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x p3>)
|
|
|
|
|
; GFX8-LABEL: name: load_flat_v2p3
|
|
|
|
|
; GFX8: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX8: [[LOAD:%[0-9]+]]:vreg_64(<2 x p3>) = G_LOAD [[COPY]](p1) :: (load 8)
|
|
|
|
|
; GFX8: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x p3>)
|
|
|
|
|
; GFX9-LABEL: name: load_flat_v2p3
|
|
|
|
|
; GFX9: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX9: [[LOAD:%[0-9]+]]:vreg_64(<2 x p3>) = G_LOAD [[COPY]](p1) :: (load 8)
|
|
|
|
|
; GFX9: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x p3>)
|
|
|
|
|
; GFX10-LABEL: name: load_flat_v2p3
|
|
|
|
|
; GFX10: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX10: [[LOAD:%[0-9]+]]:vreg_64(<2 x p3>) = G_LOAD [[COPY]](p1) :: (load 8)
|
|
|
|
|
; GFX10: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x p3>)
|
|
|
|
|
%0:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
%1:vgpr(<2 x p3>) = G_LOAD %0 :: (load 8, align 8, addrspace 0)
|
|
|
|
|
$vgpr0_vgpr1 = COPY %1
|
|
|
|
|
|
|
|
|
|
...
|
|
|
|
|
|
|
|
|
|
---
|
|
|
|
|
|
|
|
|
|
name: load_flat_v2s16
|
|
|
|
|
legalized: true
|
|
|
|
|
regBankSelected: true
|
|
|
|
|
tracksRegLiveness: true
|
|
|
|
|
|
|
|
|
|
body: |
|
|
|
|
|
bb.0:
|
|
|
|
|
liveins: $vgpr0_vgpr1
|
|
|
|
|
|
|
|
|
|
; GFX7-LABEL: name: load_flat_v2s16
|
|
|
|
|
; GFX7: liveins: $vgpr0_vgpr1
|
2019-08-01 11:52:40 +08:00
|
|
|
; GFX7: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX7: [[FLAT_LOAD_DWORD:%[0-9]+]]:vgpr_32 = FLAT_LOAD_DWORD [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 4)
|
|
|
|
|
; GFX7: $vgpr0 = COPY [[FLAT_LOAD_DWORD]]
|
2019-07-17 02:05:29 +08:00
|
|
|
; GFX8-LABEL: name: load_flat_v2s16
|
|
|
|
|
; GFX8: liveins: $vgpr0_vgpr1
|
2019-08-01 11:52:40 +08:00
|
|
|
; GFX8: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX8: [[FLAT_LOAD_DWORD:%[0-9]+]]:vgpr_32 = FLAT_LOAD_DWORD [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 4)
|
|
|
|
|
; GFX8: $vgpr0 = COPY [[FLAT_LOAD_DWORD]]
|
2019-07-17 02:05:29 +08:00
|
|
|
; GFX9-LABEL: name: load_flat_v2s16
|
|
|
|
|
; GFX9: liveins: $vgpr0_vgpr1
|
2019-08-01 11:52:40 +08:00
|
|
|
; GFX9: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX9: [[FLAT_LOAD_DWORD:%[0-9]+]]:vgpr_32 = FLAT_LOAD_DWORD [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 4)
|
|
|
|
|
; GFX9: $vgpr0 = COPY [[FLAT_LOAD_DWORD]]
|
2019-07-17 02:05:29 +08:00
|
|
|
; GFX10-LABEL: name: load_flat_v2s16
|
|
|
|
|
; GFX10: liveins: $vgpr0_vgpr1
|
2019-08-01 11:52:40 +08:00
|
|
|
; GFX10: $vcc_hi = IMPLICIT_DEF
|
|
|
|
|
; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX10: [[FLAT_LOAD_DWORD:%[0-9]+]]:vgpr_32 = FLAT_LOAD_DWORD [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 4)
|
|
|
|
|
; GFX10: $vgpr0 = COPY [[FLAT_LOAD_DWORD]]
|
2019-07-17 02:05:29 +08:00
|
|
|
%0:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
%1:vgpr(<2 x s16>) = G_LOAD %0 :: (load 4, align 4, addrspace 0)
|
|
|
|
|
$vgpr0 = COPY %1
|
|
|
|
|
|
|
|
|
|
...
|
|
|
|
|
|
|
|
|
|
---
|
|
|
|
|
|
|
|
|
|
name: load_flat_v4s16
|
|
|
|
|
legalized: true
|
|
|
|
|
regBankSelected: true
|
|
|
|
|
tracksRegLiveness: true
|
|
|
|
|
|
|
|
|
|
body: |
|
|
|
|
|
bb.0:
|
|
|
|
|
liveins: $vgpr0_vgpr1
|
|
|
|
|
|
|
|
|
|
; GFX7-LABEL: name: load_flat_v4s16
|
|
|
|
|
; GFX7: liveins: $vgpr0_vgpr1
|
2019-08-01 11:52:40 +08:00
|
|
|
; GFX7: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX7: [[FLAT_LOAD_DWORDX2_:%[0-9]+]]:vreg_64 = FLAT_LOAD_DWORDX2 [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 8)
|
|
|
|
|
; GFX7: $vgpr0_vgpr1 = COPY [[FLAT_LOAD_DWORDX2_]]
|
2019-07-17 02:05:29 +08:00
|
|
|
; GFX8-LABEL: name: load_flat_v4s16
|
|
|
|
|
; GFX8: liveins: $vgpr0_vgpr1
|
2019-08-01 11:52:40 +08:00
|
|
|
; GFX8: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX8: [[FLAT_LOAD_DWORDX2_:%[0-9]+]]:vreg_64 = FLAT_LOAD_DWORDX2 [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 8)
|
|
|
|
|
; GFX8: $vgpr0_vgpr1 = COPY [[FLAT_LOAD_DWORDX2_]]
|
2019-07-17 02:05:29 +08:00
|
|
|
; GFX9-LABEL: name: load_flat_v4s16
|
|
|
|
|
; GFX9: liveins: $vgpr0_vgpr1
|
2019-08-01 11:52:40 +08:00
|
|
|
; GFX9: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX9: [[FLAT_LOAD_DWORDX2_:%[0-9]+]]:vreg_64 = FLAT_LOAD_DWORDX2 [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 8)
|
|
|
|
|
; GFX9: $vgpr0_vgpr1 = COPY [[FLAT_LOAD_DWORDX2_]]
|
2019-07-17 02:05:29 +08:00
|
|
|
; GFX10-LABEL: name: load_flat_v4s16
|
|
|
|
|
; GFX10: liveins: $vgpr0_vgpr1
|
2019-08-01 11:52:40 +08:00
|
|
|
; GFX10: $vcc_hi = IMPLICIT_DEF
|
|
|
|
|
; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX10: [[FLAT_LOAD_DWORDX2_:%[0-9]+]]:vreg_64 = FLAT_LOAD_DWORDX2 [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 8)
|
|
|
|
|
; GFX10: $vgpr0_vgpr1 = COPY [[FLAT_LOAD_DWORDX2_]]
|
2019-07-17 02:05:29 +08:00
|
|
|
%0:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
%1:vgpr(<4 x s16>) = G_LOAD %0 :: (load 8, align 8, addrspace 0)
|
|
|
|
|
$vgpr0_vgpr1 = COPY %1
|
|
|
|
|
|
|
|
|
|
...
|
|
|
|
|
|
|
|
|
|
---
|
|
|
|
|
|
|
|
|
|
name: load_flat_v6s16
|
|
|
|
|
legalized: true
|
|
|
|
|
regBankSelected: true
|
|
|
|
|
tracksRegLiveness: true
|
|
|
|
|
|
|
|
|
|
body: |
|
|
|
|
|
bb.0:
|
|
|
|
|
liveins: $vgpr0_vgpr1
|
|
|
|
|
|
|
|
|
|
; GFX7-LABEL: name: load_flat_v6s16
|
|
|
|
|
; GFX7: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX7: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX7: [[LOAD:%[0-9]+]]:vreg_96(<6 x s16>) = G_LOAD [[COPY]](p1) :: (load 12, align 4)
|
|
|
|
|
; GFX7: $vgpr0_vgpr1_vgpr2 = COPY [[LOAD]](<6 x s16>)
|
|
|
|
|
; GFX8-LABEL: name: load_flat_v6s16
|
|
|
|
|
; GFX8: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX8: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX8: [[LOAD:%[0-9]+]]:vreg_96(<6 x s16>) = G_LOAD [[COPY]](p1) :: (load 12, align 4)
|
|
|
|
|
; GFX8: $vgpr0_vgpr1_vgpr2 = COPY [[LOAD]](<6 x s16>)
|
|
|
|
|
; GFX9-LABEL: name: load_flat_v6s16
|
|
|
|
|
; GFX9: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX9: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX9: [[LOAD:%[0-9]+]]:vreg_96(<6 x s16>) = G_LOAD [[COPY]](p1) :: (load 12, align 4)
|
|
|
|
|
; GFX9: $vgpr0_vgpr1_vgpr2 = COPY [[LOAD]](<6 x s16>)
|
|
|
|
|
; GFX10-LABEL: name: load_flat_v6s16
|
|
|
|
|
; GFX10: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX10: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX10: [[LOAD:%[0-9]+]]:vreg_96(<6 x s16>) = G_LOAD [[COPY]](p1) :: (load 12, align 4)
|
|
|
|
|
; GFX10: $vgpr0_vgpr1_vgpr2 = COPY [[LOAD]](<6 x s16>)
|
|
|
|
|
%0:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
%1:vgpr(<6 x s16>) = G_LOAD %0 :: (load 12, align 4, addrspace 0)
|
|
|
|
|
$vgpr0_vgpr1_vgpr2 = COPY %1
|
|
|
|
|
|
|
|
|
|
...
|
|
|
|
|
|
|
|
|
|
---
|
|
|
|
|
|
|
|
|
|
name: load_flat_v8s16
|
|
|
|
|
legalized: true
|
|
|
|
|
regBankSelected: true
|
|
|
|
|
tracksRegLiveness: true
|
|
|
|
|
|
|
|
|
|
body: |
|
|
|
|
|
bb.0:
|
|
|
|
|
liveins: $vgpr0_vgpr1
|
|
|
|
|
|
|
|
|
|
; GFX7-LABEL: name: load_flat_v8s16
|
|
|
|
|
; GFX7: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX7: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX7: [[LOAD:%[0-9]+]]:vreg_128(<8 x s16>) = G_LOAD [[COPY]](p1) :: (load 16, align 4)
|
|
|
|
|
; GFX7: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](<8 x s16>)
|
|
|
|
|
; GFX8-LABEL: name: load_flat_v8s16
|
|
|
|
|
; GFX8: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX8: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX8: [[LOAD:%[0-9]+]]:vreg_128(<8 x s16>) = G_LOAD [[COPY]](p1) :: (load 16, align 4)
|
|
|
|
|
; GFX8: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](<8 x s16>)
|
|
|
|
|
; GFX9-LABEL: name: load_flat_v8s16
|
|
|
|
|
; GFX9: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX9: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX9: [[LOAD:%[0-9]+]]:vreg_128(<8 x s16>) = G_LOAD [[COPY]](p1) :: (load 16, align 4)
|
|
|
|
|
; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](<8 x s16>)
|
|
|
|
|
; GFX10-LABEL: name: load_flat_v8s16
|
|
|
|
|
; GFX10: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX10: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX10: [[LOAD:%[0-9]+]]:vreg_128(<8 x s16>) = G_LOAD [[COPY]](p1) :: (load 16, align 4)
|
|
|
|
|
; GFX10: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](<8 x s16>)
|
|
|
|
|
%0:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
%1:vgpr(<8 x s16>) = G_LOAD %0 :: (load 16, align 4, addrspace 0)
|
|
|
|
|
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1
|
|
|
|
|
|
|
|
|
|
...
|
|
|
|
|
|
|
|
|
|
################################################################################
|
|
|
|
|
### Stress addressing modes
|
|
|
|
|
################################################################################
|
|
|
|
|
|
|
|
|
|
---
|
|
|
|
|
|
|
|
|
|
name: load_flat_s32_from_1_gep_2047
|
|
|
|
|
legalized: true
|
|
|
|
|
regBankSelected: true
|
|
|
|
|
tracksRegLiveness: true
|
|
|
|
|
|
|
|
|
|
body: |
|
|
|
|
|
bb.0:
|
|
|
|
|
liveins: $vgpr0_vgpr1
|
|
|
|
|
|
|
|
|
|
; GFX7-LABEL: name: load_flat_s32_from_1_gep_2047
|
|
|
|
|
; GFX7: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX7: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX7: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2047, implicit $exec
|
|
|
|
|
; GFX7: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
|
|
|
|
|
; GFX7: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
|
|
|
|
|
; GFX7: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
|
|
|
|
|
; GFX7: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
|
|
|
|
|
; GFX7: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
|
|
|
|
|
; GFX7: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
|
|
|
|
|
; GFX7: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_I32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
|
|
|
|
|
; GFX7: %9:vgpr_32, dead %11:sreg_64_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
|
|
|
|
|
; GFX7: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %9, %subreg.sub1
|
|
|
|
|
; GFX7: [[FLAT_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = FLAT_LOAD_UBYTE [[REG_SEQUENCE1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 1)
|
|
|
|
|
; GFX7: $vgpr0 = COPY [[FLAT_LOAD_UBYTE]]
|
|
|
|
|
; GFX8-LABEL: name: load_flat_s32_from_1_gep_2047
|
|
|
|
|
; GFX8: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX8: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX8: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2047, implicit $exec
|
|
|
|
|
; GFX8: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
|
|
|
|
|
; GFX8: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
|
|
|
|
|
; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
|
|
|
|
|
; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
|
|
|
|
|
; GFX8: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
|
|
|
|
|
; GFX8: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
|
|
|
|
|
; GFX8: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_I32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
|
|
|
|
|
; GFX8: %9:vgpr_32, dead %11:sreg_64_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
|
|
|
|
|
; GFX8: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %9, %subreg.sub1
|
|
|
|
|
; GFX8: [[FLAT_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = FLAT_LOAD_UBYTE [[REG_SEQUENCE1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 1)
|
|
|
|
|
; GFX8: $vgpr0 = COPY [[FLAT_LOAD_UBYTE]]
|
|
|
|
|
; GFX9-LABEL: name: load_flat_s32_from_1_gep_2047
|
|
|
|
|
; GFX9: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX9: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX9: [[FLAT_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = FLAT_LOAD_UBYTE [[COPY]], 2047, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 1)
|
|
|
|
|
; GFX9: $vgpr0 = COPY [[FLAT_LOAD_UBYTE]]
|
|
|
|
|
; GFX10-LABEL: name: load_flat_s32_from_1_gep_2047
|
|
|
|
|
; GFX10: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX10: $vcc_hi = IMPLICIT_DEF
|
|
|
|
|
; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX10: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2047, implicit $exec
|
|
|
|
|
; GFX10: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
|
|
|
|
|
; GFX10: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
|
|
|
|
|
; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
|
|
|
|
|
; GFX10: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
|
|
|
|
|
; GFX10: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
|
|
|
|
|
; GFX10: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
|
|
|
|
|
; GFX10: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_32_xm0_xexec = V_ADD_I32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
|
|
|
|
|
; GFX10: %9:vgpr_32, dead %11:sreg_32_xm0_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
|
|
|
|
|
; GFX10: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %9, %subreg.sub1
|
|
|
|
|
; GFX10: [[FLAT_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = FLAT_LOAD_UBYTE [[REG_SEQUENCE1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 1)
|
|
|
|
|
; GFX10: $vgpr0 = COPY [[FLAT_LOAD_UBYTE]]
|
|
|
|
|
%0:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
%1:vgpr(s64) = G_CONSTANT i64 2047
|
|
|
|
|
%2:vgpr(p1) = G_GEP %0, %1
|
|
|
|
|
%3:vgpr(s32) = G_LOAD %2 :: (load 1, align 1, addrspace 0)
|
|
|
|
|
$vgpr0 = COPY %3
|
|
|
|
|
|
|
|
|
|
...
|
|
|
|
|
|
|
|
|
|
---
|
|
|
|
|
|
|
|
|
|
name: load_flat_s32_from_1_gep_2048
|
|
|
|
|
legalized: true
|
|
|
|
|
regBankSelected: true
|
|
|
|
|
tracksRegLiveness: true
|
|
|
|
|
|
|
|
|
|
body: |
|
|
|
|
|
bb.0:
|
|
|
|
|
liveins: $vgpr0_vgpr1
|
|
|
|
|
|
|
|
|
|
; GFX7-LABEL: name: load_flat_s32_from_1_gep_2048
|
|
|
|
|
; GFX7: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX7: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX7: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2048, implicit $exec
|
|
|
|
|
; GFX7: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
|
|
|
|
|
; GFX7: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
|
|
|
|
|
; GFX7: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
|
|
|
|
|
; GFX7: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
|
|
|
|
|
; GFX7: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
|
|
|
|
|
; GFX7: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
|
|
|
|
|
; GFX7: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_I32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
|
|
|
|
|
; GFX7: %9:vgpr_32, dead %11:sreg_64_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
|
|
|
|
|
; GFX7: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %9, %subreg.sub1
|
|
|
|
|
; GFX7: [[FLAT_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = FLAT_LOAD_UBYTE [[REG_SEQUENCE1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 1)
|
|
|
|
|
; GFX7: $vgpr0 = COPY [[FLAT_LOAD_UBYTE]]
|
|
|
|
|
; GFX8-LABEL: name: load_flat_s32_from_1_gep_2048
|
|
|
|
|
; GFX8: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX8: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX8: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2048, implicit $exec
|
|
|
|
|
; GFX8: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
|
|
|
|
|
; GFX8: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
|
|
|
|
|
; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
|
|
|
|
|
; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
|
|
|
|
|
; GFX8: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
|
|
|
|
|
; GFX8: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
|
|
|
|
|
; GFX8: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_I32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
|
|
|
|
|
; GFX8: %9:vgpr_32, dead %11:sreg_64_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
|
|
|
|
|
; GFX8: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %9, %subreg.sub1
|
|
|
|
|
; GFX8: [[FLAT_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = FLAT_LOAD_UBYTE [[REG_SEQUENCE1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 1)
|
|
|
|
|
; GFX8: $vgpr0 = COPY [[FLAT_LOAD_UBYTE]]
|
|
|
|
|
; GFX9-LABEL: name: load_flat_s32_from_1_gep_2048
|
|
|
|
|
; GFX9: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX9: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX9: [[FLAT_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = FLAT_LOAD_UBYTE [[COPY]], 2048, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 1)
|
|
|
|
|
; GFX9: $vgpr0 = COPY [[FLAT_LOAD_UBYTE]]
|
|
|
|
|
; GFX10-LABEL: name: load_flat_s32_from_1_gep_2048
|
|
|
|
|
; GFX10: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX10: $vcc_hi = IMPLICIT_DEF
|
|
|
|
|
; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX10: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2048, implicit $exec
|
|
|
|
|
; GFX10: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
|
|
|
|
|
; GFX10: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
|
|
|
|
|
; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
|
|
|
|
|
; GFX10: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
|
|
|
|
|
; GFX10: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
|
|
|
|
|
; GFX10: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
|
|
|
|
|
; GFX10: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_32_xm0_xexec = V_ADD_I32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
|
|
|
|
|
; GFX10: %9:vgpr_32, dead %11:sreg_32_xm0_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
|
|
|
|
|
; GFX10: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %9, %subreg.sub1
|
|
|
|
|
; GFX10: [[FLAT_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = FLAT_LOAD_UBYTE [[REG_SEQUENCE1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 1)
|
|
|
|
|
; GFX10: $vgpr0 = COPY [[FLAT_LOAD_UBYTE]]
|
|
|
|
|
%0:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
%1:vgpr(s64) = G_CONSTANT i64 2048
|
|
|
|
|
%2:vgpr(p1) = G_GEP %0, %1
|
|
|
|
|
%3:vgpr(s32) = G_LOAD %2 :: (load 1, align 1, addrspace 0)
|
|
|
|
|
$vgpr0 = COPY %3
|
|
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...
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---
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name: load_flat_s32_from_1_gep_m2047
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; GFX7-LABEL: name: load_flat_s32_from_1_gep_m2047
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; GFX7: liveins: $vgpr0_vgpr1
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; GFX7: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; GFX7: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4294965249, implicit $exec
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; GFX7: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 -1, implicit $exec
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; GFX7: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
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; GFX7: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
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; GFX7: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
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; GFX7: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
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; GFX7: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
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; GFX7: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_I32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
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; GFX7: %9:vgpr_32, dead %11:sreg_64_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
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; GFX7: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %9, %subreg.sub1
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; GFX7: [[FLAT_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = FLAT_LOAD_UBYTE [[REG_SEQUENCE1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 1)
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; GFX7: $vgpr0 = COPY [[FLAT_LOAD_UBYTE]]
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; GFX8-LABEL: name: load_flat_s32_from_1_gep_m2047
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; GFX8: liveins: $vgpr0_vgpr1
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; GFX8: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; GFX8: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4294965249, implicit $exec
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; GFX8: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 -1, implicit $exec
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; GFX8: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
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; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
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; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
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; GFX8: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
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; GFX8: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
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; GFX8: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_I32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
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; GFX8: %9:vgpr_32, dead %11:sreg_64_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
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; GFX8: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %9, %subreg.sub1
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; GFX8: [[FLAT_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = FLAT_LOAD_UBYTE [[REG_SEQUENCE1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 1)
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; GFX8: $vgpr0 = COPY [[FLAT_LOAD_UBYTE]]
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; GFX9-LABEL: name: load_flat_s32_from_1_gep_m2047
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; GFX9: liveins: $vgpr0_vgpr1
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; GFX9: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; GFX9: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4294965249, implicit $exec
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; GFX9: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 -1, implicit $exec
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; GFX9: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
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; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
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; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
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; GFX9: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
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; GFX9: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
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; GFX9: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_I32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
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; GFX9: %9:vgpr_32, dead %11:sreg_64_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
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; GFX9: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %9, %subreg.sub1
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; GFX9: [[FLAT_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = FLAT_LOAD_UBYTE [[REG_SEQUENCE1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 1)
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; GFX9: $vgpr0 = COPY [[FLAT_LOAD_UBYTE]]
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; GFX10-LABEL: name: load_flat_s32_from_1_gep_m2047
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; GFX10: liveins: $vgpr0_vgpr1
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; GFX10: $vcc_hi = IMPLICIT_DEF
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; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; GFX10: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4294965249, implicit $exec
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; GFX10: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 -1, implicit $exec
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; GFX10: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
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; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
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; GFX10: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
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; GFX10: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
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; GFX10: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
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; GFX10: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_32_xm0_xexec = V_ADD_I32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
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; GFX10: %9:vgpr_32, dead %11:sreg_32_xm0_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
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; GFX10: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %9, %subreg.sub1
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; GFX10: [[FLAT_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = FLAT_LOAD_UBYTE [[REG_SEQUENCE1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 1)
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; GFX10: $vgpr0 = COPY [[FLAT_LOAD_UBYTE]]
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%0:vgpr(p1) = COPY $vgpr0_vgpr1
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%1:vgpr(s64) = G_CONSTANT i64 -2047
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%2:vgpr(p1) = G_GEP %0, %1
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%3:vgpr(s32) = G_LOAD %2 :: (load 1, align 1, addrspace 0)
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$vgpr0 = COPY %3
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...
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---
|
|
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|
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name: load_flat_s32_from_1_gep_m2048
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; GFX7-LABEL: name: load_flat_s32_from_1_gep_m2048
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; GFX7: liveins: $vgpr0_vgpr1
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; GFX7: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; GFX7: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4294965248, implicit $exec
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; GFX7: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 -1, implicit $exec
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; GFX7: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
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; GFX7: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
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; GFX7: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
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; GFX7: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
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; GFX7: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
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; GFX7: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_I32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
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; GFX7: %9:vgpr_32, dead %11:sreg_64_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
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; GFX7: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %9, %subreg.sub1
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; GFX7: [[FLAT_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = FLAT_LOAD_UBYTE [[REG_SEQUENCE1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 1)
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; GFX7: $vgpr0 = COPY [[FLAT_LOAD_UBYTE]]
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; GFX8-LABEL: name: load_flat_s32_from_1_gep_m2048
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; GFX8: liveins: $vgpr0_vgpr1
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; GFX8: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; GFX8: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4294965248, implicit $exec
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; GFX8: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 -1, implicit $exec
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; GFX8: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
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; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
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; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
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; GFX8: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
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; GFX8: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
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|
; GFX8: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_I32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
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; GFX8: %9:vgpr_32, dead %11:sreg_64_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
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; GFX8: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %9, %subreg.sub1
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; GFX8: [[FLAT_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = FLAT_LOAD_UBYTE [[REG_SEQUENCE1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 1)
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; GFX8: $vgpr0 = COPY [[FLAT_LOAD_UBYTE]]
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; GFX9-LABEL: name: load_flat_s32_from_1_gep_m2048
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; GFX9: liveins: $vgpr0_vgpr1
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; GFX9: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; GFX9: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4294965248, implicit $exec
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; GFX9: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 -1, implicit $exec
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; GFX9: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
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; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
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; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
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; GFX9: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
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; GFX9: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
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|
; GFX9: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_I32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
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|
; GFX9: %9:vgpr_32, dead %11:sreg_64_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
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|
; GFX9: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %9, %subreg.sub1
|
|
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|
|
; GFX9: [[FLAT_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = FLAT_LOAD_UBYTE [[REG_SEQUENCE1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 1)
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|
|
; GFX9: $vgpr0 = COPY [[FLAT_LOAD_UBYTE]]
|
|
|
|
|
; GFX10-LABEL: name: load_flat_s32_from_1_gep_m2048
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|
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|
|
; GFX10: liveins: $vgpr0_vgpr1
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|
; GFX10: $vcc_hi = IMPLICIT_DEF
|
|
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|
|
; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
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|
|
; GFX10: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4294965248, implicit $exec
|
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|
; GFX10: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 -1, implicit $exec
|
|
|
|
|
; GFX10: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
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|
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|
|
; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
|
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|
|
; GFX10: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
|
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|
; GFX10: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
|
|
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|
|
; GFX10: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
|
|
|
|
|
; GFX10: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_32_xm0_xexec = V_ADD_I32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
|
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|
|
; GFX10: %9:vgpr_32, dead %11:sreg_32_xm0_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
|
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|
|
|
; GFX10: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %9, %subreg.sub1
|
|
|
|
|
; GFX10: [[FLAT_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = FLAT_LOAD_UBYTE [[REG_SEQUENCE1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 1)
|
|
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|
|
; GFX10: $vgpr0 = COPY [[FLAT_LOAD_UBYTE]]
|
|
|
|
|
%0:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
%1:vgpr(s64) = G_CONSTANT i64 -2048
|
|
|
|
|
%2:vgpr(p1) = G_GEP %0, %1
|
|
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|
|
%3:vgpr(s32) = G_LOAD %2 :: (load 1, align 1, addrspace 0)
|
|
|
|
|
$vgpr0 = COPY %3
|
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...
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---
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name: load_flat_s32_from_1_gep_4095
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|
|
legalized: true
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|
regBankSelected: true
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|
|
tracksRegLiveness: true
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|
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|
|
body: |
|
|
|
|
|
bb.0:
|
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|
|
liveins: $vgpr0_vgpr1
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|
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|
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; GFX7-LABEL: name: load_flat_s32_from_1_gep_4095
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|
|
; GFX7: liveins: $vgpr0_vgpr1
|
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; GFX7: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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|
; GFX7: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4095, implicit $exec
|
|
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|
; GFX7: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
|
|
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|
; GFX7: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
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|
; GFX7: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
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|
; GFX7: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
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; GFX7: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
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; GFX7: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
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|
; GFX7: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_I32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
|
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|
; GFX7: %9:vgpr_32, dead %11:sreg_64_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
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; GFX7: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %9, %subreg.sub1
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|
; GFX7: [[FLAT_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = FLAT_LOAD_UBYTE [[REG_SEQUENCE1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 1)
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; GFX7: $vgpr0 = COPY [[FLAT_LOAD_UBYTE]]
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; GFX8-LABEL: name: load_flat_s32_from_1_gep_4095
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; GFX8: liveins: $vgpr0_vgpr1
|
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; GFX8: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
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|
; GFX8: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4095, implicit $exec
|
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|
; GFX8: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
|
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|
|
; GFX8: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
|
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|
|
; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
|
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|
; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
|
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|
|
|
; GFX8: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
|
|
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|
; GFX8: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
|
|
|
|
|
; GFX8: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_I32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
|
|
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|
|
; GFX8: %9:vgpr_32, dead %11:sreg_64_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
|
|
|
|
|
; GFX8: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %9, %subreg.sub1
|
|
|
|
|
; GFX8: [[FLAT_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = FLAT_LOAD_UBYTE [[REG_SEQUENCE1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 1)
|
|
|
|
|
; GFX8: $vgpr0 = COPY [[FLAT_LOAD_UBYTE]]
|
|
|
|
|
; GFX9-LABEL: name: load_flat_s32_from_1_gep_4095
|
|
|
|
|
; GFX9: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX9: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX9: [[FLAT_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = FLAT_LOAD_UBYTE [[COPY]], 4095, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 1)
|
|
|
|
|
; GFX9: $vgpr0 = COPY [[FLAT_LOAD_UBYTE]]
|
|
|
|
|
; GFX10-LABEL: name: load_flat_s32_from_1_gep_4095
|
|
|
|
|
; GFX10: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX10: $vcc_hi = IMPLICIT_DEF
|
|
|
|
|
; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX10: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4095, implicit $exec
|
|
|
|
|
; GFX10: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
|
|
|
|
|
; GFX10: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
|
|
|
|
|
; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
|
|
|
|
|
; GFX10: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
|
|
|
|
|
; GFX10: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
|
|
|
|
|
; GFX10: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
|
|
|
|
|
; GFX10: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_32_xm0_xexec = V_ADD_I32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
|
|
|
|
|
; GFX10: %9:vgpr_32, dead %11:sreg_32_xm0_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
|
|
|
|
|
; GFX10: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %9, %subreg.sub1
|
|
|
|
|
; GFX10: [[FLAT_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = FLAT_LOAD_UBYTE [[REG_SEQUENCE1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 1)
|
|
|
|
|
; GFX10: $vgpr0 = COPY [[FLAT_LOAD_UBYTE]]
|
|
|
|
|
%0:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
%1:vgpr(s64) = G_CONSTANT i64 4095
|
|
|
|
|
%2:vgpr(p1) = G_GEP %0, %1
|
|
|
|
|
%3:vgpr(s32) = G_LOAD %2 :: (load 1, align 1, addrspace 0)
|
|
|
|
|
$vgpr0 = COPY %3
|
|
|
|
|
|
|
|
|
|
...
|
|
|
|
|
|
|
|
|
|
---
|
|
|
|
|
|
|
|
|
|
name: load_flat_s32_from_1_gep_4096
|
|
|
|
|
legalized: true
|
|
|
|
|
regBankSelected: true
|
|
|
|
|
tracksRegLiveness: true
|
|
|
|
|
|
|
|
|
|
body: |
|
|
|
|
|
bb.0:
|
|
|
|
|
liveins: $vgpr0_vgpr1
|
|
|
|
|
|
|
|
|
|
; GFX7-LABEL: name: load_flat_s32_from_1_gep_4096
|
|
|
|
|
; GFX7: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX7: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX7: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4096, implicit $exec
|
|
|
|
|
; GFX7: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
|
|
|
|
|
; GFX7: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
|
|
|
|
|
; GFX7: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
|
|
|
|
|
; GFX7: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
|
|
|
|
|
; GFX7: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
|
|
|
|
|
; GFX7: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
|
|
|
|
|
; GFX7: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_I32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
|
|
|
|
|
; GFX7: %9:vgpr_32, dead %11:sreg_64_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
|
|
|
|
|
; GFX7: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %9, %subreg.sub1
|
|
|
|
|
; GFX7: [[FLAT_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = FLAT_LOAD_UBYTE [[REG_SEQUENCE1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 1)
|
|
|
|
|
; GFX7: $vgpr0 = COPY [[FLAT_LOAD_UBYTE]]
|
|
|
|
|
; GFX8-LABEL: name: load_flat_s32_from_1_gep_4096
|
|
|
|
|
; GFX8: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX8: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX8: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4096, implicit $exec
|
|
|
|
|
; GFX8: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
|
|
|
|
|
; GFX8: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
|
|
|
|
|
; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
|
|
|
|
|
; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
|
|
|
|
|
; GFX8: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
|
|
|
|
|
; GFX8: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
|
|
|
|
|
; GFX8: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_I32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
|
|
|
|
|
; GFX8: %9:vgpr_32, dead %11:sreg_64_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
|
|
|
|
|
; GFX8: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %9, %subreg.sub1
|
|
|
|
|
; GFX8: [[FLAT_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = FLAT_LOAD_UBYTE [[REG_SEQUENCE1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 1)
|
|
|
|
|
; GFX8: $vgpr0 = COPY [[FLAT_LOAD_UBYTE]]
|
|
|
|
|
; GFX9-LABEL: name: load_flat_s32_from_1_gep_4096
|
|
|
|
|
; GFX9: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX9: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX9: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4096, implicit $exec
|
|
|
|
|
; GFX9: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
|
|
|
|
|
; GFX9: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
|
|
|
|
|
; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
|
|
|
|
|
; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
|
|
|
|
|
; GFX9: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
|
|
|
|
|
; GFX9: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
|
|
|
|
|
; GFX9: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_I32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
|
|
|
|
|
; GFX9: %9:vgpr_32, dead %11:sreg_64_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
|
|
|
|
|
; GFX9: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %9, %subreg.sub1
|
|
|
|
|
; GFX9: [[FLAT_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = FLAT_LOAD_UBYTE [[REG_SEQUENCE1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 1)
|
|
|
|
|
; GFX9: $vgpr0 = COPY [[FLAT_LOAD_UBYTE]]
|
|
|
|
|
; GFX10-LABEL: name: load_flat_s32_from_1_gep_4096
|
|
|
|
|
; GFX10: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX10: $vcc_hi = IMPLICIT_DEF
|
|
|
|
|
; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX10: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4096, implicit $exec
|
|
|
|
|
; GFX10: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
|
|
|
|
|
; GFX10: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
|
|
|
|
|
; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
|
|
|
|
|
; GFX10: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
|
|
|
|
|
; GFX10: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
|
|
|
|
|
; GFX10: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
|
|
|
|
|
; GFX10: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_32_xm0_xexec = V_ADD_I32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
|
|
|
|
|
; GFX10: %9:vgpr_32, dead %11:sreg_32_xm0_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
|
|
|
|
|
; GFX10: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %9, %subreg.sub1
|
|
|
|
|
; GFX10: [[FLAT_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = FLAT_LOAD_UBYTE [[REG_SEQUENCE1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 1)
|
|
|
|
|
; GFX10: $vgpr0 = COPY [[FLAT_LOAD_UBYTE]]
|
|
|
|
|
%0:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
%1:vgpr(s64) = G_CONSTANT i64 4096
|
|
|
|
|
%2:vgpr(p1) = G_GEP %0, %1
|
|
|
|
|
%3:vgpr(s32) = G_LOAD %2 :: (load 1, align 1, addrspace 0)
|
|
|
|
|
$vgpr0 = COPY %3
|
|
|
|
|
|
|
|
|
|
...
|
|
|
|
|
|
|
|
|
|
---
|
|
|
|
|
|
|
|
|
|
name: load_flat_s32_from_1_gep_m4095
|
|
|
|
|
legalized: true
|
|
|
|
|
regBankSelected: true
|
|
|
|
|
tracksRegLiveness: true
|
|
|
|
|
|
|
|
|
|
body: |
|
|
|
|
|
bb.0:
|
|
|
|
|
liveins: $vgpr0_vgpr1
|
|
|
|
|
|
|
|
|
|
; GFX7-LABEL: name: load_flat_s32_from_1_gep_m4095
|
|
|
|
|
; GFX7: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX7: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX7: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4294963201, implicit $exec
|
|
|
|
|
; GFX7: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 -1, implicit $exec
|
|
|
|
|
; GFX7: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
|
|
|
|
|
; GFX7: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
|
|
|
|
|
; GFX7: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
|
|
|
|
|
; GFX7: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
|
|
|
|
|
; GFX7: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
|
|
|
|
|
; GFX7: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_I32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
|
|
|
|
|
; GFX7: %9:vgpr_32, dead %11:sreg_64_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
|
|
|
|
|
; GFX7: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %9, %subreg.sub1
|
|
|
|
|
; GFX7: [[FLAT_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = FLAT_LOAD_UBYTE [[REG_SEQUENCE1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 1)
|
|
|
|
|
; GFX7: $vgpr0 = COPY [[FLAT_LOAD_UBYTE]]
|
|
|
|
|
; GFX8-LABEL: name: load_flat_s32_from_1_gep_m4095
|
|
|
|
|
; GFX8: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX8: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX8: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4294963201, implicit $exec
|
|
|
|
|
; GFX8: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 -1, implicit $exec
|
|
|
|
|
; GFX8: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
|
|
|
|
|
; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
|
|
|
|
|
; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
|
|
|
|
|
; GFX8: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
|
|
|
|
|
; GFX8: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
|
|
|
|
|
; GFX8: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_I32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
|
|
|
|
|
; GFX8: %9:vgpr_32, dead %11:sreg_64_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
|
|
|
|
|
; GFX8: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %9, %subreg.sub1
|
|
|
|
|
; GFX8: [[FLAT_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = FLAT_LOAD_UBYTE [[REG_SEQUENCE1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 1)
|
|
|
|
|
; GFX8: $vgpr0 = COPY [[FLAT_LOAD_UBYTE]]
|
|
|
|
|
; GFX9-LABEL: name: load_flat_s32_from_1_gep_m4095
|
|
|
|
|
; GFX9: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX9: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX9: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4294963201, implicit $exec
|
|
|
|
|
; GFX9: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 -1, implicit $exec
|
|
|
|
|
; GFX9: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
|
|
|
|
|
; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
|
|
|
|
|
; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
|
|
|
|
|
; GFX9: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
|
|
|
|
|
; GFX9: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
|
|
|
|
|
; GFX9: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_I32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
|
|
|
|
|
; GFX9: %9:vgpr_32, dead %11:sreg_64_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
|
|
|
|
|
; GFX9: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %9, %subreg.sub1
|
|
|
|
|
; GFX9: [[FLAT_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = FLAT_LOAD_UBYTE [[REG_SEQUENCE1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 1)
|
|
|
|
|
; GFX9: $vgpr0 = COPY [[FLAT_LOAD_UBYTE]]
|
|
|
|
|
; GFX10-LABEL: name: load_flat_s32_from_1_gep_m4095
|
|
|
|
|
; GFX10: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX10: $vcc_hi = IMPLICIT_DEF
|
|
|
|
|
; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX10: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4294963201, implicit $exec
|
|
|
|
|
; GFX10: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 -1, implicit $exec
|
|
|
|
|
; GFX10: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
|
|
|
|
|
; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
|
|
|
|
|
; GFX10: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
|
|
|
|
|
; GFX10: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
|
|
|
|
|
; GFX10: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
|
|
|
|
|
; GFX10: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_32_xm0_xexec = V_ADD_I32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
|
|
|
|
|
; GFX10: %9:vgpr_32, dead %11:sreg_32_xm0_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
|
|
|
|
|
; GFX10: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %9, %subreg.sub1
|
|
|
|
|
; GFX10: [[FLAT_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = FLAT_LOAD_UBYTE [[REG_SEQUENCE1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 1)
|
|
|
|
|
; GFX10: $vgpr0 = COPY [[FLAT_LOAD_UBYTE]]
|
|
|
|
|
%0:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
%1:vgpr(s64) = G_CONSTANT i64 -4095
|
|
|
|
|
%2:vgpr(p1) = G_GEP %0, %1
|
|
|
|
|
%3:vgpr(s32) = G_LOAD %2 :: (load 1, align 1, addrspace 0)
|
|
|
|
|
$vgpr0 = COPY %3
|
|
|
|
|
|
|
|
|
|
...
|
|
|
|
|
|
|
|
|
|
---
|
|
|
|
|
|
|
|
|
|
name: load_flat_s32_from_1_gep_m4096
|
|
|
|
|
legalized: true
|
|
|
|
|
regBankSelected: true
|
|
|
|
|
tracksRegLiveness: true
|
|
|
|
|
|
|
|
|
|
body: |
|
|
|
|
|
bb.0:
|
|
|
|
|
liveins: $vgpr0_vgpr1
|
|
|
|
|
|
|
|
|
|
; GFX7-LABEL: name: load_flat_s32_from_1_gep_m4096
|
|
|
|
|
; GFX7: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX7: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX7: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4294963200, implicit $exec
|
|
|
|
|
; GFX7: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 -1, implicit $exec
|
|
|
|
|
; GFX7: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
|
|
|
|
|
; GFX7: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
|
|
|
|
|
; GFX7: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
|
|
|
|
|
; GFX7: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
|
|
|
|
|
; GFX7: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
|
|
|
|
|
; GFX7: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_I32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
|
|
|
|
|
; GFX7: %9:vgpr_32, dead %11:sreg_64_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
|
|
|
|
|
; GFX7: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %9, %subreg.sub1
|
|
|
|
|
; GFX7: [[FLAT_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = FLAT_LOAD_UBYTE [[REG_SEQUENCE1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 1)
|
|
|
|
|
; GFX7: $vgpr0 = COPY [[FLAT_LOAD_UBYTE]]
|
|
|
|
|
; GFX8-LABEL: name: load_flat_s32_from_1_gep_m4096
|
|
|
|
|
; GFX8: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX8: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX8: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4294963200, implicit $exec
|
|
|
|
|
; GFX8: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 -1, implicit $exec
|
|
|
|
|
; GFX8: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
|
|
|
|
|
; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
|
|
|
|
|
; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
|
|
|
|
|
; GFX8: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
|
|
|
|
|
; GFX8: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
|
|
|
|
|
; GFX8: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_I32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
|
|
|
|
|
; GFX8: %9:vgpr_32, dead %11:sreg_64_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
|
|
|
|
|
; GFX8: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %9, %subreg.sub1
|
|
|
|
|
; GFX8: [[FLAT_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = FLAT_LOAD_UBYTE [[REG_SEQUENCE1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 1)
|
|
|
|
|
; GFX8: $vgpr0 = COPY [[FLAT_LOAD_UBYTE]]
|
|
|
|
|
; GFX9-LABEL: name: load_flat_s32_from_1_gep_m4096
|
|
|
|
|
; GFX9: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX9: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX9: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4294963200, implicit $exec
|
|
|
|
|
; GFX9: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 -1, implicit $exec
|
|
|
|
|
; GFX9: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
|
|
|
|
|
; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
|
|
|
|
|
; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
|
|
|
|
|
; GFX9: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
|
|
|
|
|
; GFX9: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
|
|
|
|
|
; GFX9: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_I32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
|
|
|
|
|
; GFX9: %9:vgpr_32, dead %11:sreg_64_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
|
|
|
|
|
; GFX9: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %9, %subreg.sub1
|
|
|
|
|
; GFX9: [[FLAT_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = FLAT_LOAD_UBYTE [[REG_SEQUENCE1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 1)
|
|
|
|
|
; GFX9: $vgpr0 = COPY [[FLAT_LOAD_UBYTE]]
|
|
|
|
|
; GFX10-LABEL: name: load_flat_s32_from_1_gep_m4096
|
|
|
|
|
; GFX10: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX10: $vcc_hi = IMPLICIT_DEF
|
|
|
|
|
; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX10: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4294963200, implicit $exec
|
|
|
|
|
; GFX10: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 -1, implicit $exec
|
|
|
|
|
; GFX10: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
|
|
|
|
|
; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
|
|
|
|
|
; GFX10: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
|
|
|
|
|
; GFX10: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
|
|
|
|
|
; GFX10: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
|
|
|
|
|
; GFX10: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_32_xm0_xexec = V_ADD_I32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
|
|
|
|
|
; GFX10: %9:vgpr_32, dead %11:sreg_32_xm0_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
|
|
|
|
|
; GFX10: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %9, %subreg.sub1
|
|
|
|
|
; GFX10: [[FLAT_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = FLAT_LOAD_UBYTE [[REG_SEQUENCE1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 1)
|
|
|
|
|
; GFX10: $vgpr0 = COPY [[FLAT_LOAD_UBYTE]]
|
|
|
|
|
%0:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
%1:vgpr(s64) = G_CONSTANT i64 -4096
|
|
|
|
|
%2:vgpr(p1) = G_GEP %0, %1
|
|
|
|
|
%3:vgpr(s32) = G_LOAD %2 :: (load 1, align 1, addrspace 0)
|
|
|
|
|
$vgpr0 = COPY %3
|
|
|
|
|
|
|
|
|
|
...
|
|
|
|
|
|
|
|
|
|
---
|
|
|
|
|
|
|
|
|
|
name: load_flat_s32_from_1_gep_8191
|
|
|
|
|
legalized: true
|
|
|
|
|
regBankSelected: true
|
|
|
|
|
tracksRegLiveness: true
|
|
|
|
|
|
|
|
|
|
body: |
|
|
|
|
|
bb.0:
|
|
|
|
|
liveins: $vgpr0_vgpr1
|
|
|
|
|
|
|
|
|
|
; GFX7-LABEL: name: load_flat_s32_from_1_gep_8191
|
|
|
|
|
; GFX7: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX7: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX7: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 8191, implicit $exec
|
|
|
|
|
; GFX7: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
|
|
|
|
|
; GFX7: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
|
|
|
|
|
; GFX7: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
|
|
|
|
|
; GFX7: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
|
|
|
|
|
; GFX7: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
|
|
|
|
|
; GFX7: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
|
|
|
|
|
; GFX7: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_I32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
|
|
|
|
|
; GFX7: %9:vgpr_32, dead %11:sreg_64_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
|
|
|
|
|
; GFX7: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %9, %subreg.sub1
|
|
|
|
|
; GFX7: [[FLAT_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = FLAT_LOAD_UBYTE [[REG_SEQUENCE1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 1)
|
|
|
|
|
; GFX7: $vgpr0 = COPY [[FLAT_LOAD_UBYTE]]
|
|
|
|
|
; GFX8-LABEL: name: load_flat_s32_from_1_gep_8191
|
|
|
|
|
; GFX8: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX8: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX8: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 8191, implicit $exec
|
|
|
|
|
; GFX8: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
|
|
|
|
|
; GFX8: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
|
|
|
|
|
; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
|
|
|
|
|
; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
|
|
|
|
|
; GFX8: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
|
|
|
|
|
; GFX8: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
|
|
|
|
|
; GFX8: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_I32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
|
|
|
|
|
; GFX8: %9:vgpr_32, dead %11:sreg_64_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
|
|
|
|
|
; GFX8: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %9, %subreg.sub1
|
|
|
|
|
; GFX8: [[FLAT_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = FLAT_LOAD_UBYTE [[REG_SEQUENCE1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 1)
|
|
|
|
|
; GFX8: $vgpr0 = COPY [[FLAT_LOAD_UBYTE]]
|
|
|
|
|
; GFX9-LABEL: name: load_flat_s32_from_1_gep_8191
|
|
|
|
|
; GFX9: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX9: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX9: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 8191, implicit $exec
|
|
|
|
|
; GFX9: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
|
|
|
|
|
; GFX9: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
|
|
|
|
|
; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
|
|
|
|
|
; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
|
|
|
|
|
; GFX9: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
|
|
|
|
|
; GFX9: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
|
|
|
|
|
; GFX9: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_I32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
|
|
|
|
|
; GFX9: %9:vgpr_32, dead %11:sreg_64_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
|
|
|
|
|
; GFX9: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %9, %subreg.sub1
|
|
|
|
|
; GFX9: [[FLAT_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = FLAT_LOAD_UBYTE [[REG_SEQUENCE1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 1)
|
|
|
|
|
; GFX9: $vgpr0 = COPY [[FLAT_LOAD_UBYTE]]
|
|
|
|
|
; GFX10-LABEL: name: load_flat_s32_from_1_gep_8191
|
|
|
|
|
; GFX10: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX10: $vcc_hi = IMPLICIT_DEF
|
|
|
|
|
; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX10: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 8191, implicit $exec
|
|
|
|
|
; GFX10: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
|
|
|
|
|
; GFX10: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
|
|
|
|
|
; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
|
|
|
|
|
; GFX10: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
|
|
|
|
|
; GFX10: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
|
|
|
|
|
; GFX10: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
|
|
|
|
|
; GFX10: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_32_xm0_xexec = V_ADD_I32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
|
|
|
|
|
; GFX10: %9:vgpr_32, dead %11:sreg_32_xm0_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
|
|
|
|
|
; GFX10: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %9, %subreg.sub1
|
|
|
|
|
; GFX10: [[FLAT_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = FLAT_LOAD_UBYTE [[REG_SEQUENCE1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 1)
|
|
|
|
|
; GFX10: $vgpr0 = COPY [[FLAT_LOAD_UBYTE]]
|
|
|
|
|
%0:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
%1:vgpr(s64) = G_CONSTANT i64 8191
|
|
|
|
|
%2:vgpr(p1) = G_GEP %0, %1
|
|
|
|
|
%3:vgpr(s32) = G_LOAD %2 :: (load 1, align 1, addrspace 0)
|
|
|
|
|
$vgpr0 = COPY %3
|
Re-commit AMDGPU/GlobalISel: Add support for simple shaders
Fix build when global-isel is disabled and fix a warning.
Summary: We can select constant/global G_LOAD, global G_STORE, and G_GEP.
Reviewers: qcolombet, MatzeB, t.p.northover, ab, arsenm
Subscribers: mehdi_amini, vkalintiris, kzhuravl, wdng, nhaehnle, mgorny, yaxunl, tony-tye, modocache, llvm-commits, dberris
Differential Revision: https://reviews.llvm.org/D26730
llvm-svn: 293551
2017-01-31 05:56:46 +08:00
|
|
|
|
|
|
|
|
...
|
2019-07-17 02:05:29 +08:00
|
|
|
|
Re-commit AMDGPU/GlobalISel: Add support for simple shaders
Fix build when global-isel is disabled and fix a warning.
Summary: We can select constant/global G_LOAD, global G_STORE, and G_GEP.
Reviewers: qcolombet, MatzeB, t.p.northover, ab, arsenm
Subscribers: mehdi_amini, vkalintiris, kzhuravl, wdng, nhaehnle, mgorny, yaxunl, tony-tye, modocache, llvm-commits, dberris
Differential Revision: https://reviews.llvm.org/D26730
llvm-svn: 293551
2017-01-31 05:56:46 +08:00
|
|
|
---
|
|
|
|
|
|
2019-07-17 02:05:29 +08:00
|
|
|
name: load_flat_s32_from_1_gep_8192
|
Re-commit AMDGPU/GlobalISel: Add support for simple shaders
Fix build when global-isel is disabled and fix a warning.
Summary: We can select constant/global G_LOAD, global G_STORE, and G_GEP.
Reviewers: qcolombet, MatzeB, t.p.northover, ab, arsenm
Subscribers: mehdi_amini, vkalintiris, kzhuravl, wdng, nhaehnle, mgorny, yaxunl, tony-tye, modocache, llvm-commits, dberris
Differential Revision: https://reviews.llvm.org/D26730
llvm-svn: 293551
2017-01-31 05:56:46 +08:00
|
|
|
legalized: true
|
|
|
|
|
regBankSelected: true
|
2019-07-17 02:05:29 +08:00
|
|
|
tracksRegLiveness: true
|
|
|
|
|
|
|
|
|
|
body: |
|
|
|
|
|
bb.0:
|
|
|
|
|
liveins: $vgpr0_vgpr1
|
|
|
|
|
|
|
|
|
|
; GFX7-LABEL: name: load_flat_s32_from_1_gep_8192
|
|
|
|
|
; GFX7: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX7: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX7: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 8192, implicit $exec
|
|
|
|
|
; GFX7: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
|
|
|
|
|
; GFX7: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
|
|
|
|
|
; GFX7: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
|
|
|
|
|
; GFX7: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
|
|
|
|
|
; GFX7: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
|
|
|
|
|
; GFX7: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
|
|
|
|
|
; GFX7: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_I32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
|
|
|
|
|
; GFX7: %9:vgpr_32, dead %11:sreg_64_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
|
|
|
|
|
; GFX7: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %9, %subreg.sub1
|
|
|
|
|
; GFX7: [[FLAT_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = FLAT_LOAD_UBYTE [[REG_SEQUENCE1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 1)
|
|
|
|
|
; GFX7: $vgpr0 = COPY [[FLAT_LOAD_UBYTE]]
|
|
|
|
|
; GFX8-LABEL: name: load_flat_s32_from_1_gep_8192
|
|
|
|
|
; GFX8: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX8: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX8: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 8192, implicit $exec
|
|
|
|
|
; GFX8: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
|
|
|
|
|
; GFX8: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
|
|
|
|
|
; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
|
|
|
|
|
; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
|
|
|
|
|
; GFX8: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
|
|
|
|
|
; GFX8: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
|
|
|
|
|
; GFX8: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_I32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
|
|
|
|
|
; GFX8: %9:vgpr_32, dead %11:sreg_64_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
|
|
|
|
|
; GFX8: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %9, %subreg.sub1
|
|
|
|
|
; GFX8: [[FLAT_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = FLAT_LOAD_UBYTE [[REG_SEQUENCE1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 1)
|
|
|
|
|
; GFX8: $vgpr0 = COPY [[FLAT_LOAD_UBYTE]]
|
|
|
|
|
; GFX9-LABEL: name: load_flat_s32_from_1_gep_8192
|
|
|
|
|
; GFX9: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX9: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX9: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 8192, implicit $exec
|
|
|
|
|
; GFX9: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
|
|
|
|
|
; GFX9: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
|
|
|
|
|
; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
|
|
|
|
|
; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
|
|
|
|
|
; GFX9: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
|
|
|
|
|
; GFX9: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
|
|
|
|
|
; GFX9: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_I32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
|
|
|
|
|
; GFX9: %9:vgpr_32, dead %11:sreg_64_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
|
|
|
|
|
; GFX9: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %9, %subreg.sub1
|
|
|
|
|
; GFX9: [[FLAT_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = FLAT_LOAD_UBYTE [[REG_SEQUENCE1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 1)
|
|
|
|
|
; GFX9: $vgpr0 = COPY [[FLAT_LOAD_UBYTE]]
|
|
|
|
|
; GFX10-LABEL: name: load_flat_s32_from_1_gep_8192
|
|
|
|
|
; GFX10: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX10: $vcc_hi = IMPLICIT_DEF
|
|
|
|
|
; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX10: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 8192, implicit $exec
|
|
|
|
|
; GFX10: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
|
|
|
|
|
; GFX10: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
|
|
|
|
|
; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
|
|
|
|
|
; GFX10: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
|
|
|
|
|
; GFX10: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
|
|
|
|
|
; GFX10: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
|
|
|
|
|
; GFX10: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_32_xm0_xexec = V_ADD_I32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
|
|
|
|
|
; GFX10: %9:vgpr_32, dead %11:sreg_32_xm0_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
|
|
|
|
|
; GFX10: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %9, %subreg.sub1
|
|
|
|
|
; GFX10: [[FLAT_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = FLAT_LOAD_UBYTE [[REG_SEQUENCE1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 1)
|
|
|
|
|
; GFX10: $vgpr0 = COPY [[FLAT_LOAD_UBYTE]]
|
|
|
|
|
%0:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
%1:vgpr(s64) = G_CONSTANT i64 8192
|
|
|
|
|
%2:vgpr(p1) = G_GEP %0, %1
|
|
|
|
|
%3:vgpr(s32) = G_LOAD %2 :: (load 1, align 1, addrspace 0)
|
|
|
|
|
$vgpr0 = COPY %3
|
Re-commit AMDGPU/GlobalISel: Add support for simple shaders
Fix build when global-isel is disabled and fix a warning.
Summary: We can select constant/global G_LOAD, global G_STORE, and G_GEP.
Reviewers: qcolombet, MatzeB, t.p.northover, ab, arsenm
Subscribers: mehdi_amini, vkalintiris, kzhuravl, wdng, nhaehnle, mgorny, yaxunl, tony-tye, modocache, llvm-commits, dberris
Differential Revision: https://reviews.llvm.org/D26730
llvm-svn: 293551
2017-01-31 05:56:46 +08:00
|
|
|
|
2019-07-17 02:05:29 +08:00
|
|
|
...
|
|
|
|
|
|
|
|
|
|
---
|
|
|
|
|
|
|
|
|
|
name: load_flat_s32_from_1_gep_m8191
|
|
|
|
|
legalized: true
|
|
|
|
|
regBankSelected: true
|
|
|
|
|
tracksRegLiveness: true
|
Re-commit AMDGPU/GlobalISel: Add support for simple shaders
Fix build when global-isel is disabled and fix a warning.
Summary: We can select constant/global G_LOAD, global G_STORE, and G_GEP.
Reviewers: qcolombet, MatzeB, t.p.northover, ab, arsenm
Subscribers: mehdi_amini, vkalintiris, kzhuravl, wdng, nhaehnle, mgorny, yaxunl, tony-tye, modocache, llvm-commits, dberris
Differential Revision: https://reviews.llvm.org/D26730
llvm-svn: 293551
2017-01-31 05:56:46 +08:00
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body: |
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bb.0:
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2018-02-01 06:04:26 +08:00
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liveins: $vgpr0_vgpr1
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Re-commit AMDGPU/GlobalISel: Add support for simple shaders
Fix build when global-isel is disabled and fix a warning.
Summary: We can select constant/global G_LOAD, global G_STORE, and G_GEP.
Reviewers: qcolombet, MatzeB, t.p.northover, ab, arsenm
Subscribers: mehdi_amini, vkalintiris, kzhuravl, wdng, nhaehnle, mgorny, yaxunl, tony-tye, modocache, llvm-commits, dberris
Differential Revision: https://reviews.llvm.org/D26730
llvm-svn: 293551
2017-01-31 05:56:46 +08:00
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2019-07-17 02:05:29 +08:00
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; GFX7-LABEL: name: load_flat_s32_from_1_gep_m8191
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; GFX7: liveins: $vgpr0_vgpr1
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; GFX7: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; GFX7: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4294959105, implicit $exec
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; GFX7: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 -1, implicit $exec
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; GFX7: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
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; GFX7: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
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; GFX7: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
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; GFX7: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
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; GFX7: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
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; GFX7: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_I32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
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; GFX7: %9:vgpr_32, dead %11:sreg_64_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
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; GFX7: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %9, %subreg.sub1
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; GFX7: [[FLAT_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = FLAT_LOAD_UBYTE [[REG_SEQUENCE1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 1)
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; GFX7: $vgpr0 = COPY [[FLAT_LOAD_UBYTE]]
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; GFX8-LABEL: name: load_flat_s32_from_1_gep_m8191
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; GFX8: liveins: $vgpr0_vgpr1
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; GFX8: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; GFX8: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4294959105, implicit $exec
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; GFX8: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 -1, implicit $exec
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; GFX8: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
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; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
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; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
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; GFX8: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
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; GFX8: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
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; GFX8: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_I32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
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; GFX8: %9:vgpr_32, dead %11:sreg_64_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
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; GFX8: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %9, %subreg.sub1
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; GFX8: [[FLAT_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = FLAT_LOAD_UBYTE [[REG_SEQUENCE1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 1)
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; GFX8: $vgpr0 = COPY [[FLAT_LOAD_UBYTE]]
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; GFX9-LABEL: name: load_flat_s32_from_1_gep_m8191
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; GFX9: liveins: $vgpr0_vgpr1
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; GFX9: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; GFX9: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4294959105, implicit $exec
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; GFX9: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 -1, implicit $exec
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; GFX9: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
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; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
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; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
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; GFX9: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
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; GFX9: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
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; GFX9: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_I32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
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; GFX9: %9:vgpr_32, dead %11:sreg_64_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
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; GFX9: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %9, %subreg.sub1
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; GFX9: [[FLAT_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = FLAT_LOAD_UBYTE [[REG_SEQUENCE1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 1)
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; GFX9: $vgpr0 = COPY [[FLAT_LOAD_UBYTE]]
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; GFX10-LABEL: name: load_flat_s32_from_1_gep_m8191
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; GFX10: liveins: $vgpr0_vgpr1
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; GFX10: $vcc_hi = IMPLICIT_DEF
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; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; GFX10: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4294959105, implicit $exec
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; GFX10: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 -1, implicit $exec
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; GFX10: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
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; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
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; GFX10: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
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; GFX10: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
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; GFX10: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
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; GFX10: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_32_xm0_xexec = V_ADD_I32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
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; GFX10: %9:vgpr_32, dead %11:sreg_32_xm0_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
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; GFX10: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %9, %subreg.sub1
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; GFX10: [[FLAT_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = FLAT_LOAD_UBYTE [[REG_SEQUENCE1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 1)
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; GFX10: $vgpr0 = COPY [[FLAT_LOAD_UBYTE]]
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2018-02-01 06:04:26 +08:00
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%0:vgpr(p1) = COPY $vgpr0_vgpr1
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2019-07-17 02:05:29 +08:00
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%1:vgpr(s64) = G_CONSTANT i64 -8191
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%2:vgpr(p1) = G_GEP %0, %1
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%3:vgpr(s32) = G_LOAD %2 :: (load 1, align 1, addrspace 0)
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$vgpr0 = COPY %3
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...
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---
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name: load_flat_s32_from_1_gep_m8192
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; GFX7-LABEL: name: load_flat_s32_from_1_gep_m8192
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; GFX7: liveins: $vgpr0_vgpr1
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; GFX7: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; GFX7: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4294959104, implicit $exec
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; GFX7: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 -1, implicit $exec
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; GFX7: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
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; GFX7: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
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; GFX7: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
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; GFX7: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
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; GFX7: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
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; GFX7: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_I32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
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; GFX7: %9:vgpr_32, dead %11:sreg_64_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
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; GFX7: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %9, %subreg.sub1
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; GFX7: [[FLAT_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = FLAT_LOAD_UBYTE [[REG_SEQUENCE1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 1)
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; GFX7: $vgpr0 = COPY [[FLAT_LOAD_UBYTE]]
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; GFX8-LABEL: name: load_flat_s32_from_1_gep_m8192
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; GFX8: liveins: $vgpr0_vgpr1
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; GFX8: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; GFX8: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4294959104, implicit $exec
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; GFX8: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 -1, implicit $exec
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; GFX8: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
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; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
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; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
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; GFX8: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
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; GFX8: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
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; GFX8: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_I32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
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; GFX8: %9:vgpr_32, dead %11:sreg_64_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
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; GFX8: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %9, %subreg.sub1
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; GFX8: [[FLAT_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = FLAT_LOAD_UBYTE [[REG_SEQUENCE1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 1)
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; GFX8: $vgpr0 = COPY [[FLAT_LOAD_UBYTE]]
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; GFX9-LABEL: name: load_flat_s32_from_1_gep_m8192
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; GFX9: liveins: $vgpr0_vgpr1
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; GFX9: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; GFX9: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4294959104, implicit $exec
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; GFX9: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 -1, implicit $exec
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; GFX9: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
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; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
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; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
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; GFX9: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
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; GFX9: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
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; GFX9: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_I32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
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; GFX9: %9:vgpr_32, dead %11:sreg_64_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
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; GFX9: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %9, %subreg.sub1
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; GFX9: [[FLAT_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = FLAT_LOAD_UBYTE [[REG_SEQUENCE1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 1)
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; GFX9: $vgpr0 = COPY [[FLAT_LOAD_UBYTE]]
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; GFX10-LABEL: name: load_flat_s32_from_1_gep_m8192
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; GFX10: liveins: $vgpr0_vgpr1
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; GFX10: $vcc_hi = IMPLICIT_DEF
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; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; GFX10: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4294959104, implicit $exec
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; GFX10: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 -1, implicit $exec
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; GFX10: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
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; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
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; GFX10: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
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; GFX10: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
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; GFX10: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
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; GFX10: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_32_xm0_xexec = V_ADD_I32_e64 [[COPY1]], [[COPY2]], 0, implicit $exec
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; GFX10: %9:vgpr_32, dead %11:sreg_32_xm0_xexec = V_ADDC_U32_e64 [[COPY3]], [[COPY4]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
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; GFX10: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %9, %subreg.sub1
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; GFX10: [[FLAT_LOAD_UBYTE:%[0-9]+]]:vgpr_32 = FLAT_LOAD_UBYTE [[REG_SEQUENCE1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 1)
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; GFX10: $vgpr0 = COPY [[FLAT_LOAD_UBYTE]]
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%0:vgpr(p1) = COPY $vgpr0_vgpr1
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%1:vgpr(s64) = G_CONSTANT i64 -8192
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%2:vgpr(p1) = G_GEP %0, %1
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%3:vgpr(s32) = G_LOAD %2 :: (load 1, align 1, addrspace 0)
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$vgpr0 = COPY %3
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...
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|
---
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name: load_atomic_flat_s32
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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|
|
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; GFX7-LABEL: name: load_atomic_flat_s32
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; GFX7: liveins: $vgpr0_vgpr1
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; GFX7: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
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; GFX7: [[LOAD:%[0-9]+]]:vgpr_32(s32) = G_LOAD [[COPY]](p1) :: (load monotonic 4)
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; GFX7: $vgpr0 = COPY [[LOAD]](s32)
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|
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; GFX8-LABEL: name: load_atomic_flat_s32
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; GFX8: liveins: $vgpr0_vgpr1
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; GFX8: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
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; GFX8: [[LOAD:%[0-9]+]]:vgpr_32(s32) = G_LOAD [[COPY]](p1) :: (load monotonic 4)
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; GFX8: $vgpr0 = COPY [[LOAD]](s32)
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|
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; GFX9-LABEL: name: load_atomic_flat_s32
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; GFX9: liveins: $vgpr0_vgpr1
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; GFX9: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
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; GFX9: [[LOAD:%[0-9]+]]:vgpr_32(s32) = G_LOAD [[COPY]](p1) :: (load monotonic 4)
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; GFX9: $vgpr0 = COPY [[LOAD]](s32)
|
|
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; GFX10-LABEL: name: load_atomic_flat_s32
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; GFX10: liveins: $vgpr0_vgpr1
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; GFX10: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
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; GFX10: [[LOAD:%[0-9]+]]:vgpr_32(s32) = G_LOAD [[COPY]](p1) :: (load monotonic 4)
|
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; GFX10: $vgpr0 = COPY [[LOAD]](s32)
|
|
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|
%0:vgpr(p1) = COPY $vgpr0_vgpr1
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|
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|
|
%1:vgpr(s32) = G_LOAD %0 :: (load monotonic 4, align 4, addrspace 0)
|
2018-02-01 06:04:26 +08:00
|
|
|
$vgpr0 = COPY %1
|
Re-commit AMDGPU/GlobalISel: Add support for simple shaders
Fix build when global-isel is disabled and fix a warning.
Summary: We can select constant/global G_LOAD, global G_STORE, and G_GEP.
Reviewers: qcolombet, MatzeB, t.p.northover, ab, arsenm
Subscribers: mehdi_amini, vkalintiris, kzhuravl, wdng, nhaehnle, mgorny, yaxunl, tony-tye, modocache, llvm-commits, dberris
Differential Revision: https://reviews.llvm.org/D26730
llvm-svn: 293551
2017-01-31 05:56:46 +08:00
|
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|
|
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|
...
|
2019-07-17 02:05:29 +08:00
|
|
|
|
Re-commit AMDGPU/GlobalISel: Add support for simple shaders
Fix build when global-isel is disabled and fix a warning.
Summary: We can select constant/global G_LOAD, global G_STORE, and G_GEP.
Reviewers: qcolombet, MatzeB, t.p.northover, ab, arsenm
Subscribers: mehdi_amini, vkalintiris, kzhuravl, wdng, nhaehnle, mgorny, yaxunl, tony-tye, modocache, llvm-commits, dberris
Differential Revision: https://reviews.llvm.org/D26730
llvm-svn: 293551
2017-01-31 05:56:46 +08:00
|
|
|
---
|
2019-07-17 02:05:29 +08:00
|
|
|
|
|
|
|
|
name: load_atomic_flat_s64
|
|
|
|
|
legalized: true
|
|
|
|
|
regBankSelected: true
|
|
|
|
|
tracksRegLiveness: true
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
body: |
|
|
|
|
|
bb.0:
|
|
|
|
|
liveins: $vgpr0_vgpr1
|
|
|
|
|
|
|
|
|
|
; GFX7-LABEL: name: load_atomic_flat_s64
|
|
|
|
|
; GFX7: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX7: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX7: [[LOAD:%[0-9]+]]:vreg_64(s64) = G_LOAD [[COPY]](p1) :: (load monotonic 8)
|
|
|
|
|
; GFX7: $vgpr0_vgpr1 = COPY [[LOAD]](s64)
|
|
|
|
|
; GFX8-LABEL: name: load_atomic_flat_s64
|
|
|
|
|
; GFX8: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX8: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX8: [[LOAD:%[0-9]+]]:vreg_64(s64) = G_LOAD [[COPY]](p1) :: (load monotonic 8)
|
|
|
|
|
; GFX8: $vgpr0_vgpr1 = COPY [[LOAD]](s64)
|
|
|
|
|
; GFX9-LABEL: name: load_atomic_flat_s64
|
|
|
|
|
; GFX9: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX9: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX9: [[LOAD:%[0-9]+]]:vreg_64(s64) = G_LOAD [[COPY]](p1) :: (load monotonic 8)
|
|
|
|
|
; GFX9: $vgpr0_vgpr1 = COPY [[LOAD]](s64)
|
|
|
|
|
; GFX10-LABEL: name: load_atomic_flat_s64
|
|
|
|
|
; GFX10: liveins: $vgpr0_vgpr1
|
|
|
|
|
; GFX10: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
; GFX10: [[LOAD:%[0-9]+]]:vreg_64(s64) = G_LOAD [[COPY]](p1) :: (load monotonic 8)
|
|
|
|
|
; GFX10: $vgpr0_vgpr1 = COPY [[LOAD]](s64)
|
|
|
|
|
%0:vgpr(p1) = COPY $vgpr0_vgpr1
|
|
|
|
|
%1:vgpr(s64) = G_LOAD %0 :: (load monotonic 8, align 8, addrspace 0)
|
|
|
|
|
$vgpr0_vgpr1 = COPY %1
|
|
|
|
|
|
|
|
|
|
...
|
