2011-01-23 16:27:54 +08:00
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; RUN: opt %s -scalarrepl -S | FileCheck %s
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; Test promotion of allocas that have phis and select users.
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
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target triple = "x86_64-apple-darwin10.2"
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%struct.X = type { i32 }
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%PairTy = type {i32, i32}
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; CHECK: @test1
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; CHECK: %a.0 = alloca i32
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; CHECK: %b.0 = alloca i32
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define i32 @test1(i32 %x) nounwind readnone ssp {
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entry:
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%a = alloca %struct.X, align 8 ; <%struct.X*> [#uses=2]
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%b = alloca %struct.X, align 8 ; <%struct.X*> [#uses=2]
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%0 = getelementptr inbounds %struct.X* %a, i64 0, i32 0 ; <i32*> [#uses=1]
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store i32 1, i32* %0, align 8
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%1 = getelementptr inbounds %struct.X* %b, i64 0, i32 0 ; <i32*> [#uses=1]
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store i32 2, i32* %1, align 8
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%2 = icmp eq i32 %x, 0 ; <i1> [#uses=1]
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%p.0 = select i1 %2, %struct.X* %b, %struct.X* %a ; <%struct.X*> [#uses=1]
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%3 = getelementptr inbounds %struct.X* %p.0, i64 0, i32 0 ; <i32*> [#uses=1]
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%4 = load i32* %3, align 8 ; <i32> [#uses=1]
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ret i32 %4
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}
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; CHECK: @test2
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2011-01-24 09:07:11 +08:00
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; CHECK: %X.ld = phi i32 [ 1, %entry ], [ 2, %T ]
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; CHECK-NEXT: ret i32 %X.ld
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2011-01-23 16:27:54 +08:00
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define i32 @test2(i1 %c) {
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entry:
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%A = alloca {i32, i32}
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%B = getelementptr {i32, i32}* %A, i32 0, i32 0
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store i32 1, i32* %B
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br i1 %c, label %T, label %F
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T:
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%C = getelementptr {i32, i32}* %A, i32 0, i32 1
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2011-01-24 09:07:11 +08:00
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store i32 2, i32* %C
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2011-01-23 16:27:54 +08:00
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br label %F
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F:
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%X = phi i32* [%B, %entry], [%C, %T]
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%Q = load i32* %X
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ret i32 %Q
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}
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; CHECK: @test3
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Enhance SRoA to promote allocas that are used by selects in some
common cases. This triggers a surprising number of times in SPEC2K6
because min/max idioms end up doing this. For example, code from the
STL ends up looking like this to SRoA:
%202 = load i64* %__old_size, align 8, !tbaa !3
%203 = load i64* %__old_size, align 8, !tbaa !3
%204 = load i64* %__n, align 8, !tbaa !3
%205 = icmp ult i64 %203, %204
%storemerge.i = select i1 %205, i64* %__n, i64* %__old_size
%206 = load i64* %storemerge.i, align 8, !tbaa !3
We can now promote both the __n and the __old_size allocas.
This addresses another chunk of rdar://7339113, poor codegen on
stringswitch.
llvm-svn: 124088
2011-01-24 06:04:55 +08:00
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; CHECK-NEXT: %Q = select i1 %c, i32 1, i32 2
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; CHECK-NEXT: ret i32 %Q
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2011-01-23 16:27:54 +08:00
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; rdar://8904039
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define i32 @test3(i1 %c) {
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%A = alloca {i32, i32}
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%B = getelementptr {i32, i32}* %A, i32 0, i32 0
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store i32 1, i32* %B
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%C = getelementptr {i32, i32}* %A, i32 0, i32 1
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Enhance SRoA to promote allocas that are used by selects in some
common cases. This triggers a surprising number of times in SPEC2K6
because min/max idioms end up doing this. For example, code from the
STL ends up looking like this to SRoA:
%202 = load i64* %__old_size, align 8, !tbaa !3
%203 = load i64* %__old_size, align 8, !tbaa !3
%204 = load i64* %__n, align 8, !tbaa !3
%205 = icmp ult i64 %203, %204
%storemerge.i = select i1 %205, i64* %__n, i64* %__old_size
%206 = load i64* %storemerge.i, align 8, !tbaa !3
We can now promote both the __n and the __old_size allocas.
This addresses another chunk of rdar://7339113, poor codegen on
stringswitch.
llvm-svn: 124088
2011-01-24 06:04:55 +08:00
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store i32 2, i32* %C
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2011-01-23 16:27:54 +08:00
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%X = select i1 %c, i32* %B, i32* %C
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%Q = load i32* %X
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ret i32 %Q
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}
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;; We can't scalarize this, a use of the select is not an element access.
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define i64 @test4(i1 %c) {
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entry:
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%A = alloca %PairTy
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; CHECK: @test4
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; CHECK: %A = alloca %PairTy
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Land the long talked about "type system rewrite" patch. This
patch brings numerous advantages to LLVM. One way to look at it
is through diffstat:
109 files changed, 3005 insertions(+), 5906 deletions(-)
Removing almost 3K lines of code is a good thing. Other advantages
include:
1. Value::getType() is a simple load that can be CSE'd, not a mutating
union-find operation.
2. Types a uniqued and never move once created, defining away PATypeHolder.
3. Structs can be "named" now, and their name is part of the identity that
uniques them. This means that the compiler doesn't merge them structurally
which makes the IR much less confusing.
4. Now that there is no way to get a cycle in a type graph without a named
struct type, "upreferences" go away.
5. Type refinement is completely gone, which should make LTO much MUCH faster
in some common cases with C++ code.
6. Types are now generally immutable, so we can use "Type *" instead
"const Type *" everywhere.
Downsides of this patch are that it removes some functions from the C API,
so people using those will have to upgrade to (not yet added) new API.
"LLVM 3.0" is the right time to do this.
There are still some cleanups pending after this, this patch is large enough
as-is.
llvm-svn: 134829
2011-07-10 01:41:24 +08:00
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%B = getelementptr %PairTy* %A, i32 0, i32 0
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2011-01-23 16:27:54 +08:00
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store i32 1, i32* %B
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Land the long talked about "type system rewrite" patch. This
patch brings numerous advantages to LLVM. One way to look at it
is through diffstat:
109 files changed, 3005 insertions(+), 5906 deletions(-)
Removing almost 3K lines of code is a good thing. Other advantages
include:
1. Value::getType() is a simple load that can be CSE'd, not a mutating
union-find operation.
2. Types a uniqued and never move once created, defining away PATypeHolder.
3. Structs can be "named" now, and their name is part of the identity that
uniques them. This means that the compiler doesn't merge them structurally
which makes the IR much less confusing.
4. Now that there is no way to get a cycle in a type graph without a named
struct type, "upreferences" go away.
5. Type refinement is completely gone, which should make LTO much MUCH faster
in some common cases with C++ code.
6. Types are now generally immutable, so we can use "Type *" instead
"const Type *" everywhere.
Downsides of this patch are that it removes some functions from the C API,
so people using those will have to upgrade to (not yet added) new API.
"LLVM 3.0" is the right time to do this.
There are still some cleanups pending after this, this patch is large enough
as-is.
llvm-svn: 134829
2011-07-10 01:41:24 +08:00
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%C = getelementptr %PairTy* %A, i32 0, i32 1
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2011-01-23 16:27:54 +08:00
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store i32 2, i32* %B
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%X = select i1 %c, i32* %B, i32* %C
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%Y = bitcast i32* %X to i64*
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%Q = load i64* %Y
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ret i64 %Q
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}
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Enhance SRoA to promote allocas that are used by selects in some
common cases. This triggers a surprising number of times in SPEC2K6
because min/max idioms end up doing this. For example, code from the
STL ends up looking like this to SRoA:
%202 = load i64* %__old_size, align 8, !tbaa !3
%203 = load i64* %__old_size, align 8, !tbaa !3
%204 = load i64* %__n, align 8, !tbaa !3
%205 = icmp ult i64 %203, %204
%storemerge.i = select i1 %205, i64* %__n, i64* %__old_size
%206 = load i64* %storemerge.i, align 8, !tbaa !3
We can now promote both the __n and the __old_size allocas.
This addresses another chunk of rdar://7339113, poor codegen on
stringswitch.
llvm-svn: 124088
2011-01-24 06:04:55 +08:00
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;;
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;; Tests for promoting allocas used by selects.
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;; rdar://7339113
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;;
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define i32 @test5(i32 *%P) nounwind readnone ssp {
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entry:
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%b = alloca i32, align 8
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store i32 2, i32* %b, align 8
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;; Select on constant condition should be folded.
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%p.0 = select i1 false, i32* %b, i32* %P
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store i32 123, i32* %p.0
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%r = load i32* %b, align 8
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ret i32 %r
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; CHECK: @test5
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; CHECK: store i32 123, i32* %P
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; CHECK: ret i32 2
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}
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define i32 @test6(i32 %x, i1 %c) nounwind readnone ssp {
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%a = alloca i32, align 8
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%b = alloca i32, align 8
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store i32 1, i32* %a, align 8
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store i32 2, i32* %b, align 8
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%p.0 = select i1 %c, i32* %b, i32* %a
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%r = load i32* %p.0, align 8
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ret i32 %r
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; CHECK: @test6
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; CHECK-NEXT: %r = select i1 %c, i32 2, i32 1
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; CHECK-NEXT: ret i32 %r
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}
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; Verify that the loads happen where the loads are, not where the select is.
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define i32 @test7(i32 %x, i1 %c) nounwind readnone ssp {
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%a = alloca i32, align 8
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%b = alloca i32, align 8
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store i32 1, i32* %a
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store i32 2, i32* %b
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%p.0 = select i1 %c, i32* %b, i32* %a
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store i32 0, i32* %a
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%r = load i32* %p.0, align 8
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ret i32 %r
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; CHECK: @test7
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; CHECK-NOT: alloca i32
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; CHECK: %r = select i1 %c, i32 2, i32 0
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; CHECK: ret i32 %r
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}
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2011-01-24 09:07:11 +08:00
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;; Promote allocs that are PHI'd together by moving the loads.
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define i32 @test8(i32 %x) nounwind readnone ssp {
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; CHECK: @test8
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; CHECK-NOT: load i32
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; CHECK-NOT: store i32
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; CHECK: %p.0.ld = phi i32 [ 2, %entry ], [ 1, %T ]
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; CHECK-NEXT: ret i32 %p.0.ld
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entry:
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%a = alloca i32, align 8
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%b = alloca i32, align 8
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store i32 1, i32* %a, align 8
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store i32 2, i32* %b, align 8
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%c = icmp eq i32 %x, 0
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br i1 %c, label %T, label %Cont
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T:
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br label %Cont
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Cont:
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%p.0 = phi i32* [%b, %entry],[%a, %T]
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%r = load i32* %p.0, align 8
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ret i32 %r
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}
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