forked from OSchip/llvm-project
79 lines
3.2 KiB
C
79 lines
3.2 KiB
C
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//===- PIC16InstrInfo.h - PIC16 Instruction Information----------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the niversity of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the PIC16 implementation of the TargetInstrInfo class.
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//
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//===----------------------------------------------------------------------===//
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#ifndef PIC16INSTRUCTIONINFO_H
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#define PIC16INSTRUCTIONINFO_H
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#include "PIC16.h"
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#include "PIC16RegisterInfo.h"
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#include "llvm/Target/TargetInstrInfo.h"
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namespace llvm {
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class PIC16InstrInfo : public TargetInstrInfoImpl
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{
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PIC16TargetMachine &TM;
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const PIC16RegisterInfo RI;
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public:
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explicit PIC16InstrInfo(PIC16TargetMachine &TM);
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/// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
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/// such, whenever a client has an instance of instruction info, it should
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/// always be able to get register info as well (through this method).
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///
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virtual const TargetRegisterInfo &getRegisterInfo() const { return RI; }
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/// isLoadFromStackSlot - If the specified machine instruction is a direct
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/// load from a stack slot, return the virtual or physical register number of
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/// the destination along with the FrameIndex of the loaded stack slot. If
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/// not, return 0. This predicate must return 0 if the instruction has
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/// any side effects other than loading from the stack slot.
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virtual unsigned isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const;
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/// isStoreToStackSlot - If the specified machine instruction is a direct
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/// store to a stack slot, return the virtual or physical register number of
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/// the source reg along with the FrameIndex of the loaded stack slot. If
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/// not, return 0. This predicate must return 0 if the instruction has
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/// any side effects other than storing to the stack slot.
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virtual unsigned isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) const;
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/// Used for spilling a register
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void storeRegToStackSlot(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI,
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unsigned SrcReg, bool isKill, int FrameIndex,
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const TargetRegisterClass *RC) const;
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void loadRegFromStackSlot(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI,
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unsigned DestReg, int FrameIndex,
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const TargetRegisterClass *RC) const;
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/// InsertBranch - Insert a branch into the end of the specified
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/// MachineBasicBlock. This operands to this method are the same as those
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/// returned by AnalyzeBranch. This is invoked in cases where AnalyzeBranch
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/// returns success and when an unconditional branch (TBB is non-null, FBB is
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/// null, Cond is empty) needs to be inserted. It returns the number of
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/// instructions inserted.
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virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
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MachineBasicBlock *FBB,
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const std::vector<MachineOperand> &Cond) const ;
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};
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} // namespace llvm
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#endif
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