2019-06-26 02:55:16 +08:00
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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[AMDGPU][SimplifyCFG] Teach AMDGPUUnifyDivergentExitNodes to preserve {,Post}DomTree
This is a (last big?) part of the patch series to make SimplifyCFG
preserve DomTree. Currently, it still does not actually preserve it,
even thought it is pretty much fully updated to preserve it.
Once the default is flipped, a valid DomTree must be passed into
simplifyCFG, which means that whatever pass calls simplifyCFG,
should also be smart about DomTree's.
As far as i can see from `check-llvm` with default flipped,
this is the last LLVM test batch (other than bugpoint tests)
that needed fixes to not break with default flipped.
The changes here are boringly identical to the ones i did
over 42+ times/commits recently already,
so while AMDGPU is outside of my normal ecosystem,
i'm going to go for post-commit review here,
like in all the other 42+ changes.
Note that while the pass is taught to preserve {,Post}DomTree,
it still doesn't do that by default, because simplifycfg
still doesn't do that by default, and flipping default
in this pass will implicitly flip the default for simplifycfg.
That will happen, but not right now.
2021-01-02 04:18:35 +08:00
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; RUN: opt -mtriple=amdgcn-- -S -amdgpu-unify-divergent-exit-nodes -verify -simplifycfg-require-and-preserve-domtree=1 %s | FileCheck -check-prefix=IR %s
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2019-06-26 02:55:16 +08:00
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; Make sure that the phi in n28 is updated when the block is split by unify
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; divergent exit nodes.
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define amdgpu_ps void @_amdgpu_ps_main() local_unnamed_addr #3 {
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; IR-LABEL: @_amdgpu_ps_main(
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; IR-NEXT: .entry:
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; IR-NEXT: br label [[DOTLOOPEXIT:%.*]]
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; IR: .loopexit:
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; IR-NEXT: br label [[N28:%.*]]
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; IR: n28:
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; IR-NEXT: [[DOT01:%.*]] = phi float [ 0.000000e+00, [[DOTLOOPEXIT]] ], [ [[N29:%.*]], [[TRANSITIONBLOCK:%.*]] ]
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; IR-NEXT: [[N29]] = fadd float [[DOT01]], 1.000000e+00
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; IR-NEXT: [[N30:%.*]] = fcmp ogt float [[N29]], 4.000000e+00
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AMDGPU: Fix AMDGPUUnifyDivergentExitNodes with no normal returns
Summary:
The code was assuming in a few places that if there was only one exit
from the function that it was a normal return, which is invalid. It
could be an infinite loop, in which case we still need to insert the
usual fake edge so that the null export happens. This fixes shaders that
end with an infinite loop that discards.
Reviewers: arsenm, nhaehnle, critson
Subscribers: kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, t-tye, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D71192
2019-12-09 19:04:00 +08:00
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; IR-NEXT: br i1 true, label [[TRANSITIONBLOCK]], label [[UNIFIEDRETURNBLOCK:%.*]]
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2019-06-26 02:55:16 +08:00
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; IR: TransitionBlock:
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; IR-NEXT: br i1 [[N30]], label [[DOTLOOPEXIT]], label [[N28]]
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AMDGPU: Fix AMDGPUUnifyDivergentExitNodes with no normal returns
Summary:
The code was assuming in a few places that if there was only one exit
from the function that it was a normal return, which is invalid. It
could be an infinite loop, in which case we still need to insert the
usual fake edge so that the null export happens. This fixes shaders that
end with an infinite loop that discards.
Reviewers: arsenm, nhaehnle, critson
Subscribers: kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, t-tye, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D71192
2019-12-09 19:04:00 +08:00
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; IR: UnifiedReturnBlock:
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; IR-NEXT: call void @llvm.amdgcn.exp.f32(i32 9, i32 0, float undef, float undef, float undef, float undef, i1 true, i1 true)
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2019-06-26 02:55:16 +08:00
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; IR-NEXT: ret void
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;
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.entry:
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br label %.loopexit
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.loopexit: ; preds = %n28, %.entry
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br label %n28
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n28: ; preds = %.loopexit, %n28
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%.01 = phi float [ 0.000000e+00, %.loopexit ], [ %n29, %n28 ]
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%n29 = fadd float %.01, 1.0
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%n30 = fcmp ogt float %n29, 4.000000e+00
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br i1 %n30, label %.loopexit, label %n28
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n31: ; preds =
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ret void
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}
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