2020-10-15 01:03:37 +08:00
|
|
|
; RUN: llc -mtriple=amdgcn-amd-amdhsa --amdhsa-code-object-version=2 -mcpu=kaveri -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,HSA %s
|
|
|
|
; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,MESA %s
|
2017-07-28 23:52:08 +08:00
|
|
|
|
|
|
|
; GCN-LABEL: {{^}}kernel_implicitarg_ptr_empty:
|
|
|
|
; GCN: enable_sgpr_kernarg_segment_ptr = 1
|
|
|
|
|
2018-03-24 02:45:18 +08:00
|
|
|
; HSA: kernarg_segment_byte_size = 0
|
2017-07-28 23:52:08 +08:00
|
|
|
; MESA: kernarg_segment_byte_size = 16
|
|
|
|
|
|
|
|
; HSA: s_load_dword s0, s[4:5], 0x0
|
|
|
|
define amdgpu_kernel void @kernel_implicitarg_ptr_empty() #0 {
|
2018-02-14 02:00:25 +08:00
|
|
|
%implicitarg.ptr = call i8 addrspace(4)* @llvm.amdgcn.implicitarg.ptr()
|
|
|
|
%cast = bitcast i8 addrspace(4)* %implicitarg.ptr to i32 addrspace(4)*
|
|
|
|
%load = load volatile i32, i32 addrspace(4)* %cast
|
2017-07-28 23:52:08 +08:00
|
|
|
ret void
|
|
|
|
}
|
|
|
|
|
2018-03-24 02:45:18 +08:00
|
|
|
; GCN-LABEL: {{^}}opencl_kernel_implicitarg_ptr_empty:
|
|
|
|
; GCN: enable_sgpr_kernarg_segment_ptr = 1
|
|
|
|
|
2018-03-24 02:58:47 +08:00
|
|
|
; HSA: kernarg_segment_byte_size = 48
|
2018-03-24 02:45:18 +08:00
|
|
|
; MESA: kernarg_segment_byte_size = 16
|
|
|
|
|
|
|
|
; HSA: s_load_dword s0, s[4:5], 0x0
|
|
|
|
define amdgpu_kernel void @opencl_kernel_implicitarg_ptr_empty() #1 {
|
|
|
|
%implicitarg.ptr = call i8 addrspace(4)* @llvm.amdgcn.implicitarg.ptr()
|
|
|
|
%cast = bitcast i8 addrspace(4)* %implicitarg.ptr to i32 addrspace(4)*
|
|
|
|
%load = load volatile i32, i32 addrspace(4)* %cast
|
|
|
|
ret void
|
|
|
|
}
|
|
|
|
|
2017-07-28 23:52:08 +08:00
|
|
|
; GCN-LABEL: {{^}}kernel_implicitarg_ptr:
|
|
|
|
; GCN: enable_sgpr_kernarg_segment_ptr = 1
|
|
|
|
|
2018-03-24 02:45:18 +08:00
|
|
|
; HSA: kernarg_segment_byte_size = 112
|
2018-07-20 17:05:08 +08:00
|
|
|
; MESA: kernarg_segment_byte_size = 128
|
2017-07-28 23:52:08 +08:00
|
|
|
|
|
|
|
; HSA: s_load_dword s0, s[4:5], 0x1c
|
|
|
|
define amdgpu_kernel void @kernel_implicitarg_ptr([112 x i8]) #0 {
|
2018-02-14 02:00:25 +08:00
|
|
|
%implicitarg.ptr = call i8 addrspace(4)* @llvm.amdgcn.implicitarg.ptr()
|
|
|
|
%cast = bitcast i8 addrspace(4)* %implicitarg.ptr to i32 addrspace(4)*
|
|
|
|
%load = load volatile i32, i32 addrspace(4)* %cast
|
2017-07-28 23:52:08 +08:00
|
|
|
ret void
|
|
|
|
}
|
|
|
|
|
2018-03-24 02:45:18 +08:00
|
|
|
; GCN-LABEL: {{^}}opencl_kernel_implicitarg_ptr:
|
|
|
|
; GCN: enable_sgpr_kernarg_segment_ptr = 1
|
|
|
|
|
2018-03-24 02:58:47 +08:00
|
|
|
; HSA: kernarg_segment_byte_size = 160
|
2018-07-20 17:05:08 +08:00
|
|
|
; MESA: kernarg_segment_byte_size = 128
|
2018-03-24 02:45:18 +08:00
|
|
|
|
|
|
|
; HSA: s_load_dword s0, s[4:5], 0x1c
|
|
|
|
define amdgpu_kernel void @opencl_kernel_implicitarg_ptr([112 x i8]) #1 {
|
|
|
|
%implicitarg.ptr = call i8 addrspace(4)* @llvm.amdgcn.implicitarg.ptr()
|
|
|
|
%cast = bitcast i8 addrspace(4)* %implicitarg.ptr to i32 addrspace(4)*
|
|
|
|
%load = load volatile i32, i32 addrspace(4)* %cast
|
|
|
|
ret void
|
|
|
|
}
|
|
|
|
|
2017-08-04 07:12:44 +08:00
|
|
|
; GCN-LABEL: {{^}}func_implicitarg_ptr:
|
|
|
|
; GCN: s_waitcnt
|
2021-02-11 00:11:36 +08:00
|
|
|
; HSA: s_load_dword s{{[0-9]+}}, s[8:9], 0x0
|
|
|
|
; MESA: s_load_dword s{{[0-9]+}}, s[4:5], 0x0
|
2020-09-23 23:16:39 +08:00
|
|
|
; GCN-NEXT: s_waitcnt
|
2017-08-04 07:12:44 +08:00
|
|
|
; GCN-NEXT: s_setpc_b64
|
2018-03-24 02:45:18 +08:00
|
|
|
define void @func_implicitarg_ptr() #0 {
|
|
|
|
%implicitarg.ptr = call i8 addrspace(4)* @llvm.amdgcn.implicitarg.ptr()
|
|
|
|
%cast = bitcast i8 addrspace(4)* %implicitarg.ptr to i32 addrspace(4)*
|
|
|
|
%load = load volatile i32, i32 addrspace(4)* %cast
|
|
|
|
ret void
|
|
|
|
}
|
|
|
|
|
|
|
|
; GCN-LABEL: {{^}}opencl_func_implicitarg_ptr:
|
|
|
|
; GCN: s_waitcnt
|
2021-02-11 00:11:36 +08:00
|
|
|
; HSA: s_load_dword s{{[0-9]+}}, s[8:9], 0x0
|
|
|
|
; MESA: s_load_dword s{{[0-9]+}}, s[4:5], 0x0
|
2020-09-23 23:16:39 +08:00
|
|
|
; GCN-NEXT: s_waitcnt
|
2018-03-24 02:45:18 +08:00
|
|
|
; GCN-NEXT: s_setpc_b64
|
|
|
|
define void @opencl_func_implicitarg_ptr() #0 {
|
2018-02-14 02:00:25 +08:00
|
|
|
%implicitarg.ptr = call i8 addrspace(4)* @llvm.amdgcn.implicitarg.ptr()
|
|
|
|
%cast = bitcast i8 addrspace(4)* %implicitarg.ptr to i32 addrspace(4)*
|
|
|
|
%load = load volatile i32, i32 addrspace(4)* %cast
|
2017-08-04 07:12:44 +08:00
|
|
|
ret void
|
|
|
|
}
|
|
|
|
|
|
|
|
; GCN-LABEL: {{^}}kernel_call_implicitarg_ptr_func_empty:
|
|
|
|
; GCN: enable_sgpr_kernarg_segment_ptr = 1
|
2018-03-24 02:45:18 +08:00
|
|
|
; HSA: kernarg_segment_byte_size = 0
|
2017-08-04 07:12:44 +08:00
|
|
|
; MESA: kernarg_segment_byte_size = 16
|
2019-07-09 03:03:38 +08:00
|
|
|
; GCN-NOT: s[4:5]
|
|
|
|
; GCN-NOT: s4
|
|
|
|
; GCN-NOT: s5
|
2017-08-04 07:12:44 +08:00
|
|
|
; GCN: s_swappc_b64
|
|
|
|
define amdgpu_kernel void @kernel_call_implicitarg_ptr_func_empty() #0 {
|
|
|
|
call void @func_implicitarg_ptr()
|
|
|
|
ret void
|
|
|
|
}
|
|
|
|
|
2018-03-24 02:45:18 +08:00
|
|
|
; GCN-LABEL: {{^}}opencl_kernel_call_implicitarg_ptr_func_empty:
|
|
|
|
; GCN: enable_sgpr_kernarg_segment_ptr = 1
|
2018-03-24 02:58:47 +08:00
|
|
|
; HSA: kernarg_segment_byte_size = 48
|
2018-03-24 02:45:18 +08:00
|
|
|
; MESA: kernarg_segment_byte_size = 16
|
2019-07-09 03:03:38 +08:00
|
|
|
; GCN-NOT: s[4:5]
|
|
|
|
; GCN-NOT: s4
|
|
|
|
; GCN-NOT: s5
|
2018-03-24 02:45:18 +08:00
|
|
|
; GCN: s_swappc_b64
|
|
|
|
define amdgpu_kernel void @opencl_kernel_call_implicitarg_ptr_func_empty() #1 {
|
|
|
|
call void @func_implicitarg_ptr()
|
|
|
|
ret void
|
|
|
|
}
|
|
|
|
|
2017-08-04 07:12:44 +08:00
|
|
|
; GCN-LABEL: {{^}}kernel_call_implicitarg_ptr_func:
|
|
|
|
; GCN: enable_sgpr_kernarg_segment_ptr = 1
|
2018-03-24 02:45:18 +08:00
|
|
|
; HSA: kernarg_segment_byte_size = 112
|
2018-07-20 17:05:08 +08:00
|
|
|
; MESA: kernarg_segment_byte_size = 128
|
2017-08-04 07:12:44 +08:00
|
|
|
|
2021-02-11 00:11:36 +08:00
|
|
|
; HSA: s_add_u32 s8, s8, 0x70
|
2019-07-09 03:03:38 +08:00
|
|
|
; MESA: s_add_u32 s4, s4, 0x70
|
2017-08-04 07:12:44 +08:00
|
|
|
|
2021-02-11 00:11:36 +08:00
|
|
|
; HSA: s_addc_u32 s9, s9, 0{{$}}
|
|
|
|
; MESA: s_addc_u32 s5, s5, 0{{$}}
|
2017-08-04 07:12:44 +08:00
|
|
|
; GCN: s_swappc_b64
|
|
|
|
define amdgpu_kernel void @kernel_call_implicitarg_ptr_func([112 x i8]) #0 {
|
|
|
|
call void @func_implicitarg_ptr()
|
|
|
|
ret void
|
|
|
|
}
|
|
|
|
|
2018-03-24 02:45:18 +08:00
|
|
|
; GCN-LABEL: {{^}}opencl_kernel_call_implicitarg_ptr_func:
|
|
|
|
; GCN: enable_sgpr_kernarg_segment_ptr = 1
|
2018-03-24 02:58:47 +08:00
|
|
|
; HSA: kernarg_segment_byte_size = 160
|
2018-07-20 17:05:08 +08:00
|
|
|
; MESA: kernarg_segment_byte_size = 128
|
2018-03-24 02:45:18 +08:00
|
|
|
|
2021-02-11 00:11:36 +08:00
|
|
|
; HSA: s_add_u32 s8, s8, 0x70
|
|
|
|
; HSA: s_addc_u32 s9, s9, 0{{$}}
|
|
|
|
; MESA: s_add_u32 s4, s4, 0x70
|
|
|
|
; MESA: s_addc_u32 s5, s5, 0{{$}}
|
2018-03-24 02:45:18 +08:00
|
|
|
; GCN: s_swappc_b64
|
|
|
|
define amdgpu_kernel void @opencl_kernel_call_implicitarg_ptr_func([112 x i8]) #1 {
|
|
|
|
call void @func_implicitarg_ptr()
|
|
|
|
ret void
|
|
|
|
}
|
|
|
|
|
2017-08-04 07:12:44 +08:00
|
|
|
; GCN-LABEL: {{^}}func_call_implicitarg_ptr_func:
|
2021-02-11 00:11:36 +08:00
|
|
|
; HSA-NOT: s8
|
|
|
|
; HSA-NOT: s9
|
|
|
|
; HSA-NOT: s[8:9]
|
|
|
|
; MESA-NOT: s4
|
|
|
|
; MESA-NOT: s5
|
|
|
|
; MESA-NOT: s[4:5]
|
2018-03-24 02:45:18 +08:00
|
|
|
define void @func_call_implicitarg_ptr_func() #0 {
|
|
|
|
call void @func_implicitarg_ptr()
|
|
|
|
ret void
|
|
|
|
}
|
|
|
|
|
|
|
|
; GCN-LABEL: {{^}}opencl_func_call_implicitarg_ptr_func:
|
2021-02-11 00:11:36 +08:00
|
|
|
; HSA-NOT: s8
|
|
|
|
; HSA-NOT: s9
|
|
|
|
; HSA-NOT: s[8:9]
|
|
|
|
; MESA-NOT: s4
|
|
|
|
; MESA-NOT: s5
|
|
|
|
; MESA-NOT: s[4:5]
|
2018-03-24 02:45:18 +08:00
|
|
|
define void @opencl_func_call_implicitarg_ptr_func() #0 {
|
2017-08-04 07:12:44 +08:00
|
|
|
call void @func_implicitarg_ptr()
|
|
|
|
ret void
|
|
|
|
}
|
|
|
|
|
|
|
|
; GCN-LABEL: {{^}}func_kernarg_implicitarg_ptr:
|
|
|
|
; GCN: s_waitcnt
|
2020-03-13 02:35:22 +08:00
|
|
|
; GCN-DAG: s_mov_b64 [[NULL:s\[[0-9]+:[0-9]+\]]], 0
|
|
|
|
; GCN-DAG: s_load_dword s{{[0-9]+}}, [[NULL]], 0x0
|
2021-02-11 00:11:36 +08:00
|
|
|
; HSA: s_load_dword s{{[0-9]+}}, s[8:9], 0x0
|
|
|
|
; MESA: s_load_dword s{{[0-9]+}}, s[4:5], 0x0
|
2020-09-23 23:16:39 +08:00
|
|
|
; GCN: s_waitcnt lgkmcnt(0)
|
2018-03-24 02:45:18 +08:00
|
|
|
define void @func_kernarg_implicitarg_ptr() #0 {
|
|
|
|
%kernarg.segment.ptr = call i8 addrspace(4)* @llvm.amdgcn.kernarg.segment.ptr()
|
|
|
|
%implicitarg.ptr = call i8 addrspace(4)* @llvm.amdgcn.implicitarg.ptr()
|
|
|
|
%cast.kernarg.segment.ptr = bitcast i8 addrspace(4)* %kernarg.segment.ptr to i32 addrspace(4)*
|
|
|
|
%cast.implicitarg = bitcast i8 addrspace(4)* %implicitarg.ptr to i32 addrspace(4)*
|
|
|
|
%load0 = load volatile i32, i32 addrspace(4)* %cast.kernarg.segment.ptr
|
|
|
|
%load1 = load volatile i32, i32 addrspace(4)* %cast.implicitarg
|
|
|
|
ret void
|
|
|
|
}
|
|
|
|
|
|
|
|
; GCN-LABEL: {{^}}opencl_func_kernarg_implicitarg_ptr:
|
|
|
|
; GCN: s_waitcnt
|
2020-03-13 02:35:22 +08:00
|
|
|
; GCN-DAG: s_mov_b64 [[NULL:s\[[0-9]+:[0-9]+\]]], 0
|
|
|
|
; GCN-DAG: s_load_dword s{{[0-9]+}}, [[NULL]], 0x0
|
2021-02-11 00:11:36 +08:00
|
|
|
; HSA: s_load_dword s{{[0-9]+}}, s[8:9], 0x0
|
|
|
|
; MESA: s_load_dword s{{[0-9]+}}, s[4:5], 0x0
|
2020-09-23 23:16:39 +08:00
|
|
|
; GCN: s_waitcnt lgkmcnt(0)
|
2018-03-24 02:45:18 +08:00
|
|
|
define void @opencl_func_kernarg_implicitarg_ptr() #0 {
|
2018-02-14 02:00:25 +08:00
|
|
|
%kernarg.segment.ptr = call i8 addrspace(4)* @llvm.amdgcn.kernarg.segment.ptr()
|
|
|
|
%implicitarg.ptr = call i8 addrspace(4)* @llvm.amdgcn.implicitarg.ptr()
|
|
|
|
%cast.kernarg.segment.ptr = bitcast i8 addrspace(4)* %kernarg.segment.ptr to i32 addrspace(4)*
|
|
|
|
%cast.implicitarg = bitcast i8 addrspace(4)* %implicitarg.ptr to i32 addrspace(4)*
|
|
|
|
%load0 = load volatile i32, i32 addrspace(4)* %cast.kernarg.segment.ptr
|
|
|
|
%load1 = load volatile i32, i32 addrspace(4)* %cast.implicitarg
|
2017-08-04 07:12:44 +08:00
|
|
|
ret void
|
|
|
|
}
|
|
|
|
|
|
|
|
; GCN-LABEL: {{^}}kernel_call_kernarg_implicitarg_ptr_func:
|
2021-02-11 00:11:36 +08:00
|
|
|
; HSA: s_add_u32 s8, s8, 0x70
|
|
|
|
; HSA: s_addc_u32 s9, s9, 0
|
|
|
|
; MESA: s_add_u32 s4, s4, 0x70
|
|
|
|
; MESA: s_addc_u32 s5, s5, 0
|
2017-08-04 07:12:44 +08:00
|
|
|
; GCN: s_swappc_b64
|
|
|
|
define amdgpu_kernel void @kernel_call_kernarg_implicitarg_ptr_func([112 x i8]) #0 {
|
|
|
|
call void @func_kernarg_implicitarg_ptr()
|
|
|
|
ret void
|
|
|
|
}
|
|
|
|
|
2018-06-30 01:31:42 +08:00
|
|
|
; GCN-LABEL: {{^}}kernel_implicitarg_no_struct_align_padding:
|
|
|
|
; HSA: kernarg_segment_byte_size = 120
|
|
|
|
; MESA: kernarg_segment_byte_size = 84
|
|
|
|
; GCN: kernarg_segment_alignment = 6
|
|
|
|
define amdgpu_kernel void @kernel_implicitarg_no_struct_align_padding(<16 x i32>, i32) #1 {
|
|
|
|
%implicitarg.ptr = call i8 addrspace(4)* @llvm.amdgcn.implicitarg.ptr()
|
|
|
|
%cast = bitcast i8 addrspace(4)* %implicitarg.ptr to i32 addrspace(4)*
|
|
|
|
%load = load volatile i32, i32 addrspace(4)* %cast
|
|
|
|
ret void
|
|
|
|
}
|
|
|
|
|
2018-02-14 02:00:25 +08:00
|
|
|
declare i8 addrspace(4)* @llvm.amdgcn.implicitarg.ptr() #2
|
|
|
|
declare i8 addrspace(4)* @llvm.amdgcn.kernarg.segment.ptr() #2
|
2017-07-28 23:52:08 +08:00
|
|
|
|
|
|
|
attributes #0 = { nounwind noinline }
|
2018-03-24 02:58:47 +08:00
|
|
|
attributes #1 = { nounwind noinline "amdgpu-implicitarg-num-bytes"="48" }
|
2017-07-28 23:52:08 +08:00
|
|
|
attributes #2 = { nounwind readnone speculatable }
|