2018-04-04 19:37:06 +08:00
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include_directories(
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2018-04-06 02:16:02 +08:00
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${LLVM_MAIN_SRC_DIR}/tools/llvm-exegesis/lib
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2018-04-04 19:37:06 +08:00
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)
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|
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set(LLVM_LINK_COMPONENTS
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MC
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|
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MCParser
|
|
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Object
|
|
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Support
|
|
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Symbolize
|
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)
|
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add_llvm_unittest(LLVMExegesisTests
|
2018-08-01 22:41:45 +08:00
|
|
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BenchmarkRunnerTest.cpp
|
2018-05-07 17:09:48 +08:00
|
|
|
ClusteringTest.cpp
|
2018-04-04 19:37:06 +08:00
|
|
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PerfHelperTest.cpp
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2018-09-17 19:09:32 +08:00
|
|
|
RegisterValueTest.cpp
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[llvm-exegesis] Exploring X86::OperandType::OPERAND_COND_CODE
Summary:
Currently, we only have nice exploration for LEA instruction,
while for the rest, we rely on `randomizeUnsetVariables()`
to sometimes generate something interesting.
While that works, it isn't very reliable in coverage :)
Here, i'm making an assumption that while we may want to explore
multi-instruction configs, we are most interested in the
characteristics of the main instruction we were asked about.
Which we can do, by taking the existing `randomizeMCOperand()`,
and turning it on it's head - instead of relying on it to randomly fill
one of the interesting values, let's pregenerate all the possible interesting
values for the variable, and then generate as much `InstructionTemplate`
combinations of these possible values for variables as needed/possible.
Of course, that requires invasive changes to no longer pass just the
naked `Instruction`, but sometimes partially filled `InstructionTemplate`.
As it can be seen from the test, this allows us to explore
`X86::OperandType::OPERAND_COND_CODE` for instructions
that take such an operand.
I'm hoping this will greatly simplify exploration.
Reviewers: courbet, gchatelet
Reviewed By: gchatelet
Subscribers: orodley, mgorny, sdardis, tschuett, jrtc27, atanasyan, mstojanovic, andreadb, RKSimon, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D74156
2020-02-13 01:54:39 +08:00
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SnippetGeneratorTest.cpp
|
2018-04-04 19:37:06 +08:00
|
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)
|
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target_link_libraries(LLVMExegesisTests PRIVATE LLVMExegesis)
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|
2018-04-13 20:20:30 +08:00
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if(LLVM_TARGETS_TO_BUILD MATCHES "X86")
|
2018-05-15 15:40:21 +08:00
|
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add_subdirectory(X86)
|
|
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endif()
|
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if(LLVM_TARGETS_TO_BUILD MATCHES "ARM")
|
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add_subdirectory(ARM)
|
2018-04-13 20:20:30 +08:00
|
|
|
endif()
|
2018-07-03 18:10:29 +08:00
|
|
|
if(LLVM_TARGETS_TO_BUILD MATCHES "AArch64")
|
|
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add_subdirectory(AArch64)
|
|
|
|
endif()
|
2018-11-09 00:51:42 +08:00
|
|
|
if(LLVM_TARGETS_TO_BUILD MATCHES "PowerPC")
|
|
|
|
add_subdirectory(PowerPC)
|
|
|
|
endif()
|
2019-10-12 04:26:08 +08:00
|
|
|
if(LLVM_TARGETS_TO_BUILD MATCHES "Mips")
|
|
|
|
add_subdirectory(Mips)
|
|
|
|
endif()
|