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llvm-project/llvm/test/MC/Disassembler/Hexagon/st.txt

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[Hexagon] Renaming old multiclass for removal. Adding post-increment store classes and instruction defs. llvm-svn: 224949
2014-12-30 03:42:14 +08:00
# RUN: llvm-mc --triple hexagon -disassemble < %s | FileCheck %s
[Hexagon] Adding post-increment register form stores and register-immediate form stores with tests. llvm-svn: 224952
2014-12-30 04:44:51 +08:00
0x15 0xd4 0xd1 0xa1
# CHECK: memd(r17+#168) = r21:20
[Hexagon] Adding allocframe, post-increment circular immediate stores, post-increment circular register stores, and bit reversed post-increment stores. llvm-svn: 224957
2014-12-30 05:33:45 +08:00
0x02 0xf4 0xd1 0xa9
# CHECK: memd(r17 ++ I:circ(m1)) = r21:20
0x28 0xf4 0xd1 0xa9
# CHECK: memd(r17 ++ #40:circ(m1)) = r21:20
[Hexagon] Replacing the remaining postincrement stores with versions that have encoding bits. llvm-svn: 224951
2014-12-30 04:00:43 +08:00
0x28 0xd4 0xd1 0xab
# CHECK: memd(r17++#40) = r21:20
[Hexagon] Adding post-increment register form stores and register-immediate form stores with tests. llvm-svn: 224952
2014-12-30 04:44:51 +08:00
0x00 0xf4 0xd1 0xad
# CHECK: memd(r17++m1) = r21:20
[Hexagon] Adding allocframe, post-increment circular immediate stores, post-increment circular register stores, and bit reversed post-increment stores. llvm-svn: 224957
2014-12-30 05:33:45 +08:00
0x00 0xf4 0xd1 0xaf
# CHECK: memd(r17 ++ m1:brev) = r21:20
[Hexagon] Adding post-increment register form stores and register-immediate form stores with tests. llvm-svn: 224952
2014-12-30 04:44:51 +08:00
0xab 0xde 0xd1 0x40
# CHECK: if (p3) memd(r17+#168) = r31:30
0xab 0xde 0xd1 0x44
# CHECK: if (!p3) memd(r17+#168) = r31:30
0x03 0x40 0x45 0x85 0xab 0xde 0xd1 0x42
# CHECK: p3 = r5
# CHECK-NEXT: if (p3.new) memd(r17+#168) = r31:30
0x03 0x40 0x45 0x85 0xab 0xde 0xd1 0x46
# CHECK: p3 = r5
# CHECK-NEXT: if (!p3.new) memd(r17+#168) = r31:30
[Hexagon] Replacing the remaining postincrement stores with versions that have encoding bits. llvm-svn: 224951
2014-12-30 04:00:43 +08:00
0x2b 0xf4 0xd1 0xab
# CHECK: if (p3) memd(r17++#40) = r21:20
0x2f 0xf4 0xd1 0xab
# CHECK: if (!p3) memd(r17++#40) = r21:20
0x03 0x40 0x45 0x85 0xab 0xf4 0xd1 0xab
# CHECK: p3 = r5
# CHECK-NEXT: if (p3.new) memd(r17++#40) = r21:20
0x03 0x40 0x45 0x85 0xaf 0xf4 0xd1 0xab
# CHECK: p3 = r5
# CHECK-NEXT: if (!p3.new) memd(r17++#40) = r21:20
[Hexagon] Adding post-increment register form stores and register-immediate form stores with tests. llvm-svn: 224952
2014-12-30 04:44:51 +08:00
0x15 0xd5 0x11 0xa1
# CHECK: memb(r17+#21) = r21
[Hexagon] Adding allocframe, post-increment circular immediate stores, post-increment circular register stores, and bit reversed post-increment stores. llvm-svn: 224957
2014-12-30 05:33:45 +08:00
0x02 0xf5 0x11 0xa9
# CHECK: memb(r17 ++ I:circ(m1)) = r21
0x28 0xf5 0x11 0xa9
# CHECK: memb(r17 ++ #5:circ(m1)) = r21
[Hexagon] Renaming old multiclass for removal. Adding post-increment store classes and instruction defs. llvm-svn: 224949
2014-12-30 03:42:14 +08:00
0x28 0xd5 0x11 0xab
# CHECK: memb(r17++#5) = r21
[Hexagon] Adding post-increment register form stores and register-immediate form stores with tests. llvm-svn: 224952
2014-12-30 04:44:51 +08:00
0x00 0xf5 0x11 0xad
# CHECK: memb(r17++m1) = r21
[Hexagon] Adding allocframe, post-increment circular immediate stores, post-increment circular register stores, and bit reversed post-increment stores. llvm-svn: 224957
2014-12-30 05:33:45 +08:00
0x00 0xf5 0x11 0xaf
# CHECK: memb(r17 ++ m1:brev) = r21
[Hexagon] Adding post-increment register form stores and register-immediate form stores with tests. llvm-svn: 224952
2014-12-30 04:44:51 +08:00
0xab 0xdf 0x11 0x40
# CHECK: if (p3) memb(r17+#21) = r31
0xab 0xdf 0x11 0x44
# CHECK: if (!p3) memb(r17+#21) = r31
0x03 0x40 0x45 0x85 0xab 0xdf 0x11 0x42
# CHECK: p3 = r5
# CHECK-NEXT: if (p3.new) memb(r17+#21) = r31
0x03 0x40 0x45 0x85 0xab 0xdf 0x11 0x46
# CHECK: p3 = r5
# CHECK-NEXT: if (!p3.new) memb(r17+#21) = r31
[Hexagon] Renaming old multiclass for removal. Adding post-increment store classes and instruction defs. llvm-svn: 224949
2014-12-30 03:42:14 +08:00
0x2b 0xf5 0x11 0xab
# CHECK: if (p3) memb(r17++#5) = r21
0x2f 0xf5 0x11 0xab
# CHECK: if (!p3) memb(r17++#5) = r21
0x03 0x40 0x45 0x85 0xab 0xf5 0x11 0xab
# CHECK: p3 = r5
# CHECK-NEXT: if (p3.new) memb(r17++#5) = r21
0x03 0x40 0x45 0x85 0xaf 0xf5 0x11 0xab
# CHECK: p3 = r5
[Hexagon] Replacing the remaining postincrement stores with versions that have encoding bits. llvm-svn: 224951
2014-12-30 04:00:43 +08:00
# CHECK-NEXT: if (!p3.new) memb(r17++#5) = r21
[Hexagon] Adding post-increment register form stores and register-immediate form stores with tests. llvm-svn: 224952
2014-12-30 04:44:51 +08:00
0x15 0xdf 0x51 0xa1
# CHECK: memh(r17+#42) = r31
0x15 0xdf 0x71 0xa1
# CHECK: memh(r17+#42) = r31.h
[Hexagon] Adding allocframe, post-increment circular immediate stores, post-increment circular register stores, and bit reversed post-increment stores. llvm-svn: 224957
2014-12-30 05:33:45 +08:00
0x02 0xf5 0x51 0xa9
# CHECK: memh(r17 ++ I:circ(m1)) = r21
0x28 0xf5 0x51 0xa9
# CHECK: memh(r17 ++ #10:circ(m1)) = r21
0x02 0xf5 0x71 0xa9
# CHECK: memh(r17 ++ I:circ(m1)) = r21.h
0x28 0xf5 0x71 0xa9
# CHECK: memh(r17 ++ #10:circ(m1)) = r21.h
[Hexagon] Replacing the remaining postincrement stores with versions that have encoding bits. llvm-svn: 224951
2014-12-30 04:00:43 +08:00
0x28 0xd5 0x51 0xab
# CHECK: memh(r17++#10) = r21
[Hexagon] Adding post-increment register form stores and register-immediate form stores with tests. llvm-svn: 224952
2014-12-30 04:44:51 +08:00
0x28 0xd5 0x71 0xab
# CHECK: memh(r17++#10) = r21.h
0x00 0xf5 0x51 0xad
# CHECK: memh(r17++m1) = r21
0x00 0xf5 0x71 0xad
# CHECK: memh(r17++m1) = r21.h
[Hexagon] Adding allocframe, post-increment circular immediate stores, post-increment circular register stores, and bit reversed post-increment stores. llvm-svn: 224957
2014-12-30 05:33:45 +08:00
0x00 0xf5 0x51 0xaf
# CHECK: memh(r17 ++ m1:brev) = r21
0x00 0xf5 0x71 0xaf
# CHECK: memh(r17 ++ m1:brev) = r21.h
[Hexagon] Adding post-increment register form stores and register-immediate form stores with tests. llvm-svn: 224952
2014-12-30 04:44:51 +08:00
0xfb 0xd5 0x51 0x40
# CHECK: if (p3) memh(r17+#62) = r21
0xfb 0xd5 0x71 0x40
# CHECK: if (p3) memh(r17+#62) = r21.h
0xfb 0xd5 0x51 0x44
# CHECK: if (!p3) memh(r17+#62) = r21
0xfb 0xd5 0x71 0x44
# CHECK: if (!p3) memh(r17+#62) = r21.h
0x03 0x40 0x45 0x85 0xfb 0xd5 0x51 0x42
# CHECK: p3 = r5
# CHECK-NEXT: if (p3.new) memh(r17+#62) = r21
0x03 0x40 0x45 0x85 0xfb 0xd5 0x71 0x42
# CHECK: p3 = r5
# CHECK-NEXT: if (p3.new) memh(r17+#62) = r21.h
0x03 0x40 0x45 0x85 0xfb 0xd5 0x51 0x46
# CHECK: p3 = r5
# CHECK-NEXT: if (!p3.new) memh(r17+#62) = r21
0x03 0x40 0x45 0x85 0xfb 0xd5 0x71 0x46
# CHECK: p3 = r5
# CHECK-NEXT: if (!p3.new) memh(r17+#62) = r21.h
[Hexagon] Replacing the remaining postincrement stores with versions that have encoding bits. llvm-svn: 224951
2014-12-30 04:00:43 +08:00
0x2b 0xf5 0x51 0xab
# CHECK: if (p3) memh(r17++#10) = r21
0x2f 0xf5 0x51 0xab
# CHECK: if (!p3) memh(r17++#10) = r21
0x03 0x40 0x45 0x85 0xab 0xf5 0x51 0xab
# CHECK: p3 = r5
# CHECK-NEXT: if (p3.new) memh(r17++#10) = r21
0x03 0x40 0x45 0x85 0xaf 0xf5 0x51 0xab
# CHECK: p3 = r5
# CHECK-NEXT: if (!p3.new) memh(r17++#10) = r21
[Hexagon] Adding post-increment register form stores and register-immediate form stores with tests. llvm-svn: 224952
2014-12-30 04:44:51 +08:00
0x2b 0xf5 0x71 0xab
# CHECK: if (p3) memh(r17++#10) = r21.h
0x2f 0xf5 0x71 0xab
# CHECK: if (!p3) memh(r17++#10) = r21.h
0x03 0x40 0x45 0x85 0xab 0xf5 0x71 0xab
# CHECK: p3 = r5
# CHECK-NEXT: if (p3.new) memh(r17++#10) = r21.h
0x03 0x40 0x45 0x85 0xaf 0xf5 0x71 0xab
# CHECK: p3 = r5
# CHECK-NEXT: if (!p3.new) memh(r17++#10) = r21.h
[Hexagon] Replacing the remaining postincrement stores with versions that have encoding bits. llvm-svn: 224951
2014-12-30 04:00:43 +08:00
[Hexagon] Adding post-increment register form stores and register-immediate form stores with tests. llvm-svn: 224952
2014-12-30 04:44:51 +08:00
0x15 0xdf 0x91 0xa1
# CHECK: memw(r17+#84) = r31
[Hexagon] Adding allocframe, post-increment circular immediate stores, post-increment circular register stores, and bit reversed post-increment stores. llvm-svn: 224957
2014-12-30 05:33:45 +08:00
0x02 0xf5 0x91 0xa9
# CHECK: memw(r17 ++ I:circ(m1)) = r21
0x28 0xf5 0x91 0xa9
# CHECK: memw(r17 ++ #20:circ(m1)) = r21
[Hexagon] Replacing the remaining postincrement stores with versions that have encoding bits. llvm-svn: 224951
2014-12-30 04:00:43 +08:00
0x28 0xd5 0x91 0xab
# CHECK: memw(r17++#20) = r21
[Hexagon] Adding post-increment register form stores and register-immediate form stores with tests. llvm-svn: 224952
2014-12-30 04:44:51 +08:00
0x00 0xf5 0x91 0xad
# CHECK: memw(r17++m1) = r21
[Hexagon] Adding allocframe, post-increment circular immediate stores, post-increment circular register stores, and bit reversed post-increment stores. llvm-svn: 224957
2014-12-30 05:33:45 +08:00
0x00 0xf5 0x91 0xaf
# CHECK: memw(r17 ++ m1:brev) = r21
[Hexagon] Adding post-increment register form stores and register-immediate form stores with tests. llvm-svn: 224952
2014-12-30 04:44:51 +08:00
0xab 0xdf 0x91 0x40
# CHECK: if (p3) memw(r17+#84) = r31
0xab 0xdf 0x91 0x44
# CHECK: if (!p3) memw(r17+#84) = r31
0x03 0x40 0x45 0x85 0xab 0xdf 0x91 0x42
# CHECK: p3 = r5
# CHECK-NEXT: if (p3.new) memw(r17+#84) = r31
0x03 0x40 0x45 0x85 0xab 0xdf 0x91 0x46
# CHECK: p3 = r5
# CHECK-NEXT: if (!p3.new) memw(r17+#84) = r31
[Hexagon] Replacing the remaining postincrement stores with versions that have encoding bits. llvm-svn: 224951
2014-12-30 04:00:43 +08:00
0x2b 0xf5 0x91 0xab
# CHECK: if (p3) memw(r17++#20) = r21
0x2f 0xf5 0x91 0xab
# CHECK: if (!p3) memw(r17++#20) = r21
0x03 0x40 0x45 0x85 0xaf 0xf5 0x91 0xab
# CHECK: p3 = r5
# CHECK-NEXT: if (!p3.new) memw(r17++#20) = r21
0x03 0x40 0x45 0x85 0xab 0xf5 0x91 0xab
# CHECK: p3 = r5
[Hexagon] Adding allocframe, post-increment circular immediate stores, post-increment circular register stores, and bit reversed post-increment stores. llvm-svn: 224957
2014-12-30 05:33:45 +08:00
# CHECK-NEXT: if (p3.new) memw(r17++#20) = r21
0x1f 0xc0 0x9d 0xa0
# CHECK: allocframe(#248)