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llvm-project/clang/test/Driver/aarch64-sve-vector-bits.c

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[Sema][AArch64] Add parsing support for arm_sve_vector_bits attribute Summary: This patch implements parsing support for the 'arm_sve_vector_bits' type attribute, defined by the Arm C Language Extensions (ACLE, version 00bet5, section 3.7.3) for SVE [1]. The purpose of this attribute is to define fixed-length (VLST) versions of existing sizeless types (VLAT). For example: #if __ARM_FEATURE_SVE_BITS==512 typedef svint32_t fixed_svint32_t __attribute__((arm_sve_vector_bits(512))); #endif Creates a type 'fixed_svint32_t' that is a fixed-length version of 'svint32_t' that is normal-sized (rather than sizeless) and contains exactly 512 bits. Unlike 'svint32_t', this type can be used in places such as structs and arrays where sizeless types can't. Implemented in this patch is the following: * Defined and tested attribute taking single argument. * Checks the argument is an integer constant expression. * Attribute can only be attached to a single SVE vector or predicate type, excluding tuple types such as svint32x4_t. * Added the `-msve-vector-bits=<bits>` flag. When specified the `__ARM_FEATURE_SVE_BITS__EXPERIMENTAL` macro is defined. * Added a language option to store the vector size specified by the `-msve-vector-bits=<bits>` flag. This is used to validate `N == __ARM_FEATURE_SVE_BITS`, where N is the number of bits passed to the attribute and `__ARM_FEATURE_SVE_BITS` is the feature macro defined under the same flag. The `__ARM_FEATURE_SVE_BITS` macro will be made non-experimental in the final patch of the series. [1] https://developer.arm.com/documentation/100987/latest This is patch 1/4 of a patch series. Reviewers: sdesmalen, rsandifo-arm, efriedma, ctetreau, cameron.mcinally, rengolin, aaron.ballman Reviewed By: sdesmalen, aaron.ballman Differential Revision: https://reviews.llvm.org/D83550
2020-05-29 17:17:37 +08:00
// -----------------------------------------------------------------------------
// Tests for the -msve-vector-bits flag
// -----------------------------------------------------------------------------
// RUN: %clang -c %s -### -target aarch64-none-linux-gnu -march=armv8-a+sve \
// RUN: -msve-vector-bits=128 2>&1 | FileCheck --check-prefix=CHECK-128 %s
// RUN: %clang -c %s -### -target aarch64-none-linux-gnu -march=armv8-a+sve \
// RUN: -msve-vector-bits=256 2>&1 | FileCheck --check-prefix=CHECK-256 %s
// RUN: %clang -c %s -### -target aarch64-none-linux-gnu -march=armv8-a+sve \
// RUN: -msve-vector-bits=512 2>&1 | FileCheck --check-prefix=CHECK-512 %s
// RUN: %clang -c %s -### -target aarch64-none-linux-gnu -march=armv8-a+sve \
// RUN: -msve-vector-bits=1024 2>&1 | FileCheck --check-prefix=CHECK-1024 %s
// RUN: %clang -c %s -### -target aarch64-none-linux-gnu -march=armv8-a+sve \
// RUN: -msve-vector-bits=2048 2>&1 | FileCheck --check-prefix=CHECK-2048 %s
[Driver] Add support for -msve-vector-bits=scalable. No real action is taken for a value of scalable but it provides a route to disable an earlier specification and is effectively its default value when omitted. Patch also removes an "unused variable" warning. Differential Revision: https://reviews.llvm.org/D84021
2020-07-20 18:43:45 +08:00
// RUN: %clang -c %s -### -target aarch64-none-linux-gnu -march=armv8-a+sve \
[AArch64][Driver][SVE] Allow -msve-vector-bits=<n>+ syntax to mean no maximum vscale This patch splits the existing SveVectorBits LangOpt into VScaleMin and VScaleMax LangOpts such that we can represent such an option. The cc1 option has also been split into -mvscale-{min,max}=<n> options so that the cc1 arguments better reflect the vscale_range IR attribute. Differential Revision: https://reviews.llvm.org/D111790
2021-10-14 19:04:33 +08:00
// RUN: -msve-vector-bits=128+ 2>&1 | FileCheck --check-prefix=CHECK-128P %s
// RUN: %clang -c %s -### -target aarch64-none-linux-gnu -march=armv8-a+sve \
// RUN: -msve-vector-bits=256+ 2>&1 | FileCheck --check-prefix=CHECK-256P %s
// RUN: %clang -c %s -### -target aarch64-none-linux-gnu -march=armv8-a+sve \
// RUN: -msve-vector-bits=512+ 2>&1 | FileCheck --check-prefix=CHECK-512P %s
// RUN: %clang -c %s -### -target aarch64-none-linux-gnu -march=armv8-a+sve \
// RUN: -msve-vector-bits=1024+ 2>&1 | FileCheck --check-prefix=CHECK-1024P %s
// RUN: %clang -c %s -### -target aarch64-none-linux-gnu -march=armv8-a+sve \
// RUN: -msve-vector-bits=2048+ 2>&1 | FileCheck --check-prefix=CHECK-2048P %s
// RUN: %clang -c %s -### -target aarch64-none-linux-gnu -march=armv8-a+sve \
[Driver] Add support for -msve-vector-bits=scalable. No real action is taken for a value of scalable but it provides a route to disable an earlier specification and is effectively its default value when omitted. Patch also removes an "unused variable" warning. Differential Revision: https://reviews.llvm.org/D84021
2020-07-20 18:43:45 +08:00
// RUN: -msve-vector-bits=scalable 2>&1 | FileCheck --check-prefix=CHECK-SCALABLE %s
[Sema][AArch64] Add parsing support for arm_sve_vector_bits attribute Summary: This patch implements parsing support for the 'arm_sve_vector_bits' type attribute, defined by the Arm C Language Extensions (ACLE, version 00bet5, section 3.7.3) for SVE [1]. The purpose of this attribute is to define fixed-length (VLST) versions of existing sizeless types (VLAT). For example: #if __ARM_FEATURE_SVE_BITS==512 typedef svint32_t fixed_svint32_t __attribute__((arm_sve_vector_bits(512))); #endif Creates a type 'fixed_svint32_t' that is a fixed-length version of 'svint32_t' that is normal-sized (rather than sizeless) and contains exactly 512 bits. Unlike 'svint32_t', this type can be used in places such as structs and arrays where sizeless types can't. Implemented in this patch is the following: * Defined and tested attribute taking single argument. * Checks the argument is an integer constant expression. * Attribute can only be attached to a single SVE vector or predicate type, excluding tuple types such as svint32x4_t. * Added the `-msve-vector-bits=<bits>` flag. When specified the `__ARM_FEATURE_SVE_BITS__EXPERIMENTAL` macro is defined. * Added a language option to store the vector size specified by the `-msve-vector-bits=<bits>` flag. This is used to validate `N == __ARM_FEATURE_SVE_BITS`, where N is the number of bits passed to the attribute and `__ARM_FEATURE_SVE_BITS` is the feature macro defined under the same flag. The `__ARM_FEATURE_SVE_BITS` macro will be made non-experimental in the final patch of the series. [1] https://developer.arm.com/documentation/100987/latest This is patch 1/4 of a patch series. Reviewers: sdesmalen, rsandifo-arm, efriedma, ctetreau, cameron.mcinally, rengolin, aaron.ballman Reviewed By: sdesmalen, aaron.ballman Differential Revision: https://reviews.llvm.org/D83550
2020-05-29 17:17:37 +08:00
[AArch64][Driver][SVE] Allow -msve-vector-bits=<n>+ syntax to mean no maximum vscale This patch splits the existing SveVectorBits LangOpt into VScaleMin and VScaleMax LangOpts such that we can represent such an option. The cc1 option has also been split into -mvscale-{min,max}=<n> options so that the cc1 arguments better reflect the vscale_range IR attribute. Differential Revision: https://reviews.llvm.org/D111790
2021-10-14 19:04:33 +08:00
// CHECK-128: "-mvscale-max=1" "-mvscale-min=1"
// CHECK-256: "-mvscale-max=2" "-mvscale-min=2"
// CHECK-512: "-mvscale-max=4" "-mvscale-min=4"
// CHECK-1024: "-mvscale-max=8" "-mvscale-min=8"
// CHECK-2048: "-mvscale-max=16" "-mvscale-min=16"
// CHECK-128P: "-mvscale-min=1"
// CHECK-128P-NOT: "-mvscale-max"
// CHECK-256P: "-mvscale-min=2"
// CHECK-256P-NOT: "-mvscale-max"
// CHECK-512P: "-mvscale-min=4"
// CHECK-512P-NOT: "-mvscale-max"
// CHECK-1024P: "-mvscale-min=8"
// CHECK-1024P-NOT: "-mvscale-max"
// CHECK-2048P: "-mvscale-min=16"
// CHECK-2048P-NOT: "-mvscale-max"
// CHECK-SCALABLE-NOT: "-mvscale-min=
// CHECK-SCALABLE-NOT: "-mvscale-max=
[Sema][AArch64] Add parsing support for arm_sve_vector_bits attribute Summary: This patch implements parsing support for the 'arm_sve_vector_bits' type attribute, defined by the Arm C Language Extensions (ACLE, version 00bet5, section 3.7.3) for SVE [1]. The purpose of this attribute is to define fixed-length (VLST) versions of existing sizeless types (VLAT). For example: #if __ARM_FEATURE_SVE_BITS==512 typedef svint32_t fixed_svint32_t __attribute__((arm_sve_vector_bits(512))); #endif Creates a type 'fixed_svint32_t' that is a fixed-length version of 'svint32_t' that is normal-sized (rather than sizeless) and contains exactly 512 bits. Unlike 'svint32_t', this type can be used in places such as structs and arrays where sizeless types can't. Implemented in this patch is the following: * Defined and tested attribute taking single argument. * Checks the argument is an integer constant expression. * Attribute can only be attached to a single SVE vector or predicate type, excluding tuple types such as svint32x4_t. * Added the `-msve-vector-bits=<bits>` flag. When specified the `__ARM_FEATURE_SVE_BITS__EXPERIMENTAL` macro is defined. * Added a language option to store the vector size specified by the `-msve-vector-bits=<bits>` flag. This is used to validate `N == __ARM_FEATURE_SVE_BITS`, where N is the number of bits passed to the attribute and `__ARM_FEATURE_SVE_BITS` is the feature macro defined under the same flag. The `__ARM_FEATURE_SVE_BITS` macro will be made non-experimental in the final patch of the series. [1] https://developer.arm.com/documentation/100987/latest This is patch 1/4 of a patch series. Reviewers: sdesmalen, rsandifo-arm, efriedma, ctetreau, cameron.mcinally, rengolin, aaron.ballman Reviewed By: sdesmalen, aaron.ballman Differential Revision: https://reviews.llvm.org/D83550
2020-05-29 17:17:37 +08:00
// Error out if an unsupported value is passed to -msve-vector-bits.
// -----------------------------------------------------------------------------
// RUN: %clang -c %s -### -target aarch64-none-linux-gnu -march=armv8-a+sve \
// RUN: -msve-vector-bits=64 2>&1 | FileCheck --check-prefix=CHECK-BAD-VALUE-ERROR %s
// RUN: %clang -c %s -### -target aarch64-none-linux-gnu -march=armv8-a+sve \
// RUN: -msve-vector-bits=A 2>&1 | FileCheck --check-prefix=CHECK-BAD-VALUE-ERROR %s
// CHECK-BAD-VALUE-ERROR: error: unsupported argument '{{.*}}' to option 'msve-vector-bits='
[AArch64][Driver][SVE] Allow -msve-vector-bits=<n>+ syntax to mean no maximum vscale This patch splits the existing SveVectorBits LangOpt into VScaleMin and VScaleMax LangOpts such that we can represent such an option. The cc1 option has also been split into -mvscale-{min,max}=<n> options so that the cc1 arguments better reflect the vscale_range IR attribute. Differential Revision: https://reviews.llvm.org/D111790
2021-10-14 19:04:33 +08:00
// Error if using attribute without -msve-vector-bits=<bits> or if using -msve-vector-bits=<bits>+ syntax
[Sema][AArch64] Add parsing support for arm_sve_vector_bits attribute Summary: This patch implements parsing support for the 'arm_sve_vector_bits' type attribute, defined by the Arm C Language Extensions (ACLE, version 00bet5, section 3.7.3) for SVE [1]. The purpose of this attribute is to define fixed-length (VLST) versions of existing sizeless types (VLAT). For example: #if __ARM_FEATURE_SVE_BITS==512 typedef svint32_t fixed_svint32_t __attribute__((arm_sve_vector_bits(512))); #endif Creates a type 'fixed_svint32_t' that is a fixed-length version of 'svint32_t' that is normal-sized (rather than sizeless) and contains exactly 512 bits. Unlike 'svint32_t', this type can be used in places such as structs and arrays where sizeless types can't. Implemented in this patch is the following: * Defined and tested attribute taking single argument. * Checks the argument is an integer constant expression. * Attribute can only be attached to a single SVE vector or predicate type, excluding tuple types such as svint32x4_t. * Added the `-msve-vector-bits=<bits>` flag. When specified the `__ARM_FEATURE_SVE_BITS__EXPERIMENTAL` macro is defined. * Added a language option to store the vector size specified by the `-msve-vector-bits=<bits>` flag. This is used to validate `N == __ARM_FEATURE_SVE_BITS`, where N is the number of bits passed to the attribute and `__ARM_FEATURE_SVE_BITS` is the feature macro defined under the same flag. The `__ARM_FEATURE_SVE_BITS` macro will be made non-experimental in the final patch of the series. [1] https://developer.arm.com/documentation/100987/latest This is patch 1/4 of a patch series. Reviewers: sdesmalen, rsandifo-arm, efriedma, ctetreau, cameron.mcinally, rengolin, aaron.ballman Reviewed By: sdesmalen, aaron.ballman Differential Revision: https://reviews.llvm.org/D83550
2020-05-29 17:17:37 +08:00
// -----------------------------------------------------------------------------
Add -o /dev/null to make it explicit that we don't care about the compiler output.
2020-07-17 20:21:13 +08:00
// RUN: not %clang -c %s -o /dev/null -target aarch64-none-linux-gnu \
// RUN: -march=armv8-a+sve 2>&1 | FileCheck --check-prefix=CHECK-NO-FLAG-ERROR %s
[Driver] Add support for -msve-vector-bits=scalable. No real action is taken for a value of scalable but it provides a route to disable an earlier specification and is effectively its default value when omitted. Patch also removes an "unused variable" warning. Differential Revision: https://reviews.llvm.org/D84021
2020-07-20 18:43:45 +08:00
// RUN: not %clang -c %s -o /dev/null -target aarch64-none-linux-gnu \
// RUN: -march=armv8-a+sve -msve-vector-bits=scalable 2>&1 | FileCheck --check-prefix=CHECK-NO-FLAG-ERROR %s
[AArch64][Driver][SVE] Allow -msve-vector-bits=<n>+ syntax to mean no maximum vscale This patch splits the existing SveVectorBits LangOpt into VScaleMin and VScaleMax LangOpts such that we can represent such an option. The cc1 option has also been split into -mvscale-{min,max}=<n> options so that the cc1 arguments better reflect the vscale_range IR attribute. Differential Revision: https://reviews.llvm.org/D111790
2021-10-14 19:04:33 +08:00
// RUN: not %clang -c %s -o /dev/null -target aarch64-none-linux-gnu \
// RUN: -march=armv8-a+sve -msve-vector-bits=256+ 2>&1 | FileCheck --check-prefix=CHECK-NO-FLAG-ERROR %s
[Sema][AArch64] Add parsing support for arm_sve_vector_bits attribute Summary: This patch implements parsing support for the 'arm_sve_vector_bits' type attribute, defined by the Arm C Language Extensions (ACLE, version 00bet5, section 3.7.3) for SVE [1]. The purpose of this attribute is to define fixed-length (VLST) versions of existing sizeless types (VLAT). For example: #if __ARM_FEATURE_SVE_BITS==512 typedef svint32_t fixed_svint32_t __attribute__((arm_sve_vector_bits(512))); #endif Creates a type 'fixed_svint32_t' that is a fixed-length version of 'svint32_t' that is normal-sized (rather than sizeless) and contains exactly 512 bits. Unlike 'svint32_t', this type can be used in places such as structs and arrays where sizeless types can't. Implemented in this patch is the following: * Defined and tested attribute taking single argument. * Checks the argument is an integer constant expression. * Attribute can only be attached to a single SVE vector or predicate type, excluding tuple types such as svint32x4_t. * Added the `-msve-vector-bits=<bits>` flag. When specified the `__ARM_FEATURE_SVE_BITS__EXPERIMENTAL` macro is defined. * Added a language option to store the vector size specified by the `-msve-vector-bits=<bits>` flag. This is used to validate `N == __ARM_FEATURE_SVE_BITS`, where N is the number of bits passed to the attribute and `__ARM_FEATURE_SVE_BITS` is the feature macro defined under the same flag. The `__ARM_FEATURE_SVE_BITS` macro will be made non-experimental in the final patch of the series. [1] https://developer.arm.com/documentation/100987/latest This is patch 1/4 of a patch series. Reviewers: sdesmalen, rsandifo-arm, efriedma, ctetreau, cameron.mcinally, rengolin, aaron.ballman Reviewed By: sdesmalen, aaron.ballman Differential Revision: https://reviews.llvm.org/D83550
2020-05-29 17:17:37 +08:00
typedef __SVInt32_t svint32_t;
typedef svint32_t noflag __attribute__((arm_sve_vector_bits(256)));
[Driver] Add support for -msve-vector-bits=scalable. No real action is taken for a value of scalable but it provides a route to disable an earlier specification and is effectively its default value when omitted. Patch also removes an "unused variable" warning. Differential Revision: https://reviews.llvm.org/D84021
2020-07-20 18:43:45 +08:00
// CHECK-NO-FLAG-ERROR: error: 'arm_sve_vector_bits' is only supported when '-msve-vector-bits=<bits>' is specified with a value of 128, 256, 512, 1024 or 2048
[Sema][AArch64] Add parsing support for arm_sve_vector_bits attribute Summary: This patch implements parsing support for the 'arm_sve_vector_bits' type attribute, defined by the Arm C Language Extensions (ACLE, version 00bet5, section 3.7.3) for SVE [1]. The purpose of this attribute is to define fixed-length (VLST) versions of existing sizeless types (VLAT). For example: #if __ARM_FEATURE_SVE_BITS==512 typedef svint32_t fixed_svint32_t __attribute__((arm_sve_vector_bits(512))); #endif Creates a type 'fixed_svint32_t' that is a fixed-length version of 'svint32_t' that is normal-sized (rather than sizeless) and contains exactly 512 bits. Unlike 'svint32_t', this type can be used in places such as structs and arrays where sizeless types can't. Implemented in this patch is the following: * Defined and tested attribute taking single argument. * Checks the argument is an integer constant expression. * Attribute can only be attached to a single SVE vector or predicate type, excluding tuple types such as svint32x4_t. * Added the `-msve-vector-bits=<bits>` flag. When specified the `__ARM_FEATURE_SVE_BITS__EXPERIMENTAL` macro is defined. * Added a language option to store the vector size specified by the `-msve-vector-bits=<bits>` flag. This is used to validate `N == __ARM_FEATURE_SVE_BITS`, where N is the number of bits passed to the attribute and `__ARM_FEATURE_SVE_BITS` is the feature macro defined under the same flag. The `__ARM_FEATURE_SVE_BITS` macro will be made non-experimental in the final patch of the series. [1] https://developer.arm.com/documentation/100987/latest This is patch 1/4 of a patch series. Reviewers: sdesmalen, rsandifo-arm, efriedma, ctetreau, cameron.mcinally, rengolin, aaron.ballman Reviewed By: sdesmalen, aaron.ballman Differential Revision: https://reviews.llvm.org/D83550
2020-05-29 17:17:37 +08:00
// Error if attribute vector size != -msve-vector-bits
// -----------------------------------------------------------------------------
Add -o /dev/null to make it explicit that we don't care about the compiler output.
2020-07-17 20:21:13 +08:00
// RUN: not %clang -c %s -o /dev/null -target aarch64-none-linux-gnu \
// RUN: -march=armv8-a+sve -msve-vector-bits=128 2>&1 | FileCheck --check-prefix=CHECK-BAD-VECTOR-SIZE-ERROR %s
[Sema][AArch64] Add parsing support for arm_sve_vector_bits attribute Summary: This patch implements parsing support for the 'arm_sve_vector_bits' type attribute, defined by the Arm C Language Extensions (ACLE, version 00bet5, section 3.7.3) for SVE [1]. The purpose of this attribute is to define fixed-length (VLST) versions of existing sizeless types (VLAT). For example: #if __ARM_FEATURE_SVE_BITS==512 typedef svint32_t fixed_svint32_t __attribute__((arm_sve_vector_bits(512))); #endif Creates a type 'fixed_svint32_t' that is a fixed-length version of 'svint32_t' that is normal-sized (rather than sizeless) and contains exactly 512 bits. Unlike 'svint32_t', this type can be used in places such as structs and arrays where sizeless types can't. Implemented in this patch is the following: * Defined and tested attribute taking single argument. * Checks the argument is an integer constant expression. * Attribute can only be attached to a single SVE vector or predicate type, excluding tuple types such as svint32x4_t. * Added the `-msve-vector-bits=<bits>` flag. When specified the `__ARM_FEATURE_SVE_BITS__EXPERIMENTAL` macro is defined. * Added a language option to store the vector size specified by the `-msve-vector-bits=<bits>` flag. This is used to validate `N == __ARM_FEATURE_SVE_BITS`, where N is the number of bits passed to the attribute and `__ARM_FEATURE_SVE_BITS` is the feature macro defined under the same flag. The `__ARM_FEATURE_SVE_BITS` macro will be made non-experimental in the final patch of the series. [1] https://developer.arm.com/documentation/100987/latest This is patch 1/4 of a patch series. Reviewers: sdesmalen, rsandifo-arm, efriedma, ctetreau, cameron.mcinally, rengolin, aaron.ballman Reviewed By: sdesmalen, aaron.ballman Differential Revision: https://reviews.llvm.org/D83550
2020-05-29 17:17:37 +08:00
typedef svint32_t bad_vector_size __attribute__((arm_sve_vector_bits(256)));
// CHECK-BAD-VECTOR-SIZE-ERROR: error: invalid SVE vector size '256', must match value set by '-msve-vector-bits' ('128')