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llvm-project/llvm/test/CodeGen/X86/atomic_op.ll

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filecheckize llvm-svn: 114507
2010-09-22 07:57:27 +08:00
; RUN: llc < %s -march=x86 | FileCheck %s
Added addition atomic instrinsics and, or, xor, min, and max. llvm-svn: 50663
2008-05-06 03:05:59 +08:00
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
filecheckize llvm-svn: 114507
2010-09-22 07:57:27 +08:00
define void @main(i32 %argc, i8** %argv) nounwind {
Added addition atomic instrinsics and, or, xor, min, and max. llvm-svn: 50663
2008-05-06 03:05:59 +08:00
entry:
%argc.addr = alloca i32 ; <i32*> [#uses=1]
%argv.addr = alloca i8** ; <i8***> [#uses=1]
%val1 = alloca i32 ; <i32*> [#uses=2]
%val2 = alloca i32 ; <i32*> [#uses=15]
%andt = alloca i32 ; <i32*> [#uses=2]
%ort = alloca i32 ; <i32*> [#uses=2]
%xort = alloca i32 ; <i32*> [#uses=2]
%old = alloca i32 ; <i32*> [#uses=18]
%temp = alloca i32 ; <i32*> [#uses=2]
store i32 %argc, i32* %argc.addr
store i8** %argv, i8*** %argv.addr
store i32 0, i32* %val1
store i32 31, i32* %val2
store i32 3855, i32* %andt
store i32 3855, i32* %ort
store i32 3855, i32* %xort
store i32 4, i32* %temp
filecheckize llvm-svn: 114507
2010-09-22 07:57:27 +08:00
%tmp = load i32* %temp
; CHECK: lock
; CHECK: xaddl
Added support for overloading intrinsics (atomics) based on pointers to different address spaces. This alters the naming scheme for those intrinsics, e.g., atomic.load.add.i32 => atomic.load.add.i32.p0i32 llvm-svn: 54195
2008-07-30 12:36:53 +08:00
call i32 @llvm.atomic.load.add.i32.p0i32( i32* %val1, i32 %tmp ) ; <i32>:0 [#uses=1]
Added addition atomic instrinsics and, or, xor, min, and max. llvm-svn: 50663
2008-05-06 03:05:59 +08:00
store i32 %0, i32* %old
filecheckize llvm-svn: 114507
2010-09-22 07:57:27 +08:00
; CHECK: lock
; CHECK: xaddl
Added support for overloading intrinsics (atomics) based on pointers to different address spaces. This alters the naming scheme for those intrinsics, e.g., atomic.load.add.i32 => atomic.load.add.i32.p0i32 llvm-svn: 54195
2008-07-30 12:36:53 +08:00
call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %val2, i32 30 ) ; <i32>:1 [#uses=1]
Added addition atomic instrinsics and, or, xor, min, and max. llvm-svn: 50663
2008-05-06 03:05:59 +08:00
store i32 %1, i32* %old
filecheckize llvm-svn: 114507
2010-09-22 07:57:27 +08:00
; CHECK: lock
; CHECK: xaddl
Added support for overloading intrinsics (atomics) based on pointers to different address spaces. This alters the naming scheme for those intrinsics, e.g., atomic.load.add.i32 => atomic.load.add.i32.p0i32 llvm-svn: 54195
2008-07-30 12:36:53 +08:00
call i32 @llvm.atomic.load.add.i32.p0i32( i32* %val2, i32 1 ) ; <i32>:2 [#uses=1]
Added addition atomic instrinsics and, or, xor, min, and max. llvm-svn: 50663
2008-05-06 03:05:59 +08:00
store i32 %2, i32* %old
filecheckize llvm-svn: 114507
2010-09-22 07:57:27 +08:00
; CHECK: lock
; CHECK: xaddl
Added support for overloading intrinsics (atomics) based on pointers to different address spaces. This alters the naming scheme for those intrinsics, e.g., atomic.load.add.i32 => atomic.load.add.i32.p0i32 llvm-svn: 54195
2008-07-30 12:36:53 +08:00
call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %val2, i32 1 ) ; <i32>:3 [#uses=1]
Added addition atomic instrinsics and, or, xor, min, and max. llvm-svn: 50663
2008-05-06 03:05:59 +08:00
store i32 %3, i32* %old
filecheckize llvm-svn: 114507
2010-09-22 07:57:27 +08:00
; CHECK: andl
; CHECK: lock
; CHECK: cmpxchgl
Added support for overloading intrinsics (atomics) based on pointers to different address spaces. This alters the naming scheme for those intrinsics, e.g., atomic.load.add.i32 => atomic.load.add.i32.p0i32 llvm-svn: 54195
2008-07-30 12:36:53 +08:00
call i32 @llvm.atomic.load.and.i32.p0i32( i32* %andt, i32 4080 ) ; <i32>:4 [#uses=1]
Added addition atomic instrinsics and, or, xor, min, and max. llvm-svn: 50663
2008-05-06 03:05:59 +08:00
store i32 %4, i32* %old
filecheckize llvm-svn: 114507
2010-09-22 07:57:27 +08:00
; CHECK: orl
; CHECK: lock
; CHECK: cmpxchgl
Added support for overloading intrinsics (atomics) based on pointers to different address spaces. This alters the naming scheme for those intrinsics, e.g., atomic.load.add.i32 => atomic.load.add.i32.p0i32 llvm-svn: 54195
2008-07-30 12:36:53 +08:00
call i32 @llvm.atomic.load.or.i32.p0i32( i32* %ort, i32 4080 ) ; <i32>:5 [#uses=1]
Added addition atomic instrinsics and, or, xor, min, and max. llvm-svn: 50663
2008-05-06 03:05:59 +08:00
store i32 %5, i32* %old
filecheckize llvm-svn: 114507
2010-09-22 07:57:27 +08:00
; CHECK: xorl
; CHECK: lock
; CHECK: cmpxchgl
Added support for overloading intrinsics (atomics) based on pointers to different address spaces. This alters the naming scheme for those intrinsics, e.g., atomic.load.add.i32 => atomic.load.add.i32.p0i32 llvm-svn: 54195
2008-07-30 12:36:53 +08:00
call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %xort, i32 4080 ) ; <i32>:6 [#uses=1]
Added addition atomic instrinsics and, or, xor, min, and max. llvm-svn: 50663
2008-05-06 03:05:59 +08:00
store i32 %6, i32* %old
filecheckize llvm-svn: 114507
2010-09-22 07:57:27 +08:00
; CHECK: cmov
; CHECK: lock
; CHECK: cmpxchgl
Added support for overloading intrinsics (atomics) based on pointers to different address spaces. This alters the naming scheme for those intrinsics, e.g., atomic.load.add.i32 => atomic.load.add.i32.p0i32 llvm-svn: 54195
2008-07-30 12:36:53 +08:00
call i32 @llvm.atomic.load.min.i32.p0i32( i32* %val2, i32 16 ) ; <i32>:7 [#uses=1]
Added addition atomic instrinsics and, or, xor, min, and max. llvm-svn: 50663
2008-05-06 03:05:59 +08:00
store i32 %7, i32* %old
%neg = sub i32 0, 1 ; <i32> [#uses=1]
filecheckize llvm-svn: 114507
2010-09-22 07:57:27 +08:00
; CHECK: cmov
; CHECK: lock
; CHECK: cmpxchgl
Added support for overloading intrinsics (atomics) based on pointers to different address spaces. This alters the naming scheme for those intrinsics, e.g., atomic.load.add.i32 => atomic.load.add.i32.p0i32 llvm-svn: 54195
2008-07-30 12:36:53 +08:00
call i32 @llvm.atomic.load.min.i32.p0i32( i32* %val2, i32 %neg ) ; <i32>:8 [#uses=1]
Added addition atomic instrinsics and, or, xor, min, and max. llvm-svn: 50663
2008-05-06 03:05:59 +08:00
store i32 %8, i32* %old
filecheckize llvm-svn: 114507
2010-09-22 07:57:27 +08:00
; CHECK: cmov
; CHECK: lock
; CHECK: cmpxchgl
Added support for overloading intrinsics (atomics) based on pointers to different address spaces. This alters the naming scheme for those intrinsics, e.g., atomic.load.add.i32 => atomic.load.add.i32.p0i32 llvm-svn: 54195
2008-07-30 12:36:53 +08:00
call i32 @llvm.atomic.load.max.i32.p0i32( i32* %val2, i32 1 ) ; <i32>:9 [#uses=1]
Added addition atomic instrinsics and, or, xor, min, and max. llvm-svn: 50663
2008-05-06 03:05:59 +08:00
store i32 %9, i32* %old
filecheckize llvm-svn: 114507
2010-09-22 07:57:27 +08:00
; CHECK: cmov
; CHECK: lock
; CHECK: cmpxchgl
Added support for overloading intrinsics (atomics) based on pointers to different address spaces. This alters the naming scheme for those intrinsics, e.g., atomic.load.add.i32 => atomic.load.add.i32.p0i32 llvm-svn: 54195
2008-07-30 12:36:53 +08:00
call i32 @llvm.atomic.load.max.i32.p0i32( i32* %val2, i32 0 ) ; <i32>:10 [#uses=1]
Added addition atomic instrinsics and, or, xor, min, and max. llvm-svn: 50663
2008-05-06 03:05:59 +08:00
store i32 %10, i32* %old
filecheckize llvm-svn: 114507
2010-09-22 07:57:27 +08:00
; CHECK: cmov
; CHECK: lock
; CHECK: cmpxchgl
Added support for overloading intrinsics (atomics) based on pointers to different address spaces. This alters the naming scheme for those intrinsics, e.g., atomic.load.add.i32 => atomic.load.add.i32.p0i32 llvm-svn: 54195
2008-07-30 12:36:53 +08:00
call i32 @llvm.atomic.load.umax.i32.p0i32( i32* %val2, i32 65535 ) ; <i32>:11 [#uses=1]
Added addition atomic instrinsics and, or, xor, min, and max. llvm-svn: 50663
2008-05-06 03:05:59 +08:00
store i32 %11, i32* %old
filecheckize llvm-svn: 114507
2010-09-22 07:57:27 +08:00
; CHECK: cmov
; CHECK: lock
; CHECK: cmpxchgl
Added support for overloading intrinsics (atomics) based on pointers to different address spaces. This alters the naming scheme for those intrinsics, e.g., atomic.load.add.i32 => atomic.load.add.i32.p0i32 llvm-svn: 54195
2008-07-30 12:36:53 +08:00
call i32 @llvm.atomic.load.umax.i32.p0i32( i32* %val2, i32 10 ) ; <i32>:12 [#uses=1]
Added addition atomic instrinsics and, or, xor, min, and max. llvm-svn: 50663
2008-05-06 03:05:59 +08:00
store i32 %12, i32* %old
filecheckize llvm-svn: 114507
2010-09-22 07:57:27 +08:00
; CHECK: cmov
; CHECK: lock
; CHECK: cmpxchgl
Added support for overloading intrinsics (atomics) based on pointers to different address spaces. This alters the naming scheme for those intrinsics, e.g., atomic.load.add.i32 => atomic.load.add.i32.p0i32 llvm-svn: 54195
2008-07-30 12:36:53 +08:00
call i32 @llvm.atomic.load.umin.i32.p0i32( i32* %val2, i32 1 ) ; <i32>:13 [#uses=1]
Added addition atomic instrinsics and, or, xor, min, and max. llvm-svn: 50663
2008-05-06 03:05:59 +08:00
store i32 %13, i32* %old
filecheckize llvm-svn: 114507
2010-09-22 07:57:27 +08:00
; CHECK: cmov
; CHECK: lock
; CHECK: cmpxchgl
Added support for overloading intrinsics (atomics) based on pointers to different address spaces. This alters the naming scheme for those intrinsics, e.g., atomic.load.add.i32 => atomic.load.add.i32.p0i32 llvm-svn: 54195
2008-07-30 12:36:53 +08:00
call i32 @llvm.atomic.load.umin.i32.p0i32( i32* %val2, i32 10 ) ; <i32>:14 [#uses=1]
Added addition atomic instrinsics and, or, xor, min, and max. llvm-svn: 50663
2008-05-06 03:05:59 +08:00
store i32 %14, i32* %old
filecheckize llvm-svn: 114507
2010-09-22 07:57:27 +08:00
; CHECK: xchgl %{{.*}}, {{.*}}(%esp)
Added support for overloading intrinsics (atomics) based on pointers to different address spaces. This alters the naming scheme for those intrinsics, e.g., atomic.load.add.i32 => atomic.load.add.i32.p0i32 llvm-svn: 54195
2008-07-30 12:36:53 +08:00
call i32 @llvm.atomic.swap.i32.p0i32( i32* %val2, i32 1976 ) ; <i32>:15 [#uses=1]
Added addition atomic instrinsics and, or, xor, min, and max. llvm-svn: 50663
2008-05-06 03:05:59 +08:00
store i32 %15, i32* %old
%neg1 = sub i32 0, 10 ; <i32> [#uses=1]
filecheckize llvm-svn: 114507
2010-09-22 07:57:27 +08:00
; CHECK: lock
; CHECK: cmpxchgl
Added support for overloading intrinsics (atomics) based on pointers to different address spaces. This alters the naming scheme for those intrinsics, e.g., atomic.load.add.i32 => atomic.load.add.i32.p0i32 llvm-svn: 54195
2008-07-30 12:36:53 +08:00
call i32 @llvm.atomic.cmp.swap.i32.p0i32( i32* %val2, i32 %neg1, i32 1 ) ; <i32>:16 [#uses=1]
Added addition atomic instrinsics and, or, xor, min, and max. llvm-svn: 50663
2008-05-06 03:05:59 +08:00
store i32 %16, i32* %old
filecheckize llvm-svn: 114507
2010-09-22 07:57:27 +08:00
; CHECK: lock
; CHECK: cmpxchgl
Added support for overloading intrinsics (atomics) based on pointers to different address spaces. This alters the naming scheme for those intrinsics, e.g., atomic.load.add.i32 => atomic.load.add.i32.p0i32 llvm-svn: 54195
2008-07-30 12:36:53 +08:00
call i32 @llvm.atomic.cmp.swap.i32.p0i32( i32* %val2, i32 1976, i32 1 ) ; <i32>:17 [#uses=1]
Added addition atomic instrinsics and, or, xor, min, and max. llvm-svn: 50663
2008-05-06 03:05:59 +08:00
store i32 %17, i32* %old
ret void
}
Added support for overloading intrinsics (atomics) based on pointers to different address spaces. This alters the naming scheme for those intrinsics, e.g., atomic.load.add.i32 => atomic.load.add.i32.p0i32 llvm-svn: 54195
2008-07-30 12:36:53 +08:00
declare i32 @llvm.atomic.load.add.i32.p0i32(i32*, i32) nounwind
Added addition atomic instrinsics and, or, xor, min, and max. llvm-svn: 50663
2008-05-06 03:05:59 +08:00
Added support for overloading intrinsics (atomics) based on pointers to different address spaces. This alters the naming scheme for those intrinsics, e.g., atomic.load.add.i32 => atomic.load.add.i32.p0i32 llvm-svn: 54195
2008-07-30 12:36:53 +08:00
declare i32 @llvm.atomic.load.sub.i32.p0i32(i32*, i32) nounwind
Added addition atomic instrinsics and, or, xor, min, and max. llvm-svn: 50663
2008-05-06 03:05:59 +08:00
Added support for overloading intrinsics (atomics) based on pointers to different address spaces. This alters the naming scheme for those intrinsics, e.g., atomic.load.add.i32 => atomic.load.add.i32.p0i32 llvm-svn: 54195
2008-07-30 12:36:53 +08:00
declare i32 @llvm.atomic.load.and.i32.p0i32(i32*, i32) nounwind
Added addition atomic instrinsics and, or, xor, min, and max. llvm-svn: 50663
2008-05-06 03:05:59 +08:00
Added support for overloading intrinsics (atomics) based on pointers to different address spaces. This alters the naming scheme for those intrinsics, e.g., atomic.load.add.i32 => atomic.load.add.i32.p0i32 llvm-svn: 54195
2008-07-30 12:36:53 +08:00
declare i32 @llvm.atomic.load.or.i32.p0i32(i32*, i32) nounwind
Added addition atomic instrinsics and, or, xor, min, and max. llvm-svn: 50663
2008-05-06 03:05:59 +08:00
Added support for overloading intrinsics (atomics) based on pointers to different address spaces. This alters the naming scheme for those intrinsics, e.g., atomic.load.add.i32 => atomic.load.add.i32.p0i32 llvm-svn: 54195
2008-07-30 12:36:53 +08:00
declare i32 @llvm.atomic.load.xor.i32.p0i32(i32*, i32) nounwind
Added addition atomic instrinsics and, or, xor, min, and max. llvm-svn: 50663
2008-05-06 03:05:59 +08:00
Added support for overloading intrinsics (atomics) based on pointers to different address spaces. This alters the naming scheme for those intrinsics, e.g., atomic.load.add.i32 => atomic.load.add.i32.p0i32 llvm-svn: 54195
2008-07-30 12:36:53 +08:00
declare i32 @llvm.atomic.load.min.i32.p0i32(i32*, i32) nounwind
Added addition atomic instrinsics and, or, xor, min, and max. llvm-svn: 50663
2008-05-06 03:05:59 +08:00
Added support for overloading intrinsics (atomics) based on pointers to different address spaces. This alters the naming scheme for those intrinsics, e.g., atomic.load.add.i32 => atomic.load.add.i32.p0i32 llvm-svn: 54195
2008-07-30 12:36:53 +08:00
declare i32 @llvm.atomic.load.max.i32.p0i32(i32*, i32) nounwind
Added addition atomic instrinsics and, or, xor, min, and max. llvm-svn: 50663
2008-05-06 03:05:59 +08:00
Added support for overloading intrinsics (atomics) based on pointers to different address spaces. This alters the naming scheme for those intrinsics, e.g., atomic.load.add.i32 => atomic.load.add.i32.p0i32 llvm-svn: 54195
2008-07-30 12:36:53 +08:00
declare i32 @llvm.atomic.load.umax.i32.p0i32(i32*, i32) nounwind
Added addition atomic instrinsics and, or, xor, min, and max. llvm-svn: 50663
2008-05-06 03:05:59 +08:00
Added support for overloading intrinsics (atomics) based on pointers to different address spaces. This alters the naming scheme for those intrinsics, e.g., atomic.load.add.i32 => atomic.load.add.i32.p0i32 llvm-svn: 54195
2008-07-30 12:36:53 +08:00
declare i32 @llvm.atomic.load.umin.i32.p0i32(i32*, i32) nounwind
Added addition atomic instrinsics and, or, xor, min, and max. llvm-svn: 50663
2008-05-06 03:05:59 +08:00
Added support for overloading intrinsics (atomics) based on pointers to different address spaces. This alters the naming scheme for those intrinsics, e.g., atomic.load.add.i32 => atomic.load.add.i32.p0i32 llvm-svn: 54195
2008-07-30 12:36:53 +08:00
declare i32 @llvm.atomic.swap.i32.p0i32(i32*, i32) nounwind
Added addition atomic instrinsics and, or, xor, min, and max. llvm-svn: 50663
2008-05-06 03:05:59 +08:00
Added support for overloading intrinsics (atomics) based on pointers to different address spaces. This alters the naming scheme for those intrinsics, e.g., atomic.load.add.i32 => atomic.load.add.i32.p0i32 llvm-svn: 54195
2008-07-30 12:36:53 +08:00
declare i32 @llvm.atomic.cmp.swap.i32.p0i32(i32*, i32, i32) nounwind