2015-03-31 20:52:27 +08:00
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//===-- SystemZTargetTransformInfo.h - SystemZ-specific TTI ---------------===//
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//
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2019-01-19 16:50:56 +08:00
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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2015-03-31 20:52:27 +08:00
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZTARGETTRANSFORMINFO_H
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#define LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZTARGETTRANSFORMINFO_H
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#include "SystemZTargetMachine.h"
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#include "llvm/Analysis/TargetTransformInfo.h"
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#include "llvm/CodeGen/BasicTTIImpl.h"
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namespace llvm {
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class SystemZTTIImpl : public BasicTTIImplBase<SystemZTTIImpl> {
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typedef BasicTTIImplBase<SystemZTTIImpl> BaseT;
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typedef TargetTransformInfo TTI;
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friend BaseT;
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const SystemZSubtarget *ST;
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const SystemZTargetLowering *TLI;
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const SystemZSubtarget *getST() const { return ST; }
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const SystemZTargetLowering *getTLI() const { return TLI; }
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2017-04-12 19:49:08 +08:00
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unsigned const LIBCALL_COST = 30;
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2015-03-31 20:52:27 +08:00
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public:
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2015-09-17 07:38:13 +08:00
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explicit SystemZTTIImpl(const SystemZTargetMachine *TM, const Function &F)
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2015-07-09 10:08:42 +08:00
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: BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)),
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TLI(ST->getTargetLowering()) {}
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2015-03-31 20:52:27 +08:00
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/// \name Scalar TTI Implementations
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/// @{
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2018-08-13 21:31:30 +08:00
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unsigned getInliningThresholdMultiplier() { return 3; }
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2015-08-06 02:08:10 +08:00
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int getIntImmCost(const APInt &Imm, Type *Ty);
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2015-03-31 20:52:27 +08:00
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2015-08-06 02:08:10 +08:00
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int getIntImmCost(unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty);
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int getIntImmCost(Intrinsic::ID IID, unsigned Idx, const APInt &Imm,
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Type *Ty);
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2015-03-31 20:52:27 +08:00
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2015-03-31 20:56:33 +08:00
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TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth);
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[LoopUnroll] Pass SCEV to getUnrollingPreferences hook. NFCI.
Reviewers: sanjoy, anna, reames, apilipenko, igor-laevsky, mkuper
Subscribers: jholewinski, arsenm, mzolotukhin, nemanjai, nhaehnle, javed.absar, mcrosier, llvm-commits
Differential Revision: https://reviews.llvm.org/D34531
llvm-svn: 306554
2017-06-28 23:53:17 +08:00
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void getUnrollingPreferences(Loop *L, ScalarEvolution &SE,
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TTI::UnrollingPreferences &UP);
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2016-09-28 17:41:38 +08:00
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2017-07-21 19:59:37 +08:00
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bool isLSRCostLess(TargetTransformInfo::LSRCost &C1,
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TargetTransformInfo::LSRCost &C2);
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2015-03-31 20:52:27 +08:00
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/// @}
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[SystemZ] Add CodeGen support for integer vector types
This the first of a series of patches to add CodeGen support exploiting
the instructions of the z13 vector facility. This patch adds support
for the native integer vector types (v16i8, v8i16, v4i32, v2i64).
When the vector facility is present, we default to the new vector ABI.
This is characterized by two major differences:
- Vector types are passed/returned in vector registers
(except for unnamed arguments of a variable-argument list function).
- Vector types are at most 8-byte aligned.
The reason for the choice of 8-byte vector alignment is that the hardware
is able to efficiently load vectors at 8-byte alignment, and the ABI only
guarantees 8-byte alignment of the stack pointer, so requiring any higher
alignment for vectors would require dynamic stack re-alignment code.
However, for compatibility with old code that may use vector types, when
*not* using the vector facility, the old alignment rules (vector types
are naturally aligned) remain in use.
These alignment rules are not only implemented at the C language level
(implemented in clang), but also at the LLVM IR level. This is done
by selecting a different DataLayout string depending on whether the
vector ABI is in effect or not.
Based on a patch by Richard Sandiford.
llvm-svn: 236521
2015-05-06 03:25:42 +08:00
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/// \name Vector TTI Implementations
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/// @{
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unsigned getNumberOfRegisters(bool Vector);
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Const correctness for TTI::getRegisterBitWidth
Summary: The method TargetTransformInfo::getRegisterBitWidth() is declared const, but the type erasing implementation classes (TargetTransformInfo::Concept & TargetTransformInfo::Model) that were introduced by Chandler in https://reviews.llvm.org/D7293 do not have the method declared const. This is an NFC to tidy up the const consistency between TTI and its implementation.
Reviewers: chandlerc, rnk, reames
Reviewed By: reames
Subscribers: reames, jfb, arsenm, dschuff, nemanjai, nhaehnle, javed.absar, sbc100, jgravelle-google, llvm-commits
Differential Revision: https://reviews.llvm.org/D33903
llvm-svn: 305189
2017-06-12 22:22:21 +08:00
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unsigned getRegisterBitWidth(bool Vector) const;
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[SystemZ] Add CodeGen support for integer vector types
This the first of a series of patches to add CodeGen support exploiting
the instructions of the z13 vector facility. This patch adds support
for the native integer vector types (v16i8, v8i16, v4i32, v2i64).
When the vector facility is present, we default to the new vector ABI.
This is characterized by two major differences:
- Vector types are passed/returned in vector registers
(except for unnamed arguments of a variable-argument list function).
- Vector types are at most 8-byte aligned.
The reason for the choice of 8-byte vector alignment is that the hardware
is able to efficiently load vectors at 8-byte alignment, and the ABI only
guarantees 8-byte alignment of the stack pointer, so requiring any higher
alignment for vectors would require dynamic stack re-alignment code.
However, for compatibility with old code that may use vector types, when
*not* using the vector facility, the old alignment rules (vector types
are naturally aligned) remain in use.
These alignment rules are not only implemented at the C language level
(implemented in clang), but also at the LLVM IR level. This is done
by selecting a different DataLayout string depending on whether the
vector ABI is in effect or not.
Based on a patch by Richard Sandiford.
llvm-svn: 236521
2015-05-06 03:25:42 +08:00
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2017-07-14 21:52:38 +08:00
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unsigned getCacheLineSize() { return 256; }
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unsigned getPrefetchDistance() { return 2000; }
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unsigned getMinPrefetchStride() { return 2048; }
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2017-11-06 21:10:31 +08:00
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bool hasDivRemOp(Type *DataType, bool IsSigned);
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2017-05-24 21:42:56 +08:00
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bool prefersVectorizedAddressing() { return false; }
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2017-07-21 19:59:37 +08:00
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bool LSRWithInstrQueries() { return true; }
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2017-04-12 20:41:37 +08:00
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bool supportsEfficientVectorElementLoadStore() { return true; }
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2017-04-12 19:49:08 +08:00
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bool enableInterleavedAccessVectorization() { return true; }
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int getArithmeticInstrCost(
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unsigned Opcode, Type *Ty,
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TTI::OperandValueKind Opd1Info = TTI::OK_AnyValue,
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TTI::OperandValueKind Opd2Info = TTI::OK_AnyValue,
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TTI::OperandValueProperties Opd1PropInfo = TTI::OP_None,
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TTI::OperandValueProperties Opd2PropInfo = TTI::OP_None,
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ArrayRef<const Value *> Args = ArrayRef<const Value *>());
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int getShuffleCost(TTI::ShuffleKind Kind, Type *Tp, int Index, Type *SubTp);
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unsigned getVectorTruncCost(Type *SrcTy, Type *DstTy);
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unsigned getVectorBitmaskConversionCost(Type *SrcTy, Type *DstTy);
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2018-11-01 17:01:51 +08:00
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unsigned getBoolVecToIntConversionCost(unsigned Opcode, Type *Dst,
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const Instruction *I);
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2017-04-12 19:49:08 +08:00
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int getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src,
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const Instruction *I = nullptr);
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int getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy,
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const Instruction *I = nullptr);
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int getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index);
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2018-10-26 06:28:25 +08:00
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bool isFoldableLoad(const LoadInst *Ld, const Instruction *&FoldedValue);
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2017-04-12 19:49:08 +08:00
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int getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
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unsigned AddressSpace, const Instruction *I = nullptr);
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int getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy,
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unsigned Factor,
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ArrayRef<unsigned> Indices,
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unsigned Alignment,
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2018-10-31 17:57:56 +08:00
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unsigned AddressSpace,
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bool UseMaskForCond = false,
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bool UseMaskForGaps = false);
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2018-11-22 15:17:29 +08:00
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int getIntrinsicInstrCost(Intrinsic::ID ID, Type *RetTy,
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ArrayRef<Value *> Args, FastMathFlags FMF,
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unsigned VF = 1);
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int getIntrinsicInstrCost(Intrinsic::ID ID, Type *RetTy,
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ArrayRef<Type *> Tys, FastMathFlags FMF,
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unsigned ScalarizationCostPassed = UINT_MAX);
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[SystemZ] Add CodeGen support for integer vector types
This the first of a series of patches to add CodeGen support exploiting
the instructions of the z13 vector facility. This patch adds support
for the native integer vector types (v16i8, v8i16, v4i32, v2i64).
When the vector facility is present, we default to the new vector ABI.
This is characterized by two major differences:
- Vector types are passed/returned in vector registers
(except for unnamed arguments of a variable-argument list function).
- Vector types are at most 8-byte aligned.
The reason for the choice of 8-byte vector alignment is that the hardware
is able to efficiently load vectors at 8-byte alignment, and the ABI only
guarantees 8-byte alignment of the stack pointer, so requiring any higher
alignment for vectors would require dynamic stack re-alignment code.
However, for compatibility with old code that may use vector types, when
*not* using the vector facility, the old alignment rules (vector types
are naturally aligned) remain in use.
These alignment rules are not only implemented at the C language level
(implemented in clang), but also at the LLVM IR level. This is done
by selecting a different DataLayout string depending on whether the
vector ABI is in effect or not.
Based on a patch by Richard Sandiford.
llvm-svn: 236521
2015-05-06 03:25:42 +08:00
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/// @}
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2015-03-31 20:52:27 +08:00
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};
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} // end namespace llvm
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#endif
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